INFO:2025-02-18T15:05:45Z:root:pulling... From github.com:llvm/llvm-project * branch main -> FETCH_HEAD 378c6fbe330e..9516f44f6b67 main -> origin/main Switched to branch 'main' Your branch is behind 'origin/main' by 1 commit, and can be fast-forwarded. (use "git pull" to update your local branch) HEAD is now at 9516f44f6b67 [RISCV] Add policy operand to masked vector compare pseudos. Remove ForceTailAgnostic. NFC (#127575) INFO:2025-02-18T15:05:48Z:root:syncing... Deleted branch merge (was 378c6fbe330e). Switched to a new branch 'merge' branch 'merge' set up to track 'origin/main'. INFO:2025-02-18T15:05:48Z:root:building ninja: Entering directory `out/gn' [1/1696] STAMP stage2_unix/obj/libcxx/include/include.stamp [2/1696] ACTION //llvm/tools/llvm-exegesis/lib/RISCV:RISCVGenExegesis(//llvm/utils/gn/build/toolchain:unix) [3/1695] ACTION //llvm/lib/Target/RISCV:RISCVGenMacroFusion(//llvm/utils/gn/build/toolchain:unix) [4/1694] ACTION //llvm/include/llvm/TargetParser:RISCVTargetParserDef(//llvm/utils/gn/build/toolchain:unix) [5/1391] ACTION //llvm/lib/Target/RISCV:RISCVGenMCPseudoLowering(//llvm/utils/gn/build/toolchain:unix) [6/1390] ACTION //llvm/lib/Target/RISCV:RISCVGenCompressInstEmitter(//llvm/utils/gn/build/toolchain:unix) [7/1389] ACTION //llvm/lib/Target/RISCV/MCTargetDesc:RISCVGenRegisterInfo(//llvm/utils/gn/build/toolchain:unix) [8/1388] ACTION //llvm/lib/Target/RISCV:RISCVGenRegisterBank(//llvm/utils/gn/build/toolchain:unix) [9/1387] ACTION //llvm/lib/Target/RISCV:RISCVGenO0PreLegalizeGICombiner(//llvm/utils/gn/build/toolchain:unix) [10/1386] ACTION //llvm/lib/Target/RISCV:RISCVGenPostLegalizeGICombiner(//llvm/utils/gn/build/toolchain:unix) [11/1385] ACTION //llvm/lib/Target/RISCV/MCTargetDesc:RISCVGenMCCodeEmitter(//llvm/utils/gn/build/toolchain:unix) [12/1384] ACTION //llvm/lib/Target/RISCV:RISCVGenPreLegalizeGICombiner(//llvm/utils/gn/build/toolchain:unix) [13/1383] ACTION //llvm/lib/Target/RISCV/Disassembler:RISCVGenDisassemblerTables(//llvm/utils/gn/build/toolchain:unix) [14/1382] ACTION //llvm/lib/Target/RISCV/MCTargetDesc:RISCVGenAsmWriter(//llvm/utils/gn/build/toolchain:unix) [15/1381] ACTION //llvm/lib/Target/RISCV/AsmParser:RISCVGenAsmMatcher(//llvm/utils/gn/build/toolchain:unix) [16/1380] ACTION //llvm/lib/Target/RISCV/MCTargetDesc:RISCVGenSearchableTables(//llvm/utils/gn/build/toolchain:unix) [17/1379] ACTION //llvm/lib/Target/RISCV/MCTargetDesc:RISCVGenSubtargetInfo(//llvm/utils/gn/build/toolchain:unix) [18/1378] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRShiftExpand.o [19/1378] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonBranchRelaxation.o [20/1378] CXX obj/llvm/lib/Target/BPF/GISel/LLVMBPFCodeGen.BPFCallLowering.o [21/1378] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRSubtarget.o [22/1378] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRMCInstLower.o [23/1378] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRTargetObjectFile.o [24/1378] CXX obj/llvm/lib/Target/Lanai/LLVMLanaiCodeGen.LanaiDelaySlotFiller.o [25/1378] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRTargetMachine.o [26/1378] CXX obj/llvm/lib/Target/Lanai/LLVMLanaiCodeGen.LanaiFrameLowering.o [27/1378] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRFrameLowering.o [28/1378] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonBlockRanges.o [29/1378] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFFrameLowering.o [30/1378] CXX obj/llvm/lib/Target/Lanai/LLVMLanaiCodeGen.LanaiISelDAGToDAG.o [31/1378] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRAsmPrinter.o [32/1378] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRISelDAGToDAG.o [33/1378] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRRegisterInfo.o [34/1378] CXX obj/llvm/lib/Target/Lanai/LLVMLanaiCodeGen.LanaiAsmPrinter.o [35/1378] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFMIChecking.o [36/1378] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRInstrInfo.o [37/1378] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFSubtarget.o [38/1378] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonFixupHwLoops.o [39/1378] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonCommonGEP.o [40/1378] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonGenExtract.o [41/1378] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonEarlyIfConv.o [42/1378] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonBitTracker.o [43/1378] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFRegisterInfo.o [44/1378] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFSelectionDAGInfo.o [45/1378] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonAsmPrinter.o [46/1378] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonExpandCondsets.o [47/1378] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonCopyToCombine.o [48/1378] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRExpandPseudoInsts.o [49/1378] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFMISimplifyPatchable.o [50/1378] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonCopyHoisting.o [51/1378] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMMachineFunctionInfo.o [52/1378] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRISelLowering.o [53/1378] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMInstrInfo.o [54/1378] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMMacroFusion.o [55/1378] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFISelLowering.o [56/1378] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFMIPeephole.o [57/1378] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMTargetObjectFile.o [58/1378] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.MLxExpansionPass.o [59/1378] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMLegalizerInfo.o [60/1378] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMRegisterBankInfo.o [61/1378] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFISelDAGToDAG.o [62/1378] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMMCInstLower.o [63/1378] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonBitSimplify.o [64/1378] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMSLSHardening.o [65/1378] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonConstExtenders.o [66/1378] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMLatencyMutations.o [67/1378] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonConstPropagation.o [68/1378] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMSelectionDAGInfo.o [69/1378] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFAbstractMemberAccess.o [70/1378] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.MVEGatherScatterLowering.o [71/1378] CXX obj/llvm/lib/Target/BPF/GISel/LLVMBPFCodeGen.BPFInstructionSelector.o [72/1378] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonHazardRecognizer.o [73/1378] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMParallelDSP.o [74/1378] CXX obj/llvm/lib/Target/Lanai/LLVMLanaiCodeGen.LanaiSelectionDAGInfo.o [75/1378] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMSubtarget.o [76/1378] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonGenMemAbsolute.o [77/1378] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonGenPredicate.o [78/1378] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonGenMux.o [79/1378] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonNewValueJump.o [80/1378] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonMachineScheduler.o [81/1378] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMLowOverheadLoops.o [82/1378] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonLoopAlign.o [83/1378] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonHardwareLoops.o [84/1378] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonSplitConst32AndConst64.o [85/1378] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonVExtract.o [86/1378] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonMask.o [87/1378] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonMCInstLower.o [88/1378] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMTargetMachine.o [89/1378] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonSelectionDAGInfo.o [90/1378] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonPeephole.o [91/1378] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonVectorPrint.o [92/1378] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonRegisterInfo.o [93/1378] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonLoadStoreWidening.o [94/1378] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonRDFOpt.o [95/1378] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonFrameLowering.o [96/1378] CXX obj/llvm/lib/Target/Lanai/LLVMLanaiCodeGen.LanaiSubtarget.o [97/1378] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonVectorLoopCarriedReuse.o [98/1378] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonOptAddrMode.o [99/1378] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonTfrCleanup.o [100/1378] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonGenInsert.o [101/1378] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMLoadStoreOptimizer.o [102/1378] CXX obj/llvm/lib/Target/Lanai/LLVMLanaiCodeGen.LanaiMemAluCombiner.o [103/1378] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonSplitDouble.o [104/1378] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMInstructionSelector.o [105/1378] CXX obj/llvm/lib/Target/LoongArch/LLVMLoongArchCodeGen.LoongArchExpandAtomicPseudoInsts.o [106/1378] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonISelLoweringHVX.o [107/1378] CXX obj/llvm/lib/Target/LoongArch/LLVMLoongArchCodeGen.LoongArchFrameLowering.o [108/1378] ACTION //llvm/lib/Target/RISCV/MCTargetDesc:RISCVGenInstrInfo(//llvm/utils/gn/build/toolchain:unix) [109/1378] CXX obj/llvm/lib/Target/LoongArch/LLVMLoongArchCodeGen.LoongArchDeadRegisterDefinitions.o [110/1378] CXX obj/llvm/lib/Target/LoongArch/LLVMLoongArchCodeGen.LoongArchAsmPrinter.o [111/1378] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFTargetMachine.o [112/1378] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMTargetTransformInfo.o [113/1378] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonSubtarget.o [114/1378] CXX obj/llvm/lib/Target/LoongArch/LLVMLoongArchCodeGen.LoongArchExpandPseudoInsts.o [115/1378] CXX obj/llvm/lib/Target/LoongArch/LLVMLoongArchCodeGen.LoongArchMergeBaseOffset.o [116/1378] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonVLIWPacketizer.o [117/1378] CXX obj/llvm/lib/Target/LoongArch/LLVMLoongArchCodeGen.LoongArchSubtarget.o [118/1378] CXX obj/llvm/lib/Target/LoongArch/LLVMLoongArchCodeGen.LoongArchInstrInfo.o [119/1378] CXX obj/llvm/lib/Target/Lanai/LLVMLanaiCodeGen.LanaiISelLowering.o [120/1378] CXX obj/llvm/lib/Target/LoongArch/LLVMLoongArchCodeGen.LoongArchRegisterInfo.o [121/1378] CXX obj/llvm/lib/Target/LoongArch/LLVMLoongArchCodeGen.LoongArchISelDAGToDAG.o [122/1378] ACTION //llvm/lib/Target/RISCV:RISCVGenGlobalISel(//llvm/utils/gn/build/toolchain:unix) [123/1378] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonISelDAGToDAG.o [124/1378] CXX obj/llvm/lib/Target/LoongArch/LLVMLoongArchCodeGen.LoongArchOptWInstrs.o [125/1378] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonISelDAGToDAGHVX.o [126/1378] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonLoopIdiomRecognition.o [127/1378] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonISelLowering.o [128/1378] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MicroMipsSizeReduction.o [129/1378] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonTargetTransformInfo.o [130/1378] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.Mips16FrameLowering.o [131/1378] CXX obj/llvm/lib/Target/LoongArch/LLVMLoongArchCodeGen.LoongArchTargetTransformInfo.o [132/1378] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonInstrInfo.o [133/1378] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.Mips16HardFloat.o [134/1378] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsCCState.o [135/1378] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsCallLowering.o [136/1378] CXX obj/llvm/lib/Target/Lanai/LLVMLanaiCodeGen.LanaiTargetMachine.o [137/1378] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.Mips16ISelLowering.o [138/1378] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsSelectionDAGInfo.o [139/1378] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXSelectionDAGInfo.o [140/1378] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.Mips16ISelDAGToDAG.o [141/1378] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsOptimizePICCall.o [142/1378] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsModuleISelDAGToDAG.o [143/1378] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsMulMulBugPass.o [144/1378] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsExpandPseudo.o [145/1378] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsFrameLowering.o [146/1378] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsMCInstLower.o [147/1378] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsAsmPrinter.o [148/1378] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsDelaySlotFiller.o [149/1378] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsBranchExpansion.o [150/1378] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXPeephole.o [151/1378] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsRegisterInfo.o [152/1378] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsMachineFunction.o [153/1378] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsConstantIslandPass.o [154/1378] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsLegalizerInfo.o [155/1378] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXFrameLowering.o [156/1378] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsPreLegalizerCombiner.o [157/1378] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonTargetMachine.o [158/1378] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsInstrInfo.o [159/1378] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsSERegisterInfo.o [160/1378] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsISelDAGToDAG.o [161/1378] STAMP obj/llvm/lib/Target/RISCV/RISCVGenGlobalISel.stamp [162/1378] STAMP obj/llvm/lib/Target/RISCV/MCTargetDesc/RISCVGenInstrInfo.stamp [163/1378] STAMP obj/clang-tools-extra/clang-tidy/tool/clang-tidy.inputdeps.stamp [164/1378] STAMP obj/llvm/tools/sancov/sancov.inputdeps.stamp [165/1378] STAMP obj/llvm/tools/llvm-mca/llvm-mca.inputdeps.stamp [166/1378] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsSubtarget.o [167/1378] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsSEFrameLowering.o [168/1378] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsSEInstrInfo.o [169/1378] STAMP obj/llvm/lib/Target/RISCV/MCTargetDesc/MCTargetDesc.inputdeps.stamp [170/1378] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCCTRLoopsVerify.o [171/1378] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsTargetObjectFile.o [172/1378] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXRegisterInfo.o [173/1378] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCBranchCoalescing.o [174/1378] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXSubtarget.o [175/1378] CXX obj/llvm/lib/Target/PowerPC/GISel/LLVMPowerPCCodeGen.PPCCallLowering.o [176/1378] CXX obj/llvm/lib/Target/LoongArch/LLVMLoongArchCodeGen.LoongArchTargetMachine.o [177/1378] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXReplaceImageHandles.o [178/1378] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonVectorCombine.o [179/1378] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCCCState.o [180/1378] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsRegisterBankInfo.o [181/1378] STAMP obj/llvm/lib/Target/RISCV/MCTargetDesc/tablegen.stamp [182/1378] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCEarlyReturn.o [183/1378] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCExpandAtomicPseudoInsts.o [184/1378] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsSEISelDAGToDAG.o [185/1378] ACTION //llvm/lib/Target/RISCV:RISCVGenDAGISel(//llvm/utils/gn/build/toolchain:unix) [186/1378] STAMP obj/llvm/lib/Target/RISCV/RISCVGenDAGISel.stamp [187/1378] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXLowerArgs.o [188/1378] STAMP obj/clang-tools-extra/clangd/refactor/tweaks/tweaks.inputdeps.stamp [189/1378] STAMP obj/bolt/unittests/Core/CoreTests.inputdeps.stamp [190/1378] CXX obj/llvm/lib/Target/LoongArch/LLVMLoongArchCodeGen.LoongArchISelLowering.o [191/1378] CXX obj/llvm/lib/Target/RISCV/MCTargetDesc/MCTargetDesc.RISCVInstPrinter.o [192/1378] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXUtilities.o [193/1378] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsTargetTransformInfo.o [194/1378] STAMP obj/clang-tools-extra/clangd/clangd.inputdeps.stamp [195/1378] STAMP obj/clang-tools-extra/clangd/unittests/ClangdTests.inputdeps.stamp [196/1378] STAMP obj/clang-tools-extra/clangd/tool/clangd.inputdeps.stamp [197/1378] STAMP obj/clang/lib/Tooling/DependencyScanning/DependencyScanning.inputdeps.stamp [198/1378] STAMP obj/clang/tools/c-index-test/c-index-test.inputdeps.stamp [199/1378] STAMP obj/llvm/tools/llvm-lipo/llvm-lipo.inputdeps.stamp [200/1378] STAMP obj/lld/MachO/MachO.inputdeps.stamp [201/1378] CXX obj/llvm/lib/Target/RISCV/MCTargetDesc/MCTargetDesc.RISCVELFObjectWriter.o [202/1378] STAMP obj/llvm/unittests/CodeGen/GlobalISel/GlobalISelTests.inputdeps.stamp [203/1378] STAMP obj/llvm/tools/lto/lto.inputdeps.stamp [204/1378] STAMP obj/clang/tools/libclang/libclang.inputdeps.stamp [205/1378] STAMP obj/clang/tools/driver/clang.inputdeps.stamp [206/1378] STAMP obj/clang/tools/clang-scan-deps/clang-scan-deps.inputdeps.stamp [207/1378] STAMP obj/clang/unittests/Driver/ClangDriverTests.inputdeps.stamp [208/1378] STAMP obj/clang/unittests/Interpreter/ClangReplInterpreterTests.inputdeps.stamp [209/1378] STAMP obj/clang/unittests/Tooling/ToolingTests.inputdeps.stamp [210/1378] STAMP obj/clang/unittests/Tooling/Syntax/SyntaxTests.inputdeps.stamp [211/1378] STAMP obj/lld/ELF/ELF.inputdeps.stamp [212/1378] STAMP obj/llvm/tools/llvm-ml/llvm-ml.inputdeps.stamp [213/1378] STAMP obj/lld/COFF/COFF.inputdeps.stamp [214/1378] STAMP obj/lld/unittests/AsLibELF/LLDAsLibELFTests.inputdeps.stamp [215/1378] STAMP obj/lld/tools/lld/lld.inputdeps.stamp [216/1378] STAMP obj/lldb/source/API/liblldb.inputdeps.stamp [217/1378] STAMP obj/llvm/tools/opt/lib.inputdeps.stamp [218/1378] STAMP obj/lldb/tools/lldb-test/lldb-test.inputdeps.stamp [219/1378] STAMP obj/lldb/tools/driver/lldb.inputdeps.stamp [220/1378] STAMP obj/lldb/tools/lldb-dap/lldb-dap.inputdeps.stamp [221/1378] STAMP obj/llvm/unittests/CGData/CodeGenDataTests.inputdeps.stamp [222/1378] STAMP obj/llvm/unittests/CodeGen/CodeGenTests.inputdeps.stamp [223/1378] STAMP obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.inputdeps.stamp [224/1378] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsFastISel.o [225/1378] CXX obj/llvm/lib/Target/RISCV/MCTargetDesc/MCTargetDesc.RISCVMatInt.o [226/1378] CXX obj/llvm/lib/Target/RISCV/MCTargetDesc/MCTargetDesc.RISCVMCObjectFileInfo.o [227/1378] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCBranchSelector.o [228/1378] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsSEISelLowering.o [229/1378] CXX obj/llvm/lib/Target/RISCV/MCTargetDesc/MCTargetDesc.RISCVMCExpr.o [230/1378] CXX obj/llvm/lib/Target/RISCV/MCTargetDesc/MCTargetDesc.RISCVELFStreamer.o [231/1378] CXX obj/llvm/lib/Target/RISCV/MCA/MCA.RISCVCustomBehaviour.o [232/1378] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsPostLegalizerCombiner.o [233/1378] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCCTRLoops.o [234/1378] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsInstructionSelector.o [235/1378] CXX obj/llvm/lib/Target/PowerPC/AsmParser/AsmParser.PPCAsmParser.o [236/1378] CXX obj/llvm/lib/Target/RISCV/MCTargetDesc/MCTargetDesc.RISCVMCCodeEmitter.o [237/1378] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCMachineScheduler.o [238/1378] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsISelLowering.o [239/1378] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCSelectionDAGInfo.o [240/1378] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXAsmPrinter.o [241/1378] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCHazardRecognizers.o [242/1378] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCBoolRetToInt.o [243/1378] CXX obj/llvm/lib/Target/RISCV/MCTargetDesc/MCTargetDesc.RISCVTargetStreamer.o [244/1378] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCCallingConv.o [245/1378] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXISelDAGToDAG.o [246/1378] CXX obj/llvm/lib/Target/RISCV/MCTargetDesc/MCTargetDesc.RISCVBaseInfo.o [247/1378] CXX obj/llvm/lib/Target/RISCV/MCTargetDesc/MCTargetDesc.RISCVAsmBackend.o [248/1378] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCGenScalarMASSEntries.o [249/1378] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXTargetTransformInfo.o [250/1378] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCMacroFusion.o [251/1378] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCLowerMASSVEntries.o [252/1378] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCMCInstLower.o [253/1378] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCTOCRegDeps.o [254/1378] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCReduceCRLogicals.o [255/1378] CXX obj/llvm/lib/Target/RISCV/Disassembler/Disassembler.RISCVDisassembler.o [256/1378] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCAsmPrinter.o [257/1378] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCVSXCopy.o [258/1378] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXISelLowering.o [259/1378] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsTargetMachine.o [260/1378] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCFastISel.o [261/1378] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCVSXFMAMutate.o [262/1378] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCTLSDynamicCall.o [263/1378] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCVSXSwapRemoval.o [264/1378] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCPreEmitPeephole.o [265/1378] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCFrameLowering.o [266/1378] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCRegisterInfo.o [267/1378] CXX obj/bolt/tools/heatmap/llvm-bolt-heatmap.heatmap.o FAILED: obj/bolt/tools/heatmap/llvm-bolt-heatmap.heatmap.o ../../../chrome/src/third_party/llvm-build/Release+Asserts/bin/clang++ -MMD -MF obj/bolt/tools/heatmap/llvm-bolt-heatmap.heatmap.o.d -o obj/bolt/tools/heatmap/llvm-bolt-heatmap.heatmap.o -c ../../bolt/tools/heatmap/heatmap.cpp -I../../llvm/include -Igen/llvm/include -I../../bolt/include -Igen/bolt/include -O3 -fdiagnostics-color -Wall -Wextra -Wno-unused-parameter -Wdelete-non-virtual-dtor -Wstring-conversion -no-canonical-prefixes -Werror=date-time -fdebug-compilation-dir=. --sysroot=../../sysroot -Wpoison-system-directories -fPIC -Wcovered-switch-default -std=c++17 -fvisibility-inlines-hidden -fno-exceptions -fno-rtti In file included from ../../bolt/tools/heatmap/heatmap.cpp:87: gen/bolt/include/bolt/Core/TargetConfig.def:30:1: error: use of undeclared identifier 'LLVMInitializeNVPTXAsmParser' 30 | BOLT_TARGET(NVPTX) | ^ ../../bolt/tools/heatmap/heatmap.cpp:82:3: note: expanded from macro 'BOLT_TARGET' 82 | LLVMInitialize##target##AsmParser(); \ | ^ :49:1: note: expanded from here 49 | LLVMInitializeNVPTXAsmParser | ^ In file included from ../../bolt/tools/heatmap/heatmap.cpp:87: gen/bolt/include/bolt/Core/TargetConfig.def:30:1: error: use of undeclared identifier 'LLVMInitializeNVPTXDisassembler' ../../bolt/tools/heatmap/heatmap.cpp:83:3: note: expanded from macro 'BOLT_TARGET' 83 | LLVMInitialize##target##Disassembler(); \ | ^ :51:1: note: expanded from here 51 | LLVMInitializeNVPTXDisassembler | ^ 2 errors generated. [268/1378] CXX obj/llvm/lib/Target/Sparc/LLVMSparcCodeGen.DelaySlotFiller.o [269/1378] CXX obj/llvm/lib/Target/PowerPC/GISel/LLVMPowerPCCodeGen.PPCInstructionSelector.o [270/1378] CXX obj/llvm/lib/Target/Sparc/LLVMSparcCodeGen.LeonPasses.o [271/1378] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCMIPeephole.o [272/1378] CXX obj/bolt/unittests/Core/CoreTests.BinaryContext.o FAILED: obj/bolt/unittests/Core/CoreTests.BinaryContext.o ../../../chrome/src/third_party/llvm-build/Release+Asserts/bin/clang++ -MMD -MF obj/bolt/unittests/Core/CoreTests.BinaryContext.o.d -o obj/bolt/unittests/Core/CoreTests.BinaryContext.o -c ../../bolt/unittests/Core/BinaryContext.cpp -DAARCH64_AVAILABLE -DX86_AVAILABLE -DGTEST_HAS_RTTI=0 -I../../llvm/lib/Target/AArch64 -I../../llvm/lib/Target/X86 -I../../llvm/include -Igen/llvm/include -I../../bolt/include -Igen/bolt/include -Igen/llvm/lib/Target/AArch64/MCTargetDesc -Igen/llvm/lib/Target/AArch64/MCTargetDesc -Igen/llvm/lib/Target/AArch64/MCTargetDesc -Igen/llvm/lib/Target/AArch64/Utils -Igen/llvm/lib/Target/X86/MCTargetDesc -Igen/llvm/lib/Target/X86/MCTargetDesc -Igen/llvm/lib/Target/X86/MCTargetDesc -Igen/llvm/lib/Target/X86/MCTargetDesc -I../../third-party/unittest/googlemock/include -I../../third-party/unittest/googletest/include -O3 -fdiagnostics-color -Wall -Wextra -Wno-unused-parameter -Wdelete-non-virtual-dtor -Wstring-conversion -no-canonical-prefixes -Werror=date-time -fdebug-compilation-dir=. --sysroot=../../sysroot -Wpoison-system-directories -fPIC -Wcovered-switch-default -std=c++17 -fvisibility-inlines-hidden -fno-exceptions -fno-rtti In file included from ../../bolt/unittests/Core/BinaryContext.cpp:38: gen/bolt/include/bolt/Core/TargetConfig.def:30:1: error: use of undeclared identifier 'LLVMInitializeNVPTXAsmParser' 30 | BOLT_TARGET(NVPTX) | ^ ../../bolt/unittests/Core/BinaryContext.cpp:33:3: note: expanded from macro 'BOLT_TARGET' 33 | LLVMInitialize##target##AsmParser(); \ | ^ :16:1: note: expanded from here 16 | LLVMInitializeNVPTXAsmParser | ^ In file included from ../../bolt/unittests/Core/BinaryContext.cpp:38: gen/bolt/include/bolt/Core/TargetConfig.def:30:1: error: use of undeclared identifier 'LLVMInitializeNVPTXDisassembler' ../../bolt/unittests/Core/BinaryContext.cpp:34:3: note: expanded from macro 'BOLT_TARGET' 34 | LLVMInitialize##target##Disassembler(); \ | ^ :18:1: note: expanded from here 18 | LLVMInitializeNVPTXDisassembler | ^ 2 errors generated. [273/1378] CXX obj/llvm/lib/Target/RISCV/AsmParser/AsmParser.RISCVAsmParser.o [274/1378] CXX obj/llvm/lib/Target/Sparc/LLVMSparcCodeGen.SparcAsmPrinter.o [275/1378] CXX obj/llvm/lib/Target/Sparc/LLVMSparcCodeGen.SparcFrameLowering.o [276/1378] CXX obj/llvm/lib/Target/Sparc/LLVMSparcCodeGen.SparcISelDAGToDAG.o [277/1378] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXTargetMachine.o [278/1378] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCSubtarget.o [279/1378] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVDeadRegisterDefinitions.o [280/1378] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCInstrInfo.o [281/1378] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVPostRAExpandPseudoInsts.o [282/1378] CXX obj/llvm/lib/Target/RISCV/GISel/LLVMRISCVCodeGen.RISCVRegisterBankInfo.o [283/1378] CXX obj/bolt/tools/driver/llvm-bolt.llvm-bolt.o FAILED: obj/bolt/tools/driver/llvm-bolt.llvm-bolt.o ../../../chrome/src/third_party/llvm-build/Release+Asserts/bin/clang++ -MMD -MF obj/bolt/tools/driver/llvm-bolt.llvm-bolt.o.d -o obj/bolt/tools/driver/llvm-bolt.llvm-bolt.o -c ../../bolt/tools/driver/llvm-bolt.cpp -I../../llvm/include -Igen/llvm/include -I../../bolt/include -Igen/bolt/include -O3 -fdiagnostics-color -Wall -Wextra -Wno-unused-parameter -Wdelete-non-virtual-dtor -Wstring-conversion -no-canonical-prefixes -Werror=date-time -fdebug-compilation-dir=. --sysroot=../../sysroot -Wpoison-system-directories -fPIC -Wcovered-switch-default -std=c++17 -fvisibility-inlines-hidden -fno-exceptions -fno-rtti In file included from ../../bolt/tools/driver/llvm-bolt.cpp:194: gen/bolt/include/bolt/Core/TargetConfig.def:30:1: error: use of undeclared identifier 'LLVMInitializeNVPTXAsmParser' 30 | BOLT_TARGET(NVPTX) | ^ ../../bolt/tools/driver/llvm-bolt.cpp:189:3: note: expanded from macro 'BOLT_TARGET' 189 | LLVMInitialize##target##AsmParser(); \ | ^ :115:1: note: expanded from here 115 | LLVMInitializeNVPTXAsmParser | ^ In file included from ../../bolt/tools/driver/llvm-bolt.cpp:194: gen/bolt/include/bolt/Core/TargetConfig.def:30:1: error: use of undeclared identifier 'LLVMInitializeNVPTXDisassembler' ../../bolt/tools/driver/llvm-bolt.cpp:190:3: note: expanded from macro 'BOLT_TARGET' 190 | LLVMInitialize##target##Disassembler(); \ | ^ :117:1: note: expanded from here 117 | LLVMInitializeNVPTXDisassembler | ^ 2 errors generated. [284/1378] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVIndirectBranchTracking.o [285/1378] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVRedundantCopyElimination.o [286/1378] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCLoopInstrFormPrep.o [287/1378] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVCallingConv.o [288/1378] CXX obj/llvm/lib/Target/RISCV/GISel/LLVMRISCVCodeGen.RISCVCallLowering.o [289/1378] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVExpandAtomicPseudoInsts.o [290/1378] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVInsertReadWriteCSR.o [291/1378] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCTargetMachine.o [292/1378] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVMoveMerger.o [293/1378] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVInsertWriteVXRM.o [294/1378] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVSelectionDAGInfo.o [295/1378] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVMergeBaseOffset.o [296/1378] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVLandingPadSetup.o [297/1378] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVMakeCompressible.o [298/1378] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVExpandPseudoInsts.o [299/1378] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVMachineFunctionInfo.o [300/1378] CXX obj/bolt/unittests/Core/CoreTests.MemoryMaps.o FAILED: obj/bolt/unittests/Core/CoreTests.MemoryMaps.o ../../../chrome/src/third_party/llvm-build/Release+Asserts/bin/clang++ -MMD -MF obj/bolt/unittests/Core/CoreTests.MemoryMaps.o.d -o obj/bolt/unittests/Core/CoreTests.MemoryMaps.o -c ../../bolt/unittests/Core/MemoryMaps.cpp -DAARCH64_AVAILABLE -DX86_AVAILABLE -DGTEST_HAS_RTTI=0 -I../../llvm/lib/Target/AArch64 -I../../llvm/lib/Target/X86 -I../../llvm/include -Igen/llvm/include -I../../bolt/include -Igen/bolt/include -Igen/llvm/lib/Target/AArch64/MCTargetDesc -Igen/llvm/lib/Target/AArch64/MCTargetDesc -Igen/llvm/lib/Target/AArch64/MCTargetDesc -Igen/llvm/lib/Target/AArch64/Utils -Igen/llvm/lib/Target/X86/MCTargetDesc -Igen/llvm/lib/Target/X86/MCTargetDesc -Igen/llvm/lib/Target/X86/MCTargetDesc -Igen/llvm/lib/Target/X86/MCTargetDesc -I../../third-party/unittest/googlemock/include -I../../third-party/unittest/googletest/include -O3 -fdiagnostics-color -Wall -Wextra -Wno-unused-parameter -Wdelete-non-virtual-dtor -Wstring-conversion -no-canonical-prefixes -Werror=date-time -fdebug-compilation-dir=. --sysroot=../../sysroot -Wpoison-system-directories -fPIC -Wcovered-switch-default -std=c++17 -fvisibility-inlines-hidden -fno-exceptions -fno-rtti In file included from ../../bolt/unittests/Core/MemoryMaps.cpp:49: gen/bolt/include/bolt/Core/TargetConfig.def:30:1: error: use of undeclared identifier 'LLVMInitializeNVPTXAsmParser' 30 | BOLT_TARGET(NVPTX) | ^ ../../bolt/unittests/Core/MemoryMaps.cpp:44:3: note: expanded from macro 'BOLT_TARGET' 44 | LLVMInitialize##target##AsmParser(); \ | ^ :124:1: note: expanded from here 124 | LLVMInitializeNVPTXAsmParser | ^ In file included from ../../bolt/unittests/Core/MemoryMaps.cpp:49: gen/bolt/include/bolt/Core/TargetConfig.def:30:1: error: use of undeclared identifier 'LLVMInitializeNVPTXDisassembler' ../../bolt/unittests/Core/MemoryMaps.cpp:45:3: note: expanded from macro 'BOLT_TARGET' 45 | LLVMInitialize##target##Disassembler(); \ | ^ :126:1: note: expanded from here 126 | LLVMInitializeNVPTXDisassembler | ^ 2 errors generated. [301/1378] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVOptWInstrs.o [302/1378] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCTargetTransformInfo.o [303/1378] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVCodeGenPrepare.o [304/1378] CXX obj/llvm/lib/Target/RISCV/MCTargetDesc/MCTargetDesc.RISCVMCTargetDesc.o [305/1378] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVPushPopOptimizer.o [306/1378] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVTargetObjectFile.o [307/1378] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCISelDAGToDAG.o [308/1378] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVInsertVSETVLI.o [309/1378] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVVectorPeephole.o [310/1378] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVVectorMaskDAGMutation.o [311/1378] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVAsmPrinter.o [312/1378] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVFrameLowering.o [313/1378] CXX obj/llvm/lib/Target/RISCV/GISel/LLVMRISCVCodeGen.RISCVLegalizerInfo.o [314/1378] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVSubtarget.o [315/1378] CXX obj/llvm/lib/Target/RISCV/GISel/LLVMRISCVCodeGen.RISCVO0PreLegalizerCombiner.o [316/1378] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVVLOptimizer.o [317/1378] CXX obj/llvm/lib/Target/Sparc/LLVMSparcCodeGen.SparcInstrInfo.o [318/1378] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVGatherScatterLowering.o [319/1378] CXX obj/llvm/lib/Target/RISCV/GISel/LLVMRISCVCodeGen.RISCVPostLegalizerCombiner.o [320/1378] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVVMV0Elimination.o [321/1378] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVRegisterInfo.o [322/1378] CXX obj/bolt/unittests/Core/CoreTests.MCPlusBuilder.o FAILED: obj/bolt/unittests/Core/CoreTests.MCPlusBuilder.o ../../../chrome/src/third_party/llvm-build/Release+Asserts/bin/clang++ -MMD -MF obj/bolt/unittests/Core/CoreTests.MCPlusBuilder.o.d -o obj/bolt/unittests/Core/CoreTests.MCPlusBuilder.o -c ../../bolt/unittests/Core/MCPlusBuilder.cpp -DAARCH64_AVAILABLE -DX86_AVAILABLE -DGTEST_HAS_RTTI=0 -I../../llvm/lib/Target/AArch64 -I../../llvm/lib/Target/X86 -I../../llvm/include -Igen/llvm/include -I../../bolt/include -Igen/bolt/include -Igen/llvm/lib/Target/AArch64/MCTargetDesc -Igen/llvm/lib/Target/AArch64/MCTargetDesc -Igen/llvm/lib/Target/AArch64/MCTargetDesc -Igen/llvm/lib/Target/AArch64/Utils -Igen/llvm/lib/Target/X86/MCTargetDesc -Igen/llvm/lib/Target/X86/MCTargetDesc -Igen/llvm/lib/Target/X86/MCTargetDesc -Igen/llvm/lib/Target/X86/MCTargetDesc -I../../third-party/unittest/googlemock/include -I../../third-party/unittest/googletest/include -O3 -fdiagnostics-color -Wall -Wextra -Wno-unused-parameter -Wdelete-non-virtual-dtor -Wstring-conversion -no-canonical-prefixes -Werror=date-time -fdebug-compilation-dir=. --sysroot=../../sysroot -Wpoison-system-directories -fPIC -Wcovered-switch-default -std=c++17 -fvisibility-inlines-hidden -fno-exceptions -fno-rtti In file included from ../../bolt/unittests/Core/MCPlusBuilder.cpp:48: gen/bolt/include/bolt/Core/TargetConfig.def:30:1: error: use of undeclared identifier 'LLVMInitializeNVPTXAsmParser' 30 | BOLT_TARGET(NVPTX) | ^ ../../bolt/unittests/Core/MCPlusBuilder.cpp:43:3: note: expanded from macro 'BOLT_TARGET' 43 | LLVMInitialize##target##AsmParser(); \ | ^ :24:1: note: expanded from here 24 | LLVMInitializeNVPTXAsmParser | ^ In file included from ../../bolt/unittests/Core/MCPlusBuilder.cpp:48: gen/bolt/include/bolt/Core/TargetConfig.def:30:1: error: use of undeclared identifier 'LLVMInitializeNVPTXDisassembler' ../../bolt/unittests/Core/MCPlusBuilder.cpp:44:3: note: expanded from macro 'BOLT_TARGET' 44 | LLVMInitialize##target##Disassembler(); \ | ^ :26:1: note: expanded from here 26 | LLVMInitializeNVPTXDisassembler | ^ 2 errors generated. [323/1378] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVZacasABIFix.o [324/1378] CXX obj/llvm/lib/Target/RISCV/GISel/LLVMRISCVCodeGen.RISCVPreLegalizerCombiner.o [325/1378] CXX obj/llvm/lib/Target/Sparc/LLVMSparcCodeGen.SparcISelLowering.o [326/1378] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVInstrInfo.o [327/1378] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCISelLowering.o [328/1378] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVTargetTransformInfo.o [329/1378] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVTargetMachine.o [330/1378] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVISelDAGToDAG.o [331/1378] CXX obj/llvm/lib/Target/RISCV/GISel/LLVMRISCVCodeGen.RISCVInstructionSelector.o [332/1378] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVISelLowering.o ninja: build stopped: subcommand failed. Command '['ninja', '-C', 'out/gn']' returned non-zero exit status 1.