gn analyze output:
{
  "compile_targets": [],
  "status": "No dependency",
  "test_targets": []
}
gn analyze input:
{
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    "//llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.fadd-with-ret.ll",
    "//llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.fadd-with-ret.ll",
    "//llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.trig.preop.ll",
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    "//llvm/test/CodeGen/AMDGPU/addrspacecast.r600.ll",
    "//llvm/test/CodeGen/AMDGPU/amdgpu-alias-analysis.ll",
    "//llvm/test/CodeGen/AMDGPU/amdgpu-inline.ll",
    "//llvm/test/CodeGen/AMDGPU/amdgpu-late-codegenprepare.ll",
    "//llvm/test/CodeGen/AMDGPU/amdpal-callable.ll",
    "//llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll",
    "//llvm/test/CodeGen/AMDGPU/attr-amdgpu-num-sgpr.ll",
    "//llvm/test/CodeGen/AMDGPU/dagcombine-setcc-select.ll",
    "//llvm/test/CodeGen/AMDGPU/divergence-at-use.ll",
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    "//llvm/test/CodeGen/AMDGPU/force-alwaysinline-lds-global-address.ll",
    "//llvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll",
    "//llvm/test/CodeGen/AMDGPU/gds-allocation.ll",
    "//llvm/test/CodeGen/AMDGPU/gfx90a-enc.ll",
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    "//llvm/test/CodeGen/AMDGPU/indirect-call-known-callees.ll",
    "//llvm/test/CodeGen/AMDGPU/internalize.ll",
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    "//llvm/test/CodeGen/AMDGPU/loop_break.ll",
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    "//llvm/test/CodeGen/AMDGPU/promote-alloca-globals.ll",
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    "//llvm/test/CodeGen/AMDGPU/promote-alloca-to-lds-constantexpr-use.ll",
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    "//llvm/test/CodeGen/AMDGPU/propagate-waves-per-eu.ll",
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    "//llvm/test/CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll",
    "//llvm/test/CodeGen/AMDGPU/simplify-libcalls2.ll",
    "//llvm/test/CodeGen/AMDGPU/skip-promote-alloca-vector-users.ll",
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    "//llvm/test/CodeGen/AMDGPU/spill-m0.ll",
    "//llvm/test/CodeGen/AMDGPU/split-vector-memoperand-offsets.ll",
    "//llvm/test/CodeGen/AMDGPU/store-clobbers-load.ll",
    "//llvm/test/CodeGen/AMDGPU/sub.i16.ll",
    "//llvm/test/CodeGen/AMDGPU/swdev282079.ll",
    "//llvm/test/CodeGen/AMDGPU/swdev373493.ll",
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    "//mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td",
    "//mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp",
    "//mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp",
    "//mlir/test/Target/LLVMIR/nvvm/tcgen05-ld.mlir",
    "//mlir/test/Target/LLVMIR/nvvm/tcgen05-st.mlir"
  ],
  "test_targets": [
    "//clang-tools-extra/clangd/test:check-clangd",
    "//clang-tools-extra/test:check-clang-tools",
    "//clang/test:check-clang",
    "//compiler-rt/test/hwasan:check-hwasan",
    "//lld/test:check-lld",
    "//llvm/test:check-llvm"
  ],
  "additional_compile_targets": []
}