gn analyze output: { "compile_targets": [], "status": "No dependency", "test_targets": [] } gn analyze input: { "files": [ "//llvm/test/CodeGen/AMDGPU/GlobalISel/add_shl.ll", "//llvm/test/CodeGen/AMDGPU/GlobalISel/andn2.i1.ll", "//llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-asserts.ll", "//llvm/test/CodeGen/AMDGPU/GlobalISel/br-constant-invalid-sgpr-copy.ll", "//llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-imm-chain.ll", "//llvm/test/CodeGen/AMDGPU/GlobalISel/combine-shift-of-shifted-logic.ll", "//llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll", "//llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch-init.gfx.ll", "//llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i32.ll", "//llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i32.ll", "//llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.implicit.ptr.buffer.ll", "//llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memcpy.inline.ll", "//llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-add.s32.mir", "//llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.readfirstlane.mir", "//llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.getpc.mir", "//llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-bitcast.mir", "//llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-brcond.mir", "//llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-build-vector.mir", "//llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-default.mir", "//llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fadd.mir", "//llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-frame-index.mir", "//llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ptr-add.mir", "//llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-split-scalar-load-metadata.mir", "//llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sub.mir", "//llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uitofp.mir", "//llvm/test/CodeGen/AMDGPU/GlobalISel/shlN_add.ll", "//llvm/test/CodeGen/AMDGPU/GlobalISel/trunc.ll", "//llvm/test/CodeGen/AMDGPU/GlobalISel/v_bfe_i32.ll", "//llvm/test/CodeGen/AMDGPU/allow-check.ll", "//llvm/test/CodeGen/AMDGPU/amdgcn-cs-chain-intrinsic-dyn-vgpr-w32.ll", "//llvm/test/CodeGen/AMDGPU/bitop3.ll", "//llvm/test/CodeGen/AMDGPU/invalid-addrspacecast.ll", "//llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wave.id.ll", "//llvm/test/CodeGen/AMDGPU/twoaddr-constrain.ll", "//llvm/test/CodeGen/AMDGPU/wait-before-stores-with-scope_sys.ll" ], "test_targets": [ "//clang-tools-extra/clangd/test:check-clangd", "//clang-tools-extra/test:check-clang-tools", "//clang/test:check-clang", "//compiler-rt/test/hwasan:check-hwasan", "//lld/test:check-lld", "//llvm/test:check-llvm" ], "additional_compile_targets": [] }