INFO:2025-11-17T23:58:27Z:root:pulling...
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   865c92be0334..0f0cf84dba66  main       -> origin/main
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HEAD is now at 0f0cf84dba66 [gn] port 900c51791979 (amdgpu SDNodeInfo)
INFO:2025-11-17T23:58:30Z:root:syncing...
Deleted branch merge (was 62b27ac04704).
Switched to a new branch 'merge'
branch 'merge' set up to track 'origin/main'.
[merge d58745aed8da] [gn build] Port 1425d75c7116
 1 file changed, 2 deletions(-)
[merge d7834a665a3e] [gn build] Port 472e4ab0b02d
 1 file changed, 1 deletion(-)
[merge 52b98935805e] [gn build] Port 49d5bb0ad0cb
 1 file changed, 1 insertion(+)
[gn build] Port 1425d75c7116 -- https://github.com/llvm/llvm-project/commit/1425d75c7116
[gn build] Port 472e4ab0b02d -- https://github.com/llvm/llvm-project/commit/472e4ab0b02d
[gn build] Port 49d5bb0ad0cb -- https://github.com/llvm/llvm-project/commit/49d5bb0ad0cb
INFO:2025-11-17T23:58:33Z:root:building
ninja: Entering directory `out/gn'
[0/1] Regenerating ninja files
[1/2235] ACTION //llvm/tools/sancov:Opts(//llvm/utils/gn/build/toolchain:unix)
[2/2235] ACTION //llvm/tools/llvm-dwp:Opts(//llvm/utils/gn/build/toolchain:unix)
[3/2234] ACTION //llvm/tools/llvm-libtool-darwin:Opts(//llvm/utils/gn/build/toolchain:unix)
[4/2233] ACTION //llvm/tools/llvm-mt:Opts(//llvm/utils/gn/build/toolchain:unix)
[5/2232] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMRegisterInfo.o
[6/2232] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMConstantPoolValue.o
[7/2232] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRSelectionDAGInfo.o
[8/2232] CXX obj/llvm/unittests/Target/AArch64/AArch64Tests.DecomposeStackOffsetTest.o
[9/2232] CXX obj/llvm/tools/verify-uselistorder/verify-uselistorder.verify-uselistorder.o
[10/2232] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRShiftExpand.o
[11/2232] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMOptimizeBarriersPass.o
[12/2232] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRMCInstLower.o
[13/2232] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRFrameLowering.o
[14/2232] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRISelDAGToDAG.o
[15/2232] CXX obj/llvm/unittests/Transforms/Utils/UtilsTests.CodeMoverUtilsTest.o
[16/2232] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRAsmPrinter.o
[17/2232] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMBranchTargets.o
[18/2232] CXX obj/llvm/unittests/Target/AArch64/AArch64Tests.AddressingModes.o
[19/2232] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRSubtarget.o
[20/2232] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMBasicBlockInfo.o
[21/2232] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRRegisterInfo.o
[22/2232] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMRegisterBankInfo.o
[23/2232] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMMachineFunctionInfo.o
[24/2232] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMHazardRecognizer.o
[25/2232] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRISelLowering.o
[26/2232] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.Thumb2ITBlockPass.o
[27/2232] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMMacroFusion.o
[28/2232] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.MVEVPTBlockPass.o
[29/2232] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMFixCortexA57AES1742098Pass.o
[30/2232] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.MLxExpansionPass.o
[31/2232] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMBlockPlacement.o
[32/2232] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMCallingConv.o
[33/2232] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.Thumb1InstrInfo.o
[34/2232] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMLegalizerInfo.o
[35/2232] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.Thumb2InstrInfo.o
[36/2232] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMCallLowering.o
[37/2232] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRTargetObjectFile.o
[38/2232] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMTargetObjectFile.o
[39/2232] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMBaseRegisterInfo.o
[40/2232] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRInstrInfo.o
[41/2232] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRExpandPseudoInsts.o
[42/2232] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMInstrInfo.o
[43/2232] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMLatencyMutations.o
[44/2232] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMMCInstLower.o
[45/2232] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.Thumb2SizeReduction.o
[46/2232] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFASpaceCastSimplifyPass.o
[47/2232] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.MVEGatherScatterLowering.o
[48/2232] CXX obj/llvm/lib/Target/AVR/AsmParser/AsmParser.AVRAsmParser.o
[49/2232] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.MVETPAndVPTOptimisationsPass.o
[50/2232] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ThumbRegisterInfo.o
[51/2232] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.A15SDOptimizer.o
[52/2232] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.MVELaneInterleavingPass.o
[53/2232] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.Thumb1FrameLowering.o
[54/2232] CXX obj/llvm/lib/Target/BPF/GISel/LLVMBPFCodeGen.BPFLegalizerInfo.o
[55/2232] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMSLSHardening.o
[56/2232] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMExpandPseudoInsts.o
[57/2232] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMSelectionDAGInfo.o
[58/2232] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMParallelDSP.o
[59/2232] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFIRPeephole.o
[60/2232] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMLowOverheadLoops.o
[61/2232] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMAsmPrinter.o
[62/2232] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.MVETailPredication.o
[63/2232] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMConstantIslandPass.o
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[71/2232] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFPreserveStaticOffset.o
[72/2232] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMFrameLowering.o
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[74/2232] CXX obj/llvm/lib/Target/ARM/Disassembler/Disassembler.ARMDisassembler.o
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[76/2232] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMTargetMachine.o
[77/2232] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonCFGOptimizer.o
[78/2232] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMLoadStoreOptimizer.o
[79/2232] CXX obj/llvm/lib/Target/Lanai/LLVMLanaiCodeGen.LanaiDelaySlotFiller.o
[80/2232] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.BitTracker.o
[81/2232] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMInstructionSelector.o
[82/2232] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFInstrInfo.o
[83/2232] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMISelDAGToDAG.o
[84/2232] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFMIChecking.o
[85/2232] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonBranchRelaxation.o
[86/2232] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFAsmPrinter.o
[87/2232] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFRegisterInfo.o
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[93/2232] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFISelDAGToDAG.o
[94/2232] CXX obj/llvm/lib/Target/BPF/GISel/LLVMBPFCodeGen.BPFCallLowering.o
[95/2232] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRTargetMachine.o
[96/2232] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFMISimplifyPatchable.o
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[102/2232] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMBaseInstrInfo.o
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[106/2232] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFISelLowering.o
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[108/2232] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonGenMemAbsolute.o
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[110/2232] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonBitTracker.o
[111/2232] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMTargetTransformInfo.o
[112/2232] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFAbstractMemberAccess.o
[113/2232] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFMCInstLower.o
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[117/2232] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonGenPredicate.o
[118/2232] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BTFDebug.o
[119/2232] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonConstPropagation.o
[120/2232] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonOptimizeSZextends.o
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[122/2232] CXX obj/llvm/lib/Target/Lanai/LLVMLanaiCodeGen.LanaiMachineFunctionInfo.o
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[125/2232] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonNewValueJump.o
[126/2232] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonConstExtenders.o
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[133/2232] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonQFPOptimizer.o
[134/2232] CXX obj/llvm/lib/Target/BPF/GISel/LLVMBPFCodeGen.BPFInstructionSelector.o
[135/2232] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonLoadStoreWidening.o
[136/2232] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonSplitConst32AndConst64.o
[137/2232] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonMachineScheduler.o
[138/2232] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonSelectionDAGInfo.o
[139/2232] CXX obj/llvm/lib/Target/Lanai/LLVMLanaiCodeGen.LanaiMCInstLower.o
[140/2232] CXX obj/llvm/lib/Target/Lanai/LLVMLanaiCodeGen.LanaiRegisterInfo.o
[141/2232] CXX obj/llvm/lib/Target/ARM/AsmParser/AsmParser.ARMAsmParser.o
[142/2232] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonRegisterInfo.o
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[146/2232] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonMCInstLower.o
[147/2232] CXX obj/llvm/lib/Target/Lanai/LLVMLanaiCodeGen.LanaiFrameLowering.o
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[150/2232] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonVectorLoopCarriedReuse.o
[151/2232] CXX obj/llvm/lib/Target/Lanai/LLVMLanaiCodeGen.LanaiMemAluCombiner.o
[152/2232] CXX obj/llvm/lib/Target/Lanai/Disassembler/Disassembler.LanaiDisassembler.o
[153/2232] CXX obj/llvm/lib/Target/Lanai/LLVMLanaiCodeGen.LanaiSubtarget.o
[154/2232] CXX obj/llvm/lib/Target/Lanai/LLVMLanaiCodeGen.LanaiInstrInfo.o
[155/2232] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonFrameLowering.o
[156/2232] ACTION //llvm/lib/Target/AMDGPU:AMDGPUGenSDNodeInfo(//llvm/utils/gn/build/toolchain:unix)
[157/2232] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonISelLoweringHVX.o
[158/2232] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonTfrCleanup.o
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[167/2232] CXX obj/llvm/lib/Target/LoongArch/LLVMLoongArchCodeGen.LoongArchDeadRegisterDefinitions.o
[168/2232] CXX obj/llvm/lib/Target/Lanai/AsmParser/AsmParser.LanaiAsmParser.o
[169/2232] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonOptAddrMode.o
[170/2232] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.Mips16RegisterInfo.o
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[172/2232] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonLoopIdiomRecognition.o
[173/2232] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFTargetMachine.o
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[209/2232] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsAsmPrinter.o
[210/2232] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsMCInstLower.o
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[216/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPURemoveIncompatibleFunctions.o
[217/2232] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsInstrInfo.o
[218/2232] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMISelLowering.o
[219/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUUnifyDivergentExitNodes.o
[220/2232] CXX obj/llvm/lib/Target/LoongArch/LLVMLoongArchCodeGen.LoongArchTargetMachine.o
[221/2232] CXX obj/llvm/lib/Target/LoongArch/LLVMLoongArchCodeGen.LoongArchTargetTransformInfo.o
[222/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUSetWavePriority.o
[223/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.GCNILPSched.o
[224/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.GCNMinRegStrategy.o
[225/2232] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsRegisterBankInfo.o
[226/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUReserveWWMRegs.o
[227/2232] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonVectorCombine.o
[228/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIPreAllocateWWMRegs.o
[229/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.GCNCreateVOPD.o
[230/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.GCNDPPCombine.o
[231/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUResourceUsageAnalysis.o
[232/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUWaitSGPRHazards.o
[233/2232] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsFastISel.o
[234/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.GCNRewritePartialRegUses.o
[235/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600OpenCLImageTypeLoweringPass.o
[236/2232] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsInstructionSelector.o
[237/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600ClauseMergePass.o
[238/2232] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsISelLowering.o
[239/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600ExpandSpecialInstrs.o
[240/2232] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsPostLegalizerCombiner.o
[241/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPURewriteAGPRCopyMFMA.o
[242/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUSubtarget.o
[243/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600FrameLowering.o
[244/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600EmitClauseMarkers.o
[245/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600MachineFunctionInfo.o
[246/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.GCNVOPDUtils.o
[247/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600Subtarget.o
[248/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.GCNPreRALongBranchReg.o
[249/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600RegisterInfo.o
[250/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.GCNNSAReassign.o
[251/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600ControlFlowFinalizer.o
[252/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600AsmPrinter.o
[253/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUUniformIntrinsicCombine.o
[254/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.GCNPreRAOptimizations.o
[255/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600MachineScheduler.o
[256/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.GCNIterativeScheduler.o
[257/2232] CXX obj/llvm/lib/Target/LoongArch/LLVMLoongArchCodeGen.LoongArchISelLowering.o
[258/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPURegisterBankInfo.o
[259/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600OptimizeVectorRegisters.o
[260/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUISelLowering.o
[261/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600InstrInfo.o
[262/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600MCInstLower.o
[263/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600MachineCFGStructurizer.o
[264/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600Packetizer.o
[265/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUSwLowerLDS.o
[266/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.GCNSubtarget.o
[267/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIFixVGPRCopies.o
[268/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.GCNRegPressure.o
[269/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIAnnotateControlFlow.o
[270/2232] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXAliasAnalysis.o
[271/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIInsertHardClauses.o
[272/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.GCNHazardRecognizer.o
[273/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIModeRegisterDefaults.o
[274/2232] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXAllocaHoisting.o
[275/2232] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsSelectionDAGInfo.o
[276/2232] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXForwardParams.o
[277/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIModeRegister.o
[278/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIFormMemoryClauses.o
[279/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUSplitModule.o
[280/2232] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXAssignValidGlobalNames.o
[281/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIFixSGPRCopies.o
[282/2232] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXAtomicLower.o
[283/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SILowerI1Copies.o
[284/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SILoadStoreOptimizer.o
[285/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIOptimizeExecMasking.o
[286/2232] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXLowerAlloca.o
[287/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SILowerWWMCopies.o
[288/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIOptimizeExecMaskingPreRA.o
[289/2232] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsSERegisterInfo.o
[290/2232] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXLowerUnreachable.o
[291/2232] CXX obj/llvm/lib/Target/PowerPC/GISel/LLVMPowerPCCodeGen.PPCCallLowering.o
[292/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SILateBranchLowering.o
[293/2232] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXCtorDtorLowering.o
[294/2232] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXImageOptimizer.o
[295/2232] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsSEInstrInfo.o
[296/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIPostRABundler.o
[297/2232] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXProxyRegErasure.o
[298/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIFrameLowering.o
[299/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIPeepholeSDWA.o
[300/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SILowerControlFlow.o
[301/2232] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsSubtarget.o
[302/2232] CXX obj/llvm/lib/Target/PowerPC/GISel/LLVMPowerPCCodeGen.PPCLegalizerInfo.o
[303/2232] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsTargetObjectFile.o
[304/2232] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXGenericToNVVM.o
[305/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIMemoryLegalizer.o
[306/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.GCNSchedStrategy.o
[307/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIFoldOperands.o
[308/2232] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXFrameLowering.o
[309/2232] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXLowerAggrCopies.o
[310/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600TargetTransformInfo.o
[311/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SILowerSGPRSpills.o
[312/2232] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXPrologEpilogPass.o
[313/2232] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXInstrInfo.o
[314/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIMachineScheduler.o
[315/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUTargetTransformInfo.o
[316/2232] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVVMReflect.o
[317/2232] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVVMIntrRange.o
[318/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIInsertWaitcnts.o
[319/2232] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXTagInvariantLoads.o
[320/2232] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsSEISelLowering.o
[321/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIMachineFunctionInfo.o
[322/2232] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCCTRLoopsVerify.o
[323/2232] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsSEFrameLowering.o
[324/2232] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXSelectionDAGInfo.o
[325/2232] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXRegisterInfo.o
[326/2232] CXX obj/llvm/lib/Target/PowerPC/GISel/LLVMPowerPCCodeGen.PPCRegisterBankInfo.o
[327/2232] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXPeephole.o
[328/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIOptimizeVGPRLiveRange.o
[329/2232] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsSEISelDAGToDAG.o
[330/2232] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCBranchCoalescing.o
[331/2232] CXX obj/llvm/lib/Target/NVPTX/MCTargetDesc/MCTargetDesc.NVPTXTargetStreamer.o
[332/2232] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCExpandAtomicPseudoInsts.o
[333/2232] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCEarlyReturn.o
[334/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600ISelLowering.o
[335/2232] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCFastISel.o
FAILED: obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCFastISel.o 
../../../chrome/src/third_party/llvm-build/Release+Asserts/bin/clang++ -MMD -MF obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCFastISel.o.d -o obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCFastISel.o -c ../../llvm/lib/Target/PowerPC/PPCFastISel.cpp  -I../../llvm/lib/Target/PowerPC -I../../llvm/include -Igen/llvm/include -Igen/llvm/lib/Target/PowerPC -I. -Igen/llvm/lib/Target/PowerPC/AsmParser -Igen/llvm/lib/Target/PowerPC/MCTargetDesc -Igen/llvm/include/llvm/IR -O3 -fdiagnostics-color -Wall -Wextra -Wno-unused-parameter -Wdelete-non-virtual-dtor -Wstring-conversion -no-canonical-prefixes -Werror=date-time -fdebug-compilation-dir=. --sysroot=../../sysroot -Wpoison-system-directories -fPIC -Wcovered-switch-default -std=c++17 -fvisibility-inlines-hidden -fno-exceptions -fno-rtti
In file included from ../../llvm/lib/Target/PowerPC/PPCFastISel.cpp:20:
../../llvm/lib/Target/PowerPC/PPCSelectionDAGInfo.h:15:10: fatal error: 'PPCGenSDNodeInfo.inc' file not found
   15 | #include "PPCGenSDNodeInfo.inc"
      |          ^~~~~~~~~~~~~~~~~~~~~~
1 error generated.
[336/2232] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCSelectionDAGInfo.o
FAILED: obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCSelectionDAGInfo.o 
../../../chrome/src/third_party/llvm-build/Release+Asserts/bin/clang++ -MMD -MF obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCSelectionDAGInfo.o.d -o obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCSelectionDAGInfo.o -c ../../llvm/lib/Target/PowerPC/PPCSelectionDAGInfo.cpp  -I../../llvm/lib/Target/PowerPC -I../../llvm/include -Igen/llvm/include -Igen/llvm/lib/Target/PowerPC -I. -Igen/llvm/lib/Target/PowerPC/AsmParser -Igen/llvm/lib/Target/PowerPC/MCTargetDesc -Igen/llvm/include/llvm/IR -O3 -fdiagnostics-color -Wall -Wextra -Wno-unused-parameter -Wdelete-non-virtual-dtor -Wstring-conversion -no-canonical-prefixes -Werror=date-time -fdebug-compilation-dir=. --sysroot=../../sysroot -Wpoison-system-directories -fPIC -Wcovered-switch-default -std=c++17 -fvisibility-inlines-hidden -fno-exceptions -fno-rtti
In file included from ../../llvm/lib/Target/PowerPC/PPCSelectionDAGInfo.cpp:9:
../../llvm/lib/Target/PowerPC/PPCSelectionDAGInfo.h:15:10: fatal error: 'PPCGenSDNodeInfo.inc' file not found
   15 | #include "PPCGenSDNodeInfo.inc"
      |          ^~~~~~~~~~~~~~~~~~~~~~
1 error generated.
[337/2232] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXSubtarget.o
[338/2232] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCMachineFunctionInfo.o
[339/2232] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXLowerArgs.o
[340/2232] ACTION //llvm/lib/Target/Sparc:SparcGenCallingConv(//llvm/utils/gn/build/toolchain:unix)
[341/2232] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXReplaceImageHandles.o
[342/2232] ACTION //llvm/lib/Target/Sparc:SparcGenSDNodeInfo(//llvm/utils/gn/build/toolchain:unix)
[343/2232] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCTargetObjectFile.o
[344/2232] ACTION //llvm/lib/Target/Sparc/Disassembler:SparcGenDisassemblerTables(//llvm/utils/gn/build/toolchain:unix)
[345/2232] ACTION //llvm/lib/Target/Sparc:SparcGenDAGISel(//llvm/utils/gn/build/toolchain:unix)
[346/2232] ACTION //llvm/lib/Target/Sparc/AsmParser:SparcGenAsmMatcher(//llvm/utils/gn/build/toolchain:unix)
[347/2232] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCISelLowering.o
FAILED: obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCISelLowering.o 
../../../chrome/src/third_party/llvm-build/Release+Asserts/bin/clang++ -MMD -MF obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCISelLowering.o.d -o obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCISelLowering.o -c ../../llvm/lib/Target/PowerPC/PPCISelLowering.cpp  -I../../llvm/lib/Target/PowerPC -I../../llvm/include -Igen/llvm/include -Igen/llvm/lib/Target/PowerPC -I. -Igen/llvm/lib/Target/PowerPC/AsmParser -Igen/llvm/lib/Target/PowerPC/MCTargetDesc -Igen/llvm/include/llvm/IR -O3 -fdiagnostics-color -Wall -Wextra -Wno-unused-parameter -Wdelete-non-virtual-dtor -Wstring-conversion -no-canonical-prefixes -Werror=date-time -fdebug-compilation-dir=. --sysroot=../../sysroot -Wpoison-system-directories -fPIC -Wcovered-switch-default -std=c++17 -fvisibility-inlines-hidden -fno-exceptions -fno-rtti
In file included from ../../llvm/lib/Target/PowerPC/PPCISelLowering.cpp:23:
../../llvm/lib/Target/PowerPC/PPCSelectionDAGInfo.h:15:10: fatal error: 'PPCGenSDNodeInfo.inc' file not found
   15 | #include "PPCGenSDNodeInfo.inc"
      |          ^~~~~~~~~~~~~~~~~~~~~~
1 error generated.
[348/2232] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXUtilities.o
[349/2232] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCISelDAGToDAG.o
FAILED: obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCISelDAGToDAG.o 
../../../chrome/src/third_party/llvm-build/Release+Asserts/bin/clang++ -MMD -MF obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCISelDAGToDAG.o.d -o obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCISelDAGToDAG.o -c ../../llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp  -I../../llvm/lib/Target/PowerPC -I../../llvm/include -Igen/llvm/include -Igen/llvm/lib/Target/PowerPC -I. -Igen/llvm/lib/Target/PowerPC/AsmParser -Igen/llvm/lib/Target/PowerPC/MCTargetDesc -Igen/llvm/include/llvm/IR -O3 -fdiagnostics-color -Wall -Wextra -Wno-unused-parameter -Wdelete-non-virtual-dtor -Wstring-conversion -no-canonical-prefixes -Werror=date-time -fdebug-compilation-dir=. --sysroot=../../sysroot -Wpoison-system-directories -fPIC -Wcovered-switch-default -std=c++17 -fvisibility-inlines-hidden -fno-exceptions -fno-rtti
In file included from ../../llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:19:
../../llvm/lib/Target/PowerPC/PPCSelectionDAGInfo.h:15:10: fatal error: 'PPCGenSDNodeInfo.inc' file not found
   15 | #include "PPCGenSDNodeInfo.inc"
      |          ^~~~~~~~~~~~~~~~~~~~~~
1 error generated.
[350/2232] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsTargetTransformInfo.o
[351/2232] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXISelDAGToDAG.o
[352/2232] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCBranchSelector.o
[353/2232] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCCTRLoops.o
[354/2232] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCCallingConv.o
[355/2232] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCSubtarget.o
FAILED: obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCSubtarget.o 
../../../chrome/src/third_party/llvm-build/Release+Asserts/bin/clang++ -MMD -MF obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCSubtarget.o.d -o obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCSubtarget.o -c ../../llvm/lib/Target/PowerPC/PPCSubtarget.cpp  -I../../llvm/lib/Target/PowerPC -I../../llvm/include -Igen/llvm/include -Igen/llvm/lib/Target/PowerPC -I. -Igen/llvm/lib/Target/PowerPC/AsmParser -Igen/llvm/lib/Target/PowerPC/MCTargetDesc -Igen/llvm/include/llvm/IR -O3 -fdiagnostics-color -Wall -Wextra -Wno-unused-parameter -Wdelete-non-virtual-dtor -Wstring-conversion -no-canonical-prefixes -Werror=date-time -fdebug-compilation-dir=. --sysroot=../../sysroot -Wpoison-system-directories -fPIC -Wcovered-switch-default -std=c++17 -fvisibility-inlines-hidden -fno-exceptions -fno-rtti
In file included from ../../llvm/lib/Target/PowerPC/PPCSubtarget.cpp:19:
../../llvm/lib/Target/PowerPC/PPCSelectionDAGInfo.h:15:10: fatal error: 'PPCGenSDNodeInfo.inc' file not found
   15 | #include "PPCGenSDNodeInfo.inc"
      |          ^~~~~~~~~~~~~~~~~~~~~~
1 error generated.
[356/2232] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCBoolRetToInt.o
[357/2232] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCHazardRecognizers.o
[358/2232] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsTargetMachine.o
[359/2232] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXAsmPrinter.o
[360/2232] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCMachineScheduler.o
[361/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600TargetMachine.o
[362/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600ISelDAGToDAG.o
[363/2232] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCMacroFusion.o
[364/2232] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCGenScalarMASSEntries.o
[365/2232] CXX obj/llvm/lib/Target/NVPTX/MCTargetDesc/MCTargetDesc.NVPTXInstPrinter.o
[366/2232] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCMCInstLower.o
[367/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIInstrInfo.o
[368/2232] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCReduceCRLogicals.o
[369/2232] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCTOCRegDeps.o
[370/2232] ACTION //llvm/lib/Target/RISCV/MCTargetDesc:RISCVGenRegisterInfo(//llvm/utils/gn/build/toolchain:unix)
[371/2232] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCVSXWACCCopy.o
[372/2232] ACTION //llvm/lib/Target/RISCV:RISCVGenCompressInstEmitter(//llvm/utils/gn/build/toolchain:unix)
[373/2232] ACTION //llvm/lib/Target/RISCV/MCTargetDesc:RISCVGenMCCodeEmitter(//llvm/utils/gn/build/toolchain:unix)
[374/2232] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCLowerMASSVEntries.o
[375/2232] ACTION //llvm/lib/Target/RISCV/MCTargetDesc:RISCVGenAsmWriter(//llvm/utils/gn/build/toolchain:unix)
[376/2232] ACTION //llvm/lib/Target/RISCV/AsmParser:RISCVGenAsmMatcher(//llvm/utils/gn/build/toolchain:unix)
[377/2232] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCTLSDynamicCall.o
[378/2232] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCFrameLowering.o
[379/2232] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCPreEmitPeephole.o
[380/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUISelDAGToDAG.o
[381/2232] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCAsmPrinter.o
[382/2232] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCVSXFMAMutate.o
[383/2232] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCVSXSwapRemoval.o
[384/2232] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCRegisterInfo.o
[385/2232] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCMIPeephole.o
[386/2232] CXX obj/llvm/lib/Target/PowerPC/AsmParser/AsmParser.PPCAsmParser.o
[387/2232] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXISelLowering.o
[388/2232] ACTION //llvm/lib/Target/RISCV/MCTargetDesc:RISCVGenSearchableTables(//llvm/utils/gn/build/toolchain:unix)
[389/2232] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXTargetTransformInfo.o
[390/2232] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCInstrInfo.o
[391/2232] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCLoopInstrFormPrep.o
[392/2232] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXTargetMachine.o
[393/2232] ACTION //llvm/lib/Target/RISCV/MCTargetDesc:RISCVGenSubtargetInfo(//llvm/utils/gn/build/toolchain:unix)
[394/2232] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIISelLowering.o
[395/2232] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCTargetMachine.o
[396/2232] CXX obj/llvm/lib/Target/PowerPC/GISel/LLVMPowerPCCodeGen.PPCInstructionSelector.o
[397/2232] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCTargetTransformInfo.o
[398/2232] ACTION //llvm/lib/Target/RISCV/MCTargetDesc:RISCVGenInstrInfo(//llvm/utils/gn/build/toolchain:unix)
[399/2213] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUTargetMachine.o
[400/2213] ACTION //llvm/lib/Target/RISCV:RISCVGenDAGISel(//llvm/utils/gn/build/toolchain:unix)
ninja: build stopped: subcommand failed.
Command '['ninja', '-C', 'out/gn']' returned non-zero exit status 1.