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HEAD is now at 0cac3e381dc9 [CodeGen][TII] Delete analyzeSelect hook (#175828)
INFO:2026-02-04T22:15:21Z:root:syncing...
Deleted branch merge (was 66ba9c9475c7).
Switched to a new branch 'merge'
branch 'merge' set up to track 'origin/main'.
INFO:2026-02-04T22:15:21Z:root:building
ninja: Entering directory `out/gn'
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[194/1200] CXX obj/llvm/lib/CodeGen/CodeGen.MachinePipeliner.o
[195/1200] AR lib/libLLVMCodeGen.a
[196/1200] AR lib/libLLVMMIRParser.a
[197/1200] CXX obj/llvm/lib/Target/AArch64/LLVMAArch64CodeGen.AArch64TargetObjectFile.o
[198/1200] AR lib/libLLVMGlobalISel.a
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[201/1200] CXX obj/llvm/unittests/tools/llvm-exegesis/RISCV/LLVMExegesisRISCVTests.SnippetGeneratorTest.o
[202/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUAlwaysInlinePass.o
[203/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUExportClustering.o
[204/1200] CXX obj/llvm/lib/Target/AArch64/LLVMAArch64CodeGen.AArch64LoadStoreOptimizer.o
[205/1200] LINK ./bin/clang-import-test
[206/1200] LINK obj/clang/unittests/CodeGen/ClangCodeGenTests
[207/1200] CXX obj/llvm/lib/Target/AArch64/LLVMAArch64CodeGen.SMEPeepholeOpt.o
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[210/1200] LINK ./bin/lldb-server
[211/1200] CXX obj/llvm/lib/Target/AArch64/GISel/LLVMAArch64CodeGen.AArch64RegisterBankInfo.o
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[225/1200] CXX obj/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.AsmPrinter.o
[226/1200] AR lib/libLLVMAsmPrinter.a
[227/1200] AR lib/libLLVMBOLTTargetAArch64.a
[228/1200] CXX obj/llvm/lib/Target/AArch64/GISel/LLVMAArch64CodeGen.AArch64O0PreLegalizerCombiner.o
[229/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUHSAMetadataStreamer.o
[230/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUCallLowering.o
[231/1200] LINK ./bin/llvm-bat-dump
[232/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUImageIntrinsicOptimizer.o
[233/1200] LINK obj/bolt/unittests/Profile/ProfileTests
[234/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUAsmPrinter.o
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[238/1200] CXX obj/llvm/lib/Target/AArch64/LLVMAArch64CodeGen.AArch64InstrInfo.o
[239/1200] CXX obj/llvm/lib/Target/AArch64/GISel/LLVMAArch64CodeGen.AArch64PostLegalizerCombiner.o
[240/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPULowerIntrinsics.o
[241/1200] CXX obj/llvm/lib/Target/AArch64/AsmParser/AsmParser.AArch64AsmParser.o
[242/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPULowerExecSync.o
[243/1200] AR lib/libLLVMAArch64AsmParser.a
[244/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUMIRFormatter.o
[245/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPULowerKernelArguments.o
[246/1200] CXX obj/llvm/lib/Target/AArch64/GISel/LLVMAArch64CodeGen.AArch64LegalizerInfo.o
[247/1200] CXX obj/llvm/lib/Target/AArch64/GISel/LLVMAArch64CodeGen.AArch64PreLegalizerCombiner.o
[248/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPULateCodeGenPrepare.o
[249/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUCodeGenPrepare.o
[250/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUAttributor.o
[251/1200] CXX obj/llvm/lib/Target/AArch64/LLVMAArch64CodeGen.AArch64ISelDAGToDAG.o
[252/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUMCInstLower.o
[253/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUPreloadKernArgProlog.o
[254/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIFixVGPRCopies.o
[255/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIInsertHardClauses.o
[256/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUPreloadKernelArguments.o
[257/1200] CXX obj/llvm/lib/Target/AArch64/LLVMAArch64CodeGen.AArch64TargetMachine.o
[258/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUInstCombineIntrinsic.o
[259/1200] CXX obj/llvm/lib/Target/AArch64/LLVMAArch64CodeGen.AArch64Subtarget.o
[260/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUPrepareAGPRAlloc.o
[261/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUISelLowering.o
[262/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUPerfHintAnalysis.o
[263/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPULowerModuleLDSPass.o
[264/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIAnnotateControlFlow.o
[265/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUTargetMachine.o
[266/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SILoadStoreOptimizer.o
[267/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIModeRegisterDefaults.o
[268/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SILowerI1Copies.o
[269/1200] CXX obj/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.SelectionDAGBuilder.o
[270/1200] AR lib/libLLVMSelectionDAG.a
[271/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIFixSGPRCopies.o
[272/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIFormMemoryClauses.o
[273/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIModeRegister.o
[274/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SILateBranchLowering.o
[275/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIFrameLowering.o
[276/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUIGroupLP.o
[277/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SILowerWWMCopies.o
[278/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIPostRABundler.o
[279/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPULowerBufferFatPointers.o
[280/1200] CXX obj/llvm/lib/Target/AArch64/LLVMAArch64CodeGen.AArch64TargetTransformInfo.o
[281/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIFoldOperands.o
[282/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIOptimizeExecMasking.o
[283/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIProgramInfo.o
[284/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUPreLegalizerCombiner.o
[285/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SILowerSGPRSpills.o
[286/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SILowerControlFlow.o
[287/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIPeepholeSDWA.o
[288/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUISelDAGToDAG.o
[289/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIOptimizeExecMaskingPreRA.o
[290/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIMemoryLegalizer.o
[291/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIPreEmitPeephole.o
[292/1200] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMBasicBlockInfo.o
[293/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIShrinkInstructions.o
[294/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUPromoteAlloca.o
[295/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUPostLegalizerCombiner.o
[296/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600TargetTransformInfo.o
[297/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIMachineScheduler.o
[298/1200] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMBranchTargets.o
[299/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIMachineFunctionInfo.o
[300/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIOptimizeVGPRLiveRange.o
[301/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIPreAllocateWWMRegs.o
[302/1200] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.A15SDOptimizer.o
[303/1200] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMBlockPlacement.o
[304/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIInsertWaitcnts.o
[305/1200] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMOptimizeBarriersPass.o
[306/1200] CXX obj/llvm/lib/Target/AArch64/GISel/LLVMAArch64CodeGen.AArch64InstructionSelector.o
[307/1200] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMFixCortexA57AES1742098Pass.o
[308/1200] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMCallingConv.o
[309/1200] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMCallLowering.o
[310/1200] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMBaseRegisterInfo.o
[311/1200] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMHazardRecognizer.o
[312/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIWholeQuadMode.o
[313/1200] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMInstrInfo.o
[314/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPULegalizerInfo.o
[315/1200] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMMachineFunctionInfo.o
[316/1200] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMLatencyMutations.o
[317/1200] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMLegalizerInfo.o
[318/1200] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMExpandPseudoInsts.o
[319/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600TargetMachine.o
[320/1200] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMAsmPrinter.o
[321/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIInstrInfo.o
[322/1200] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRFrameLowering.o
[323/1200] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMMacroFusion.o
[324/1200] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMMCInstLower.o
[325/1200] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMRegisterBankInfo.o
[326/1200] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRExpandPseudoInsts.o
[327/1200] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMFastISel.o
[328/1200] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRAsmPrinter.o
[329/1200] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMConstantIslandPass.o
[330/1200] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRISelDAGToDAG.o
[331/1200] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMTargetObjectFile.o
[332/1200] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.MVEVPTBlockPass.o
[333/1200] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMSLSHardening.o
[334/1200] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRRegisterInfo.o
[335/1200] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.MLxExpansionPass.o
[336/1200] CXX obj/llvm/lib/Target/ARM/Disassembler/Disassembler.ARMDisassembler.o
[337/1200] AR lib/libLLVMARMDisassembler.a
[338/1200] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRInstrInfo.o
[339/1200] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.Thumb1InstrInfo.o
[340/1200] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRMCInstLower.o
[341/1200] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRSubtarget.o
[342/1200] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMFrameLowering.o
[343/1200] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.MVELaneInterleavingPass.o
[344/1200] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.Thumb2InstrInfo.o
[345/1200] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.Thumb2ITBlockPass.o
[346/1200] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ThumbRegisterInfo.o
[347/1200] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.MVEGatherScatterLowering.o
[348/1200] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMLowOverheadLoops.o
[349/1200] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMSelectionDAGInfo.o
[350/1200] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMParallelDSP.o
[351/1200] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRTargetObjectFile.o
[352/1200] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.MVETPAndVPTOptimisationsPass.o
[353/1200] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMSubtarget.o
[354/1200] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRISelLowering.o
[355/1200] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.Thumb1FrameLowering.o
[356/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIRegisterInfo.o
[357/1200] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMBaseInstrInfo.o
[358/1200] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.Thumb2SizeReduction.o
[359/1200] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.MVETailPredication.o
[360/1200] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMInstructionSelector.o
[361/1200] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFMIChecking.o
[362/1200] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonCFGOptimizer.o
[363/1200] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMLoadStoreOptimizer.o
[364/1200] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMISelDAGToDAG.o
[365/1200] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFFrameLowering.o
[366/1200] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFInstrInfo.o
[367/1200] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMTargetMachine.o
[368/1200] CXX obj/llvm/lib/Target/Lanai/LLVMLanaiCodeGen.LanaiDelaySlotFiller.o
[369/1200] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFSelectionDAGInfo.o
[370/1200] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFMIPeephole.o
[371/1200] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonBranchRelaxation.o
[372/1200] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFMISimplifyPatchable.o
[373/1200] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFSubtarget.o
[374/1200] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFISelLowering.o
[375/1200] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFAbstractMemberAccess.o
[376/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIISelLowering.o
[377/1200] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFMCInstLower.o
[378/1200] CXX obj/llvm/lib/Target/AArch64/LLVMAArch64CodeGen.AArch64ISelLowering.o
[379/1200] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRTargetMachine.o
[380/1200] AR lib/libLLVMAArch64CodeGen.a
[381/1200] CXX obj/llvm/lib/Target/Lanai/LLVMLanaiCodeGen.LanaiAsmPrinter.o
[382/1200] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonFixupHwLoops.o
[383/1200] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonGenMemAbsolute.o
[384/1200] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFISelDAGToDAG.o
[385/1200] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonBlockRanges.o
[386/1200] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFAsmPrinter.o
[387/1200] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRTargetTransformInfo.o
[388/1200] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonExpandCondsets.o
[389/1200] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonAsmPrinter.o
[390/1200] AR lib/libLLVMAVRCodeGen.a
[391/1200] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFRegisterInfo.o
[392/1200] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonEarlyIfConv.o
[393/1200] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonCopyToCombine.o
[394/1200] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonCopyHoisting.o
[395/1200] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonGenMux.o
[396/1200] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonHazardRecognizer.o
[397/1200] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonGenPredicate.o
[398/1200] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonLoopAlign.o
[399/1200] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMTargetTransformInfo.o
[400/1200] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonBitTracker.o
[401/1200] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonMask.o
[402/1200] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonMachineScheduler.o
[403/1200] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonNewValueJump.o
[404/1200] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonHardwareLoops.o
[405/1200] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonLoadStoreWidening.o
[406/1200] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonBitSimplify.o
[407/1200] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonQFPOptimizer.o
[408/1200] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonMCInstLower.o
[409/1200] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonPeephole.o
[410/1200] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonConstPropagation.o
[411/1200] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonConstExtenders.o
[412/1200] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonSelectionDAGInfo.o
[413/1200] CXX obj/llvm/lib/Target/BPF/GISel/LLVMBPFCodeGen.BPFInstructionSelector.o
[414/1200] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonRegisterInfo.o
[415/1200] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonSplitConst32AndConst64.o
[416/1200] CXX obj/llvm/lib/Target/Lanai/LLVMLanaiCodeGen.LanaiRegisterInfo.o
[417/1200] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonOptAddrMode.o
[418/1200] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonRDFOpt.o
[419/1200] CXX obj/llvm/lib/Target/Lanai/Disassembler/Disassembler.LanaiDisassembler.o
[420/1200] AR lib/libLLVMLanaiDisassembler.a
[421/1200] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonISelLoweringHVX.o
[422/1200] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonVExtract.o
[423/1200] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonGenInsert.o
[424/1200] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonTfrCleanup.o
[425/1200] CXX obj/llvm/lib/Target/Lanai/LLVMLanaiCodeGen.LanaiFrameLowering.o
[426/1200] CXX obj/llvm/lib/Target/Lanai/LLVMLanaiCodeGen.LanaiSubtarget.o
[427/1200] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonVectorPrint.o
[428/1200] CXX obj/llvm/lib/Target/Lanai/LLVMLanaiCodeGen.LanaiInstrInfo.o
[429/1200] CXX obj/llvm/lib/Target/Lanai/LLVMLanaiCodeGen.LanaiISelDAGToDAG.o
[430/1200] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonSubtarget.o
[431/1200] CXX obj/llvm/lib/Target/Lanai/LLVMLanaiCodeGen.LanaiMemAluCombiner.o
[432/1200] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonISelDAGToDAG.o
[433/1200] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonFrameLowering.o
[434/1200] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.Mips16RegisterInfo.o
[435/1200] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonSplitDouble.o
[436/1200] CXX obj/llvm/lib/Target/Lanai/AsmParser/AsmParser.LanaiAsmParser.o
[437/1200] AR lib/libLLVMLanaiAsmParser.a
[438/1200] CXX obj/llvm/lib/Target/LoongArch/LLVMLoongArchCodeGen.LoongArchSubtarget.o
[439/1200] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.Mips16InstrInfo.o
[440/1200] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonISelLowering.o
[441/1200] CXX obj/llvm/lib/Target/LoongArch/LLVMLoongArchCodeGen.LoongArchOptWInstrs.o
[442/1200] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonISelDAGToDAGHVX.o
[443/1200] CXX obj/llvm/lib/Target/LoongArch/LLVMLoongArchCodeGen.LoongArchFrameLowering.o
[444/1200] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonVLIWPacketizer.o
[445/1200] CXX obj/llvm/lib/Target/LoongArch/LLVMLoongArchCodeGen.LoongArchDeadRegisterDefinitions.o
[446/1200] CXX obj/llvm/lib/Target/LoongArch/LLVMLoongArchCodeGen.LoongArchExpandAtomicPseudoInsts.o
[447/1200] CXX obj/llvm/lib/Target/LoongArch/LLVMLoongArchCodeGen.LoongArchRegisterInfo.o
[448/1200] CXX obj/llvm/lib/Target/LoongArch/LLVMLoongArchCodeGen.LoongArchMergeBaseOffset.o
[449/1200] CXX obj/llvm/lib/Target/Lanai/LLVMLanaiCodeGen.LanaiISelLowering.o
[450/1200] CXX obj/llvm/lib/Target/ARM/AsmParser/AsmParser.ARMAsmParser.o
[451/1200] AR lib/libLLVMARMAsmParser.a
[452/1200] CXX obj/llvm/lib/Target/LoongArch/LLVMLoongArchCodeGen.LoongArchExpandPseudoInsts.o
[453/1200] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MicroMipsSizeReduction.o
[454/1200] CXX obj/llvm/lib/Target/LoongArch/LLVMLoongArchCodeGen.LoongArchAsmPrinter.o
[455/1200] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonInstrInfo.o
[456/1200] CXX obj/llvm/lib/Target/LoongArch/LLVMLoongArchCodeGen.LoongArchInstrInfo.o
[457/1200] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.Mips16HardFloat.o
[458/1200] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsCCState.o
[459/1200] CXX obj/llvm/lib/Target/LoongArch/LLVMLoongArchCodeGen.LoongArchISelDAGToDAG.o
[460/1200] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.Mips16FrameLowering.o
[461/1200] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.Mips16ISelLowering.o
[462/1200] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.Mips16ISelDAGToDAG.o
[463/1200] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFTargetMachine.o
[464/1200] AR lib/libLLVMBPFCodeGen.a
[465/1200] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonTargetTransformInfo.o
[466/1200] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsCallLowering.o
[467/1200] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUInstructionSelector.o
[468/1200] AR lib/libLLVMAMDGPUCodeGen.a
[469/1200] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsBranchExpansion.o
[470/1200] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsExpandPseudo.o
[471/1200] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsFrameLowering.o
[472/1200] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsDelaySlotFiller.o
[473/1200] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsAsmPrinter.o
[474/1200] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsConstantIslandPass.o
[475/1200] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsModuleISelDAGToDAG.o
[476/1200] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsMulMulBugPass.o
[477/1200] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsMachineFunction.o
[478/1200] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsISelDAGToDAG.o
[479/1200] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsRegisterInfo.o
[480/1200] CXX obj/llvm/lib/Target/Lanai/LLVMLanaiCodeGen.LanaiTargetMachine.o
[481/1200] AR lib/libLLVMLanaiCodeGen.a
[482/1200] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMISelLowering.o
[483/1200] AR lib/libLLVMARMCodeGen.a
[484/1200] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsOptimizePICCall.o
[485/1200] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsPreLegalizerCombiner.o
[486/1200] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsMCInstLower.o
[487/1200] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsInstrInfo.o
[488/1200] CXX obj/llvm/lib/Target/PowerPC/GISel/LLVMPowerPCCodeGen.PPCCallLowering.o
[489/1200] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsLegalizerInfo.o
[490/1200] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXFrameLowering.o
[491/1200] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonTargetMachine.o
[492/1200] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsSERegisterInfo.o
[493/1200] CXX obj/llvm/lib/Target/LoongArch/LLVMLoongArchCodeGen.LoongArchTargetMachine.o
[494/1200] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXPeephole.o
[495/1200] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsSEInstrInfo.o
[496/1200] CXX obj/llvm/lib/Target/LoongArch/LLVMLoongArchCodeGen.LoongArchTargetTransformInfo.o
[497/1200] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXRegisterInfo.o
[498/1200] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXInstrInfo.o
[499/1200] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCBranchCoalescing.o
[500/1200] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsSubtarget.o
[501/1200] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCEarlyReturn.o
[502/1200] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsSEFrameLowering.o
[503/1200] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXSubtarget.o
[504/1200] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsTargetObjectFile.o
[505/1200] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXReplaceImageHandles.o
[506/1200] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCExpandAtomicPseudoInsts.o
[507/1200] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsFastISel.o
[508/1200] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsSEISelDAGToDAG.o
[509/1200] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsRegisterBankInfo.o
[510/1200] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCCTRLoops.o
[511/1200] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXLowerArgs.o
[512/1200] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXUtilities.o
[513/1200] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCBranchSelector.o
[514/1200] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsSEISelLowering.o
[515/1200] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXDwarfDebug.o
[516/1200] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonVectorCombine.o
[517/1200] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCCallingConv.o
[518/1200] AR lib/libLLVMHexagonCodeGen.a
[519/1200] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCBoolRetToInt.o
[520/1200] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsInstructionSelector.o
[521/1200] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCHazardRecognizers.o
[522/1200] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXISelDAGToDAG.o
[523/1200] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCMacroFusion.o
[524/1200] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsPostLegalizerCombiner.o
[525/1200] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCGenScalarMASSEntries.o
[526/1200] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCLowerMASSVEntries.o
[527/1200] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCTOCRegDeps.o
[528/1200] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsTargetMachine.o
[529/1200] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXAsmPrinter.o
[530/1200] CXX obj/llvm/lib/Target/LoongArch/LLVMLoongArchCodeGen.LoongArchISelLowering.o
[531/1200] AR lib/libLLVMLoongArchCodeGen.a
[532/1200] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCVSXWACCCopy.o
[533/1200] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCMCInstLower.o
[534/1200] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCReduceCRLogicals.o
[535/1200] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCFastISel.o
[536/1200] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsTargetTransformInfo.o
[537/1200] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCPrepareIFuncsOnAIX.o
[538/1200] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCTLSDynamicCall.o
[539/1200] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCPreEmitPeephole.o
[540/1200] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCVSXFMAMutate.o
[541/1200] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsISelLowering.o
[542/1200] AR lib/libLLVMMipsCodeGen.a
[543/1200] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCFrameLowering.o
[544/1200] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCSubtarget.o
[545/1200] CXX obj/llvm/lib/Target/PowerPC/AsmParser/AsmParser.PPCAsmParser.o
[546/1200] AR lib/libLLVMPowerPCAsmParser.a
[547/1200] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCVSXSwapRemoval.o
[548/1200] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVCallingConv.o
[549/1200] CXX obj/llvm/lib/Target/AMDGPU/AsmParser/AsmParser.AMDGPUAsmParser.o
[550/1200] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXTargetTransformInfo.o
[551/1200] AR lib/libLLVMAMDGPUAsmParser.a
[552/1200] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCMIPeephole.o
[553/1200] CXX obj/llvm/lib/Target/RISCV/GISel/LLVMRISCVCodeGen.RISCVRegisterBankInfo.o
[554/1200] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCLoopInstrFormPrep.o
[555/1200] CXX obj/llvm/lib/Target/RISCV/GISel/LLVMRISCVCodeGen.RISCVCallLowering.o
[556/1200] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVDeadRegisterDefinitions.o
[557/1200] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVExpandAtomicPseudoInsts.o
[558/1200] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCRegisterInfo.o
[559/1200] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVFoldMemOffset.o
[560/1200] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVExpandPseudoInsts.o
[561/1200] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCInstrInfo.o
[562/1200] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVCodeGenPrepare.o
[563/1200] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVInsertReadWriteCSR.o
[564/1200] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVPostRAExpandPseudoInsts.o
[565/1200] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVLandingPadSetup.o
[566/1200] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCAsmPrinter.o
[567/1200] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVInsertWriteVXRM.o
[568/1200] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXISelLowering.o
[569/1200] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXTargetMachine.o
[570/1200] AR lib/libLLVMNVPTXCodeGen.a
[571/1200] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVRedundantCopyElimination.o
[572/1200] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVIndirectBranchTracking.o
[573/1200] CXX obj/llvm/lib/Target/RISCV/GISel/LLVMRISCVCodeGen.RISCVLegalizerInfo.o
[574/1200] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVLoadStoreOptimizer.o
[575/1200] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVLateBranchOpt.o
[576/1200] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVFrameLowering.o
[577/1200] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVMachineScheduler.o
[578/1200] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVAsmPrinter.o
[579/1200] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVGatherScatterLowering.o
[580/1200] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVMachineFunctionInfo.o
[581/1200] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVMakeCompressible.o
[582/1200] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVInsertVSETVLI.o
[583/1200] CXX obj/llvm/lib/Target/RISCV/GISel/LLVMRISCVCodeGen.RISCVPostLegalizerCombiner.o
[584/1200] CXX obj/llvm/lib/Target/PowerPC/GISel/LLVMPowerPCCodeGen.PPCInstructionSelector.o
[585/1200] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVMoveMerger.o
[586/1200] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCTargetMachine.o
[587/1200] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVInterleavedAccess.o
[588/1200] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVMergeBaseOffset.o
[589/1200] CXX obj/llvm/lib/Target/RISCV/GISel/LLVMRISCVCodeGen.RISCVO0PreLegalizerCombiner.o
[590/1200] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCTargetTransformInfo.o
[591/1200] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVSelectionDAGInfo.o
[592/1200] CXX obj/llvm/lib/Target/RISCV/GISel/LLVMRISCVCodeGen.RISCVPreLegalizerCombiner.o
[593/1200] CXX obj/llvm/lib/Target/Sparc/LLVMSparcCodeGen.LeonPasses.o
[594/1200] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVOptWInstrs.o
[595/1200] CXX obj/llvm/lib/Target/Sparc/LLVMSparcCodeGen.DelaySlotFiller.o
[596/1200] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVVectorMaskDAGMutation.o
[597/1200] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVVMV0Elimination.o
[598/1200] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVPushPopOptimizer.o
[599/1200] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCISelDAGToDAG.o
[600/1200] CXX obj/llvm/lib/Target/Sparc/LLVMSparcCodeGen.SparcRegisterInfo.o
[601/1200] CXX obj/llvm/lib/Target/Sparc/LLVMSparcCodeGen.SparcTargetMachine.o
[602/1200] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVPromoteConstant.o
[603/1200] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVVSETVLIInfoAnalysis.o
[604/1200] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVTargetObjectFile.o
[605/1200] CXX obj/llvm/lib/Target/Sparc/LLVMSparcCodeGen.SparcSubtarget.o
[606/1200] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVVectorPeephole.o
[607/1200] CXX obj/llvm/lib/Target/Sparc/LLVMSparcCodeGen.SparcISelDAGToDAG.o
[608/1200] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVRegisterInfo.o
[609/1200] CXX obj/llvm/lib/Target/SystemZ/LLVMSystemZCodeGen.SystemZCallingConv.o
[610/1200] CXX obj/llvm/lib/Target/Sparc/LLVMSparcCodeGen.SparcInstrInfo.o
[611/1200] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVVLOptimizer.o
[612/1200] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVZilsdOptimizer.o
[613/1200] CXX obj/llvm/lib/Target/RISCV/MCTargetDesc/MCTargetDesc.RISCVBaseInfo.o
[614/1200] AR lib/libLLVMRISCVDesc.a
[615/1200] CXX obj/llvm/lib/Target/Sparc/LLVMSparcCodeGen.SparcFrameLowering.o
[616/1200] AR lib/libLLVMExegesisRISCV.a
[617/1200] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVZacasABIFix.o
[618/1200] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVSubtarget.o
[619/1200] CXX obj/llvm/lib/Target/Sparc/LLVMSparcCodeGen.SparcAsmPrinter.o
[620/1200] LINK ./bin/llvm-mca
[621/1200] LINK ./bin/llvm-nm
[622/1200] LINK ./bin/llvm-debuginfo-analyzer
[623/1200] CXX obj/llvm/lib/Target/SystemZ/LLVMSystemZCodeGen.SystemZCopyPhysRegs.o
[624/1200] CXX obj/llvm/lib/Target/SystemZ/LLVMSystemZCodeGen.SystemZHazardRecognizer.o
[625/1200] CXX obj/llvm/lib/Target/SystemZ/LLVMSystemZCodeGen.SystemZPostRewrite.o
[626/1200] CXX obj/llvm/lib/Target/SystemZ/LLVMSystemZCodeGen.SystemZLDCleanup.o
[627/1200] CXX obj/llvm/lib/Target/SystemZ/LLVMSystemZCodeGen.SystemZElimCompare.o
[628/1200] CXX obj/llvm/lib/Target/SystemZ/LLVMSystemZCodeGen.SystemZMachineScheduler.o
[629/1200] CXX obj/llvm/lib/Target/SystemZ/LLVMSystemZCodeGen.SystemZSubtarget.o
[630/1200] CXX obj/llvm/lib/Target/SystemZ/LLVMSystemZCodeGen.SystemZLongBranch.o
[631/1200] CXX obj/llvm/lib/Target/SystemZ/LLVMSystemZCodeGen.SystemZShortenInst.o
[632/1200] CXX obj/llvm/lib/Target/SystemZ/LLVMSystemZCodeGen.SystemZInstrInfo.o
[633/1200] CXX obj/llvm/lib/Target/Sparc/LLVMSparcCodeGen.SparcISelLowering.o
[634/1200] CXX obj/llvm/lib/Target/SystemZ/LLVMSystemZCodeGen.SystemZTDC.o
[635/1200] AR lib/libLLVMSparcCodeGen.a
[636/1200] CXX obj/llvm/lib/Target/SystemZ/LLVMSystemZCodeGen.SystemZFrameLowering.o
[637/1200] CXX obj/llvm/lib/Target/SystemZ/LLVMSystemZCodeGen.SystemZSelectionDAGInfo.o
[638/1200] CXX obj/llvm/lib/Target/SystemZ/LLVMSystemZCodeGen.SystemZMCInstLower.o
[639/1200] CXX obj/llvm/lib/Target/WebAssembly/LLVMWebAssemblyCodeGen.WebAssemblyFixBrTableDefaults.o
[640/1200] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVInstrInfo.o
[641/1200] CXX obj/llvm/lib/Target/SystemZ/LLVMSystemZCodeGen.SystemZRegisterInfo.o
[642/1200] CXX obj/llvm/lib/Target/WebAssembly/LLVMWebAssemblyCodeGen.WebAssemblySetP2AlignOperands.o
[643/1200] CXX obj/llvm/lib/Target/SystemZ/LLVMSystemZCodeGen.SystemZAsmPrinter.o
[644/1200] CXX obj/llvm/lib/Target/WebAssembly/LLVMWebAssemblyCodeGen.WebAssemblyDebugFixup.o
[645/1200] CXX obj/llvm/lib/Target/SystemZ/LLVMSystemZCodeGen.SystemZISelDAGToDAG.o
[646/1200] CXX obj/llvm/lib/Target/WebAssembly/LLVMWebAssemblyCodeGen.WebAssemblyFrameLowering.o
[647/1200] CXX obj/llvm/lib/Target/WebAssembly/LLVMWebAssemblyCodeGen.WebAssemblyInstrInfo.o
[648/1200] CXX obj/llvm/lib/Target/WebAssembly/LLVMWebAssemblyCodeGen.WebAssemblyExplicitLocals.o
[649/1200] CXX obj/llvm/lib/Target/WebAssembly/LLVMWebAssemblyCodeGen.WebAssemblyISelDAGToDAG.o
[650/1200] CXX obj/llvm/lib/Target/WebAssembly/LLVMWebAssemblyCodeGen.WebAssemblyLowerRefTypesIntPtrConv.o
[651/1200] CXX obj/llvm/lib/Target/WebAssembly/LLVMWebAssemblyCodeGen.WebAssemblyLateEHPrepare.o
[652/1200] CXX obj/llvm/lib/Target/WebAssembly/LLVMWebAssemblyCodeGen.WebAssemblyFixIrreducibleControlFlow.o
[653/1200] CXX obj/llvm/lib/Target/WebAssembly/LLVMWebAssemblyCodeGen.WebAssemblyLowerBrUnless.o
[654/1200] CXX obj/llvm/lib/Target/WebAssembly/LLVMWebAssemblyCodeGen.WebAssemblySubtarget.o
[655/1200] CXX obj/llvm/lib/Target/WebAssembly/LLVMWebAssemblyCodeGen.WebAssemblySelectionDAGInfo.o
[656/1200] CXX obj/llvm/lib/Target/WebAssembly/LLVMWebAssemblyCodeGen.WebAssemblyRuntimeLibcallSignatures.o
[657/1200] CXX obj/llvm/lib/Target/WebAssembly/LLVMWebAssemblyCodeGen.WebAssemblyReplacePhysRegs.o
[658/1200] CXX obj/llvm/lib/Target/WebAssembly/LLVMWebAssemblyCodeGen.WebAssemblyMCInstLower.o
[659/1200] CXX obj/llvm/lib/Target/WebAssembly/LLVMWebAssemblyCodeGen.WebAssemblyOptimizeLiveIntervals.o
[660/1200] CXX obj/llvm/lib/Target/WebAssembly/LLVMWebAssemblyCodeGen.WebAssemblyFastISel.o
[661/1200] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCISelLowering.o
[662/1200] AR lib/libLLVMPowerPCCodeGen.a
[663/1200] CXX obj/llvm/lib/Target/WebAssembly/LLVMWebAssemblyCodeGen.WebAssemblyRegisterInfo.o
[664/1200] CXX obj/llvm/lib/Target/WebAssembly/LLVMWebAssemblyCodeGen.WebAssemblyPeephole.o
[665/1200] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86AvoidTrailingCall.o
[666/1200] CXX obj/llvm/lib/Target/WebAssembly/LLVMWebAssemblyCodeGen.WebAssemblyMemIntrinsicResults.o
[667/1200] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVTargetTransformInfo.o
[668/1200] CXX obj/llvm/lib/Target/X86/GISel/LLVMX86CodeGen.X86RegisterBankInfo.o
[669/1200] CXX obj/llvm/lib/Target/WebAssembly/LLVMWebAssemblyCodeGen.WebAssemblyMachineFunctionInfo.o
[670/1200] CXX obj/llvm/lib/Target/WebAssembly/LLVMWebAssemblyCodeGen.WebAssemblyUtilities.o
[671/1200] CXX obj/llvm/lib/Target/WebAssembly/LLVMWebAssemblyCodeGen.WebAssemblyAsmPrinter.o
[672/1200] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVISelDAGToDAG.o
[673/1200] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86ArgumentStackSlotRebase.o
[674/1200] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86CmovConversion.o
[675/1200] CXX obj/llvm/lib/Target/SystemZ/LLVMSystemZCodeGen.SystemZTargetMachine.o
[676/1200] CXX obj/llvm/lib/Target/X86/GISel/LLVMX86CodeGen.X86CallLowering.o
[677/1200] CXX obj/llvm/lib/Target/WebAssembly/LLVMWebAssemblyCodeGen.WebAssemblyRegStackify.o
[678/1200] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVTargetMachine.o
[679/1200] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86AvoidStoreForwardingBlocks.o
[680/1200] CXX obj/llvm/lib/Target/WebAssembly/LLVMWebAssemblyCodeGen.WebAssemblyCFGStackify.o
[681/1200] CXX obj/llvm/lib/Target/X86/GISel/LLVMX86CodeGen.X86LegalizerInfo.o
[682/1200] LINK ./bin/llvm-cgdata
[683/1200] LINK ./bin/lli-child-target
[684/1200] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86CallFrameOptimization.o
[685/1200] LINK ./bin/llvm-cfi-verify
[686/1200] LINK ./bin/llvm-dwarfdump
[687/1200] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86CompressEVEX.o
[688/1200] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86FixupInstTuning.o
[689/1200] CXX obj/llvm/lib/Target/SystemZ/LLVMSystemZCodeGen.SystemZTargetTransformInfo.o
[690/1200] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86FixupBWInsts.o
[691/1200] LINK ./bin/llvm-objdump
[692/1200] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86InstrFMA3Info.o
[693/1200] LINK ./bin/llvm-extract
[694/1200] ACTION //llvm/tools/llvm-objdump:llvm-otool(//llvm/utils/gn/build/toolchain:unix)
[695/1200] LINK ./bin/llvm-profgen
[696/1200] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86FixupSetCC.o
[697/1200] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86DomainReassignment.o
[698/1200] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86FastTileConfig.o
[699/1200] CXX obj/llvm/lib/Target/WebAssembly/LLVMWebAssemblyCodeGen.WebAssemblyLowerEmscriptenEHSjLj.o
[700/1200] CXX obj/llvm/lib/Target/WebAssembly/LLVMWebAssemblyCodeGen.WebAssemblyISelLowering.o
[701/1200] LINK obj/llvm/unittests/DWARFLinkerParallel/DWARFLinkerParallelTests
[702/1200] LINK ./bin/sancov
[703/1200] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86DynAllocaExpander.o
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[978/1200] ACTION //llvm/include/llvm/Config:llvm-config(//llvm/utils/gn/build/toolchain:stage2_unix)
[979/1019] ACTION //llvm/include/llvm/Support:write_vcsrevision(//llvm/utils/gn/build/toolchain:stage2_unix)
[980/1019] ACTION //libcxx/src:cxx_linker_script(//llvm/utils/gn/build/toolchain:stage2_unix)
[981/1019] ACTION //llvm/include/llvm/Config:config(//llvm/utils/gn/build/toolchain:stage2_unix)
[982/986] ACTION //compiler-rt/lib/ubsan:version_script(//llvm/utils/gn/build/toolchain:stage2_unix)
[983/986] ACTION //compiler-rt/lib/hwasan:version_script(//llvm/utils/gn/build/toolchain:stage2_unix)
[984/986] LINK ./bin/c-index-test
[985/986] SOLINK lib/clang/23/lib/linux/libclang_rt.ubsan_standalone-x86_64.so
[986/986] SOLINK lib/clang/23/lib/linux/libclang_rt.hwasan_aliases-x86_64.so
INFO:2026-02-04T22:18:41Z:root:analyze
gn analyze output:
{
  "compile_targets": [],
  "status": "Found dependency",
  "test_targets": [
    "//clang-tools-extra/clangd/test:check-clangd",
    "//clang-tools-extra/test:check-clang-tools",
    "//clang/test:check-clang",
    "//compiler-rt/test/hwasan:check-hwasan",
    "//lld/test:check-lld",
    "//llvm/test:check-llvm"
  ]
}
gn analyze input:
{
  "files": [
    "//llvm/include/llvm/CodeGen/TargetInstrInfo.h",
    "//llvm/lib/CodeGen/PeepholeOptimizer.cpp",
    "//llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp",
    "//llvm/lib/Target/ARM/ARMBaseInstrInfo.h",
    "//llvm/lib/Target/Lanai/LanaiInstrInfo.cpp",
    "//llvm/lib/Target/Lanai/LanaiInstrInfo.h",
    "//llvm/lib/Target/RISCV/RISCVInstrInfo.cpp",
    "//llvm/lib/Target/RISCV/RISCVInstrInfo.h"
  ],
  "test_targets": [
    "//clang-tools-extra/clangd/test:check-clangd",
    "//clang-tools-extra/test:check-clang-tools",
    "//clang/test:check-clang",
    "//compiler-rt/test/hwasan:check-hwasan",
    "//lld/test:check-lld",
    "//llvm/test:check-llvm"
  ],
  "additional_compile_targets": []
}
running all tests due to change to blacklisted file
INFO:2026-02-04T22:18:41Z:root:testing
INFO:2026-02-04T22:18:41Z:root:test check-clang
ninja: Entering directory `out/gn'
[0/1] ACTION //clang/test:check-clang(//llvm/utils/gn/build/toolchain:unix)
llvm-lit: /usr/local/google/home/thakis/src/llvm-project/llvm/utils/lit/lit/llvm/config.py:561: note: using clang: /usr/local/google/home/thakis/src/llvm-project/out/gn/bin/clang
llvm-lit: /usr/local/google/home/thakis/src/llvm-project/llvm/utils/lit/lit/llvm/subst.py:126: note: Did not find cir-opt in /usr/local/google/home/thakis/src/llvm-project/out/gn/bin:/usr/local/google/home/thakis/src/llvm-project/out/gn/bin
llvm-lit: /usr/local/google/home/thakis/src/llvm-project/llvm/utils/lit/lit/llvm/config.py:561: note: using ld.lld: /usr/local/google/home/thakis/src/llvm-project/out/gn/bin/ld.lld
llvm-lit: /usr/local/google/home/thakis/src/llvm-project/llvm/utils/lit/lit/llvm/config.py:561: note: using lld-link: /usr/local/google/home/thakis/src/llvm-project/out/gn/bin/lld-link
llvm-lit: /usr/local/google/home/thakis/src/llvm-project/llvm/utils/lit/lit/llvm/config.py:561: note: using ld64.lld: /usr/local/google/home/thakis/src/llvm-project/out/gn/bin/ld64.lld
llvm-lit: /usr/local/google/home/thakis/src/llvm-project/llvm/utils/lit/lit/llvm/config.py:561: note: using wasm-ld: /usr/local/google/home/thakis/src/llvm-project/out/gn/bin/wasm-ld
-- Testing: 24863 tests, 64 workers --
Testing:  0.. 10.. 20.. 30.. 40.. 50.. 60.. 70.. 80.. 90.. 

Testing Time: 159.66s

Total Discovered Tests: 50332
  Skipped          :    28 (0.06%)
  Unsupported      :   757 (1.50%)
  Passed           : 49520 (98.39%)
  Expectedly Failed:    27 (0.05%)
INFO:2026-02-04T22:21:36Z:root:test check-clang-tools
ninja: Entering directory `out/gn'
[0/1] ACTION //clang-tools-extra/test:check-clang-tools(//llvm/utils/gn/build/toolchain:unix)
-- Testing: 1319 tests, 64 workers --
Testing:  0.. 10.. 20.. 30.. 40.. 50.. 60.. 70.. 80.. 90.. 

Testing Time: 8.77s

Total Discovered Tests: 1564
  Unsupported      :    2 (0.13%)
  Passed           : 1561 (99.81%)
  Expectedly Failed:    1 (0.06%)
INFO:2026-02-04T22:21:48Z:root:test check-clangd
ninja: Entering directory `out/gn'
[0/1] ACTION //clang-tools-extra/clangd/test:check-clangd(//llvm/utils/gn/build/toolchain:unix)
-- Testing: 177 tests, 64 workers --
Testing:  0.. 10.. 20.. 30.. 40.. 50.. 60.. 70.. 80.. 90..

Testing Time: 4.76s

Total Discovered Tests: 1447
  Unsupported:    7 (0.48%)
  Passed     : 1440 (99.52%)
INFO:2026-02-04T22:21:54Z:root:test check-hwasan
ninja: Entering directory `out/gn'
[0/1] ACTION //compiler-rt/test/hwasan:check-hwasan(//llvm/utils/gn/build/toolchain:unix)
-- Testing: 111 tests, 64 workers --
Testing:  0.. 10.. 20.. 30.. 40.. 50.. 60.. 70.. 80.. 90.. 

Testing Time: 6.02s

Total Discovered Tests: 111
  Unsupported      : 37 (33.33%)
  Passed           : 65 (58.56%)
  Expectedly Failed:  9 (8.11%)
INFO:2026-02-04T22:22:01Z:root:test check-lld
ninja: Entering directory `out/gn'
[0/1] ACTION //lld/test:check-lld(//llvm/utils/gn/build/toolchain:unix)
llvm-lit: /usr/local/google/home/thakis/src/llvm-project/llvm/utils/lit/lit/llvm/config.py:561: note: using ld.lld: /usr/local/google/home/thakis/src/llvm-project/out/gn/bin/ld.lld
llvm-lit: /usr/local/google/home/thakis/src/llvm-project/llvm/utils/lit/lit/llvm/config.py:561: note: using lld-link: /usr/local/google/home/thakis/src/llvm-project/out/gn/bin/lld-link
llvm-lit: /usr/local/google/home/thakis/src/llvm-project/llvm/utils/lit/lit/llvm/config.py:561: note: using ld64.lld: /usr/local/google/home/thakis/src/llvm-project/out/gn/bin/ld64.lld
llvm-lit: /usr/local/google/home/thakis/src/llvm-project/llvm/utils/lit/lit/llvm/config.py:561: note: using wasm-ld: /usr/local/google/home/thakis/src/llvm-project/out/gn/bin/wasm-ld
-- Testing: 3181 tests, 64 workers --
Testing:  0.. 10.. 20.. 30.. 40.. 50.. 60.. 70.. 80.. 90..

Testing Time: 14.32s

Total Discovered Tests: 3181
  Unsupported      :   22 (0.69%)
  Passed           : 3158 (99.28%)
  Expectedly Failed:    1 (0.03%)
INFO:2026-02-04T22:22:17Z:root:test check-llvm
ninja: Entering directory `out/gn'
[0/1] ACTION //llvm/test:check-llvm(//llvm/utils/gn/build/toolchain:unix)
llvm-lit: /usr/local/google/home/thakis/src/llvm-project/llvm/utils/lit/lit/llvm/config.py:561: note: using ld.lld: /usr/local/google/home/thakis/src/llvm-project/out/gn/bin/ld.lld
llvm-lit: /usr/local/google/home/thakis/src/llvm-project/llvm/utils/lit/lit/llvm/config.py:561: note: using lld-link: /usr/local/google/home/thakis/src/llvm-project/out/gn/bin/lld-link
llvm-lit: /usr/local/google/home/thakis/src/llvm-project/llvm/utils/lit/lit/llvm/config.py:561: note: using ld64.lld: /usr/local/google/home/thakis/src/llvm-project/out/gn/bin/ld64.lld
llvm-lit: /usr/local/google/home/thakis/src/llvm-project/llvm/utils/lit/lit/llvm/config.py:561: note: using wasm-ld: /usr/local/google/home/thakis/src/llvm-project/out/gn/bin/wasm-ld
-- Testing: 63609 tests, 64 workers --
Testing:  0.. 10.. 20.. 30.. 40.. 50.. 60.. 70.. 80.. 90..

Testing Time: 189.81s

Total Discovered Tests: 71839
  Skipped          :    20 (0.03%)
  Unsupported      :  2647 (3.68%)
  Passed           : 68998 (96.05%)
  Expectedly Failed:   174 (0.24%)
INFO:2026-02-04T22:25:50Z:root:done