ninja: Entering directory `out/gn'
[0/1] Regenerating ninja files
[1/4445] ACTION //lldb/include/lldb/Host:Config(//llvm/utils/gn/build/toolchain:unix)
FAILED: gen/lldb/include/lldb/Host/Config.h 
python3 ../../llvm/utils/gn/build/write_cmake_config.py -o gen/lldb/include/lldb/Host/Config.h ../../lldb/include/lldb/Host/Config.h.cmake LLDB_EDITLINE_USE_WCHAR= LLDB_HAVE_EL_RFUNC_T= HAVE_PTSNAME_R= HAVE_NR_PROCESS_VM_READV= LLDB_ENABLE_LZMA= LLDB_ENABLE_CURSES= CURSES_HAVE_NCURSES_CURSES_H= LLDB_ENABLE_LUA= LLDB_ENABLE_PYTHON= LLDB_ENABLE_FBSDVMCORE= LLDB_ENABLE_PYTHON_LIMITED_API= LLDB_ENABLE_TREESITTER= LLDB_EMBED_PYTHON_HOME= LLDB_INSTALL_LIBDIR_BASENAME=lib LLDB_GLOBAL_INIT_DIRECTORY= LLDB_PYTHON_HOME= LLDB_BUG_REPORT_URL=https://github.com/llvm/llvm-project/issues/ HAVE_LIBCOMPRESSION= LLDB_ENABLE_LIBEDIT= LLDB_ENABLE_LIBXML2=1 LLDB_ENABLE_POSIX=1 LLDB_ENABLE_TERMIOS=1 LLVM_ENABLE_CURL= HAVE_SYS_EVENT_H= HAVE_PPOLL=1 HAVE_PROCESS_VM_READV=1
unused values args:
    LLDB_ENABLE_FBSDVMCORE
[2/4445] CXX obj/llvm/lib/Target/AMDGPU/Utils/Utils.AMDGPUDelayedMCExpr.o
[3/4445] CXX obj/llvm/lib/Target/ARM/MCTargetDesc/MCTargetDesc.ARMELFObjectWriter.o
[4/4445] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMConstantPoolValue.o
[5/4445] CXX obj/llvm/lib/Target/AMDGPU/Utils/Utils.AMDGPUPALMetadata.o
[6/4445] CXX obj/llvm/lib/Target/ARM/MCTargetDesc/MCTargetDesc.ARMELFStreamer.o
[7/4445] CXX obj/llvm/lib/Target/AMDGPU/Utils/Utils.AMDKernelCodeTUtils.o
[8/4445] CXX obj/llvm/lib/Target/ARM/MCTargetDesc/MCTargetDesc.ARMAsmBackend.o
[9/4445] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMBasicBlockInfo.o
[10/4445] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIModeRegisterDefaults.o
[11/4445] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIProgramInfo.o
[12/4445] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIModeRegister.o
[13/4445] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIFixVGPRCopies.o
[14/4445] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIInsertHardClauses.o
[15/4445] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIPostRABundler.o
[16/4445] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIShrinkInstructions.o
[17/4445] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMBranchTargets.o
[18/4445] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIOptimizeExecMasking.o
[19/4445] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIOptimizeExecMaskingPreRA.o
[20/4445] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIPreEmitPeephole.o
[21/4445] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIPeepholeSDWA.o
[22/4445] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMFixCortexA57AES1742098Pass.o
[23/4445] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIAnnotateControlFlow.o
[24/4445] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SILowerI1Copies.o
[25/4445] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SILoadStoreOptimizer.o
[26/4445] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMHazardRecognizer.o
[27/4445] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMBlockPlacement.o
[28/4445] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.A15SDOptimizer.o
[29/4445] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SILowerWWMCopies.o
[30/4445] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMCallLowering.o
[31/4445] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMInstrInfo.o
[32/4445] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMCallingConv.o
[33/4445] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIMemoryLegalizer.o
[34/4445] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMLatencyMutations.o
[35/4445] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SILateBranchLowering.o
[36/4445] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMBaseRegisterInfo.o
[37/4445] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIFormMemoryClauses.o
[38/4445] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIPreAllocateWWMRegs.o
[39/4445] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMLegalizerInfo.o
[40/4445] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIOptimizeVGPRLiveRange.o
[41/4445] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMMCInstLower.o
[42/4445] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SILowerSGPRSpills.o
[43/4445] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIFrameLowering.o
[44/4445] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIFixSGPRCopies.o
[45/4445] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIMachineScheduler.o
[46/4445] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SILowerControlFlow.o
[47/4445] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIFoldOperands.o
[48/4445] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMLowOverheadLoops.o
[49/4445] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIMachineFunctionInfo.o
[50/4445] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMExpandPseudoInsts.o
[51/4445] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIWholeQuadMode.o
[52/4445] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMConstantIslandPass.o
[53/4445] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMAsmPrinter.o
[54/4445] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMFastISel.o
[55/4445] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMFrameLowering.o
[56/4445] CXX obj/llvm/lib/Target/ARM/Disassembler/Disassembler.ARMDisassembler.o
[57/4445] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMLoadStoreOptimizer.o
[58/4445] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMInstructionSelector.o
[59/4445] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIRegisterInfo.o
[60/4445] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMISelDAGToDAG.o
[61/4445] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIInsertWaitcnts.o
[62/4445] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMBaseInstrInfo.o
[63/4445] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIInstrInfo.o
[64/4445] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIISelLowering.o
[65/4445] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMISelLowering.o
[66/4445] CXX obj/llvm/lib/Target/AMDGPU/Disassembler/Disassembler.AMDGPUDisassembler.o
ninja: build stopped: subcommand failed.
Command '['ninja', '-C', 'out/gn']' returned non-zero exit status 1.