gn analyze output:
{
  "compile_targets": [],
  "status": "Found dependency",
  "test_targets": [
    "//clang-tools-extra/clangd/test:check-clangd",
    "//clang-tools-extra/test:check-clang-tools",
    "//clang/test:check-clang",
    "//compiler-rt/test/hwasan:check-hwasan",
    "//lld/test:check-lld",
    "//llvm/test:check-llvm"
  ]
}
gn analyze input:
{
  "files": [
    "//llvm/include/llvm/Support/InstructionCost.h",
    "//llvm/lib/Support/InstructionCost.cpp",
    "//llvm/test/Analysis/LoopCacheAnalysis/PowerPC/LoopnestFixedSize.ll",
    "//llvm/test/Analysis/LoopCacheAnalysis/interchange-refcost-overflow.ll",
    "//llvm/test/Transforms/LoopVectorize/AArch64/call-costs.ll",
    "//llvm/test/Transforms/LoopVectorize/ARM/scalar-block-cost.ll",
    "//llvm/test/Transforms/LoopVectorize/RISCV/predicated-costs.ll",
    "//llvm/test/Transforms/LoopVectorize/SystemZ/branch-for-predicated-block.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/gather-i16-with-i8-index.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/gather-i32-with-i8-index.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/gather-i64-with-i8-index.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/gather-i8-with-i8-index.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/handle-iptr-with-data-layout-to-not-assert.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-2.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-3.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-4.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-5.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-6.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-7.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-8.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-2.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-3.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-4.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-5.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-6.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-7.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-8.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-half.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-2.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-3.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-4.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-5.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-6.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-7.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-8.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-2-indices-0u.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-2.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-3-indices-01u.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-3-indices-0uu.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-3.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-4-indices-012u.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-4-indices-01uu.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-4-indices-0uuu.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-4.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-5.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-6.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-7.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-8.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-2.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-3.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-4.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-5.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-6.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-7.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-8.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-2.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-3.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-4.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-5.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-6.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-7.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-8.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-2.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-3.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-4.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-5.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-6.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-7.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-8.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-2.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-3.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-4.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-5.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-6.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-7.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-8.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-2.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-3.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-4.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-5.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-6.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-7.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-8.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-2.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-3.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-4.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-5.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-6.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-7.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-8.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-2.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-3.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-4.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-5.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-6.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-7.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-8.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-2.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-3.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-4.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-5.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-6.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-7.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-8.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-gather-i32-with-i8-index.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-gather-i64-with-i8-index.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-interleaved-load-i16.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-interleaved-store-i16.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-load-i16.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-load-i32.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-load-i64.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-load-i8.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-scatter-i32-with-i8-index.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-scatter-i64-with-i8-index.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-store-i16.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-store-i32.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-store-i64.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-store-i8.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/scatter-i16-with-i8-index.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/scatter-i32-with-i8-index.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/scatter-i64-with-i8-index.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/CostModel/scatter-i8-with-i8-index.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/cost-model-i386.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll",
    "//llvm/test/Transforms/LoopVectorize/X86/predicate-switch.ll",
    "//llvm/unittests/Support/InstructionCostTest.cpp"
  ],
  "test_targets": [
    "//clang-tools-extra/clangd/test:check-clangd",
    "//clang-tools-extra/test:check-clang-tools",
    "//clang/test:check-clang",
    "//compiler-rt/test/hwasan:check-hwasan",
    "//lld/test:check-lld",
    "//llvm/test:check-llvm"
  ],
  "additional_compile_targets": []
}
running all tests due to change to blacklisted file