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[1/744] COPY ../../libcxxabi/include/cxxabi.h include/c++/v1/cxxabi.h
[2/744] COPY ../../libcxxabi/include/__cxxabi_config.h include/c++/v1/__cxxabi_config.h
[3/744] ACTION //libcxx/include:copy_headers(//llvm/utils/gn/build/toolchain:unix)
[4/744] ACTION //llvm/tools/llvm-exegesis/lib/AArch64:AArch64GenExegesis(//llvm/utils/gn/build/toolchain:unix)
[5/744] ACTION //llvm/include/llvm/TargetParser:AArch64TargetParserDef(//llvm/utils/gn/build/toolchain:unix)
[6/598] ACTION //llvm/lib/Target/AArch64:AArch64GenSDNodeInfo(//llvm/utils/gn/build/toolchain:unix)
[7/597] ACTION //llvm/lib/Target/AArch64:AArch64GenMCPseudoLowering(//llvm/utils/gn/build/toolchain:unix)
[8/597] ACTION //llvm/lib/Target/AArch64:AArch64GenO0PreLegalizeGICombiner(//llvm/utils/gn/build/toolchain:unix)
[9/597] ACTION //llvm/lib/Target/AArch64:AArch64GenPreLegalizeGICombiner(//llvm/utils/gn/build/toolchain:unix)
[10/597] ACTION //llvm/lib/Target/AArch64/MCTargetDesc:AArch64GenMCCodeEmitter(//llvm/utils/gn/build/toolchain:unix)
[11/597] ACTION //llvm/lib/Target/AArch64:AArch64GenPostLegalizeGILowering(//llvm/utils/gn/build/toolchain:unix)
[12/597] ACTION //llvm/lib/Target/AArch64/Disassembler:AArch64GenDisassemblerTables(//llvm/utils/gn/build/toolchain:unix)
[13/597] ACTION //llvm/lib/Target/AArch64:AArch64GenRegisterBank(//llvm/utils/gn/build/toolchain:unix)
[14/597] ACTION //llvm/lib/Target/AArch64:AArch64GenCallingConv(//llvm/utils/gn/build/toolchain:unix)
[15/597] ACTION //llvm/lib/Target/AArch64/MCTargetDesc:AArch64GenAsmWriter(//llvm/utils/gn/build/toolchain:unix)
[16/597] ACTION //llvm/lib/Target/AArch64:AArch64GenPostLegalizeGICombiner(//llvm/utils/gn/build/toolchain:unix)
[17/597] ACTION //llvm/lib/Target/AArch64/MCTargetDesc:AArch64GenAsmWriter1(//llvm/utils/gn/build/toolchain:unix)
[18/597] ACTION //llvm/lib/Target/AArch64/Utils:AArch64GenSystemOperands(//llvm/utils/gn/build/toolchain:unix)
[19/597] ACTION //llvm/lib/Target/AArch64/MCTargetDesc:AArch64GenRegisterInfo(//llvm/utils/gn/build/toolchain:unix)
[20/597] ACTION //llvm/lib/Target/AArch64/AsmParser:AArch64GenAsmMatcher(//llvm/utils/gn/build/toolchain:unix)
[21/597] ACTION //llvm/lib/Target/AArch64:AArch64GenFastISel(//llvm/utils/gn/build/toolchain:unix)
[22/597] ACTION //llvm/lib/Target/AArch64:AArch64GenGlobalISel(//llvm/utils/gn/build/toolchain:unix)
[23/597] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCMachineScheduler.o
[24/597] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonMachineScheduler.o
[25/597] ACTION //llvm/lib/Target/AArch64:AArch64GenDAGISel(//llvm/utils/gn/build/toolchain:unix)
[26/597] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600MachineScheduler.o
[27/597] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVFoldMemOffset.o
[28/597] CXX obj/llvm/lib/CodeGen/CodeGen.VLIWMachineScheduler.o
[29/597] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVDeadRegisterDefinitions.o
[30/597] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonSubtarget.o
[31/597] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCSubtarget.o
[32/597] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.GCNVOPDUtils.o
[33/597] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVLateBranchOpt.o
[34/597] CXX obj/llvm/lib/Target/RISCV/GISel/LLVMRISCVCodeGen.RISCVRegisterBankInfo.o
[35/597] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.GCNCreateVOPD.o
[36/597] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVInsertReadWriteCSR.o
[37/597] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUCoExecSchedStrategy.o
[38/597] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVInsertWriteVXRM.o
[39/597] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVLandingPadSetup.o
[40/597] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVCallingConv.o
[41/597] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVExpandAtomicPseudoInsts.o
[42/597] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVMakeCompressible.o
[43/597] CXX obj/llvm/lib/Target/RISCV/GISel/LLVMRISCVCodeGen.RISCVCallLowering.o
[44/597] CXX obj/llvm/lib/CodeGen/CodeGen.WindowScheduler.o
[45/597] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVMachineScheduler.o
[46/597] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMMacroFusion.o
[47/597] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVLoadStoreOptimizer.o
[48/597] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVCodeGenPrepare.o
[49/597] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVIndirectBranchTracking.o
[50/597] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVInsertVSETVLI.o
[51/597] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMLatencyMutations.o
[52/597] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVMergeBaseOffset.o
[53/597] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVExpandPseudoInsts.o
[54/597] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUSubtarget.o
[55/597] CXX obj/llvm/lib/CodeGen/CodeGen.TargetInstrInfo.o
[56/597] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIMachineScheduler.o
[57/597] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVMachineFunctionInfo.o
[58/597] CXX obj/llvm/lib/Passes/Passes.CodeGenPassBuilder.o
[59/597] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.GCNIterativeScheduler.o
[60/597] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVInterleavedAccess.o
[61/597] CXX obj/llvm/lib/Target/RISCV/GISel/LLVMRISCVCodeGen.RISCVLegalizerInfo.o
[62/597] CXX obj/llvm/lib/Target/RISCV/GISel/LLVMRISCVCodeGen.RISCVO0PreLegalizerCombiner.o
[63/597] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVGatherScatterLowering.o
[64/597] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.GCNSubtarget.o
[65/597] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVMoveMerger.o
[66/597] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVFrameLowering.o
[67/597] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVAsmPrinter.o
[68/597] CXX obj/llvm/lib/Target/RISCV/GISel/LLVMRISCVCodeGen.RISCVPostLegalizerCombiner.o
[69/597] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVSelectionDAGInfo.o
[70/597] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCTargetMachine.o
[71/597] CXX obj/llvm/lib/CodeGen/CodeGen.MachineScheduler.o
[72/597] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVPushPopOptimizer.o
[73/597] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonTargetMachine.o
[74/597] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVPromoteConstant.o
[75/597] CXX obj/llvm/lib/Target/SystemZ/LLVMSystemZCodeGen.SystemZHazardRecognizer.o
[76/597] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVVSETVLIInfoAnalysis.o
[77/597] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVInstrInfo.o
[78/597] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVVectorMaskDAGMutation.o
[79/597] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVOptWInstrs.o
[80/597] CXX obj/llvm/lib/Target/SystemZ/LLVMSystemZCodeGen.SystemZMachineScheduler.o
[81/597] CXX obj/llvm/lib/Target/RISCV/GISel/LLVMRISCVCodeGen.RISCVPreLegalizerCombiner.o
[82/597] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUIGroupLP.o
[83/597] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVVMV0Elimination.o
[84/597] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVVectorPeephole.o
[85/597] CXX obj/llvm/tools/llvm-exegesis/lib/RISCV/RISCV.RISCVExegesisPreprocessing.o
[86/597] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVVLOptimizer.o
[87/597] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVRegisterInfo.o
[88/597] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMTargetMachine.o
[89/597] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVTargetObjectFile.o
[90/597] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600ISelLowering.o
[91/597] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVZilsdOptimizer.o
[92/597] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVSubtarget.o
[93/597] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVZacasABIFix.o
[94/597] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMBaseInstrInfo.o
[95/597] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.GCNSchedStrategy.o
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[97/597] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIInstrInfo.o
[98/597] CXX obj/llvm/lib/CodeGen/CodeGen.MachinePipeliner.o
[99/597] AR lib/libLLVMCodeGen.a
[100/597] AR lib/libLLVMPowerPCCodeGen.a
[101/597] AR lib/libLLVMExegesisRISCV.a
[102/597] AR lib/libLLVMARMCodeGen.a
[103/597] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVISelDAGToDAG.o
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[109/597] LINK obj/llvm/unittests/Target/LoongArch/LoongArchTests
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[111/597] LINK obj/llvm/unittests/Target/ARM/ARMTests
[112/597] CXX obj/llvm/lib/Target/SystemZ/LLVMSystemZCodeGen.SystemZTargetMachine.o
[113/597] AR lib/libLLVMSystemZCodeGen.a
[114/597] LINK obj/llvm/unittests/MC/SystemZ/SystemZAsmLexerTests
[115/597] CXX obj/llvm/unittests/Target/RISCV/RISCVTests.RISCVInstrInfoTest.o
[116/597] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86AsmPrinter.o
[117/597] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86TargetMachine.o
[118/597] CXX obj/llvm/unittests/Target/AMDGPU/AMDGPUTests.GCNRegPressureTest.o
[119/597] ACTION //llvm/lib/Target/AArch64/MCTargetDesc:AArch64GenSubtargetInfo(//llvm/utils/gn/build/toolchain:unix)
[120/597] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86MCInstLower.o
[121/597] ACTION //llvm/lib/Target/AArch64/MCTargetDesc:AArch64GenInstrInfo(//llvm/utils/gn/build/toolchain:unix)
[122/500] LINK obj/llvm/unittests/tools/llvm-cfi-verify/CFIVerifyTests
[123/500] LINK ./bin/llvm-mca
[124/500] LINK ./bin/llvm-cfi-verify
[125/500] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVTargetTransformInfo.o
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[127/500] LINK ./bin/llvm-dwarfdump
[128/500] LINK ./bin/llvm-nm
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[131/500] ACTION //llvm/tools/llvm-objdump:llvm-otool(//llvm/utils/gn/build/toolchain:unix)
[132/500] LINK ./bin/llvm-profgen
[133/500] LINK ./bin/clang-extdef-mapping
[134/500] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVTargetMachine.o
[135/500] LINK ./bin/clang-tidy
[136/500] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86CodeGenPassBuilder.o
[137/500] CXX obj/llvm/lib/Target/AArch64/LLVMAArch64CodeGen.AArch64MacroFusion.o
[138/500] CXX obj/llvm/lib/Target/AArch64/LLVMAArch64CodeGen.AArch64MachineScheduler.o
[139/500] CXX obj/llvm/unittests/CodeGen/CodeGenTests.SchedBoundary.o
[140/500] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVISelLowering.o
[141/500] CXX obj/llvm/lib/Target/RISCV/GISel/LLVMRISCVCodeGen.RISCVInstructionSelector.o
[142/500] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUTargetMachine.o
[143/500] CXX obj/llvm/lib/Target/AArch64/LLVMAArch64CodeGen.AArch64TargetMachine.o
[144/500] CXX obj/llvm/lib/Target/AArch64/LLVMAArch64CodeGen.AArch64Subtarget.o
[145/500] CXX obj/llvm/lib/Passes/Passes.PassBuilder.o
[146/500] AR lib/libLLVMPasses.a
[147/500] AR lib/libLLVMAArch64CodeGen.a
[148/500] AR lib/libLLVMHexagonCodeGen.a
[149/500] AR lib/libLLVMRISCVCodeGen.a
[150/500] AR lib/libLLVMAMDGPUCodeGen.a
[151/500] LINK ./bin/lli-child-target
[152/500] LINK obj/llvm/unittests/ExecutionEngine/ExecutionEngineTests
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[155/500] LINK obj/llvm/unittests/Transforms/Coroutines/CoroTests
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[160/500] LINK ./bin/llvm-extract
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[170/500] LINK obj/llvm/unittests/Target/AMDGPU/AMDGPUTests
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[175/500] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86ISelLowering.o
[176/500] AR lib/libLLVMX86CodeGen.a
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[184/500] ACTION //llvm/tools/llvm-ml:llvm-ml64(//llvm/utils/gn/build/toolchain:unix)
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[267/500] ACTION //compiler-rt/test/lsan:asan_mode_cfg(//llvm/utils/gn/build/toolchain:stage2_unix)
[268/500] ACTION //llvm/include/llvm/Config:Disassemblers.def(//llvm/utils/gn/build/toolchain:stage2_unix)
[269/500] ACTION //llvm/include/llvm/Support:write_extension_def(//llvm/utils/gn/build/toolchain:stage2_unix)
[270/500] ACTION //llvm/include/llvm/Config:AsmParsers.def(//llvm/utils/gn/build/toolchain:stage2_unix)
[271/500] ACTION //llvm/include/llvm/Config:abi-breaking(//llvm/utils/gn/build/toolchain:stage2_unix)
[272/500] ACTION //llvm/include/llvm/Config:AsmPrinters.def(//llvm/utils/gn/build/toolchain:stage2_unix)
[273/500] ACTION //compiler-rt/test/asan:lit_site_cfg(//llvm/utils/gn/build/toolchain:stage2_unix)
[274/500] ACTION //compiler-rt/test/hwasan:lit_site_cfg(//llvm/utils/gn/build/toolchain:stage2_unix)
[275/500] ACTION //llvm/include/llvm/Config:Targets(//llvm/utils/gn/build/toolchain:stage2_unix)
[276/500] ACTION //llvm/include/llvm/Support:write_vcsrevision(//llvm/utils/gn/build/toolchain:stage2_unix)
[277/500] ACTION //llvm/include/llvm/Config:llvm-config(//llvm/utils/gn/build/toolchain:stage2_unix)
[278/320] ACTION //llvm/include/llvm/Config:TargetExegesis.def(//llvm/utils/gn/build/toolchain:stage2_unix)
[279/320] ACTION //libcxx/src:cxx_linker_script(//llvm/utils/gn/build/toolchain:stage2_unix)
[280/320] ACTION //llvm/include/llvm/Config:config(//llvm/utils/gn/build/toolchain:stage2_unix)
[281/287] ACTION //compiler-rt/lib/ubsan:ubsan_loop_detect_dynamic_list(//llvm/utils/gn/build/toolchain:stage2_unix)
[282/287] ACTION //compiler-rt/lib/ubsan:ubsan_static_dynamic_list(//llvm/utils/gn/build/toolchain:stage2_unix)
[283/287] ACTION //compiler-rt/lib/hwasan:version_script(//llvm/utils/gn/build/toolchain:stage2_unix)
[284/287] ACTION //compiler-rt/lib/ubsan:version_script(//llvm/utils/gn/build/toolchain:stage2_unix)
[285/287] ACTION //compiler-rt/lib/ubsan:ubsan_static_cxx_dynamic_list(//llvm/utils/gn/build/toolchain:stage2_unix)
[286/287] SOLINK lib/clang/23/lib/linux/libclang_rt.ubsan_standalone-x86_64.so
[287/287] SOLINK lib/clang/23/lib/linux/libclang_rt.hwasan_aliases-x86_64.so