gn analyze output:
{
  "compile_targets": [],
  "status": "Found dependency",
  "test_targets": [
    "//clang-tools-extra/test:check-clang-tools",
    "//clang/test:check-clang",
    "//compiler-rt/test/hwasan:check-hwasan",
    "//lld/test:check-lld",
    "//llvm/test:check-llvm"
  ]
}
gn analyze input:
{
  "files": [
    "//flang/lib/Optimizer/Transforms/CUDA/CUFAddConstructor.cpp",
    "//flang/test/Fir/CUDA/cuda-managed-descriptor-component.fir",
    "//llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp",
    "//llvm/test/CodeGen/AMDGPU/reduce-build-vec-ext-to-ext-build-vec.ll",
    "//llvm/test/CodeGen/AMDGPU/reduce-load-width-alignment.ll",
    "//llvm/test/CodeGen/AMDGPU/reduction.ll",
    "//llvm/test/CodeGen/AMDGPU/reg-coalescer-sched-crash.ll",
    "//llvm/test/CodeGen/AMDGPU/reg-coalescer-subreg-liveness.mir",
    "//llvm/test/CodeGen/AMDGPU/reg-sequence-like-v-pk-mov-b32.mir",
    "//llvm/test/CodeGen/AMDGPU/regalloc-fail-unsatisfiable-overlapping-tuple-hints.mir",
    "//llvm/test/CodeGen/AMDGPU/regalloc-failure-overlapping-insert-assert.mir",
    "//llvm/test/CodeGen/AMDGPU/regalloc-fast-dont-drop-subreg-index-issue61134.mir",
    "//llvm/test/CodeGen/AMDGPU/regalloc-hoist-spill-live-range-upd.mir",
    "//llvm/test/CodeGen/AMDGPU/regalloc-illegal-eviction-assert.ll",
    "//llvm/test/CodeGen/AMDGPU/regalloc-introduces-copy-sgpr-to-agpr.mir",
    "//llvm/test/CodeGen/AMDGPU/regalloc-sgpr128-partial-def.mir",
    "//llvm/test/CodeGen/AMDGPU/regalloc-spill-wmma-scale.ll",
    "//llvm/test/CodeGen/AMDGPU/regalloc-undef-copy-fold.mir",
    "//llvm/test/CodeGen/AMDGPU/regcoalesce-64-bit-only-regs.mir",
    "//llvm/test/CodeGen/AMDGPU/regcoalescing-remove-partial-redundancy-assert.mir",
    "//llvm/test/CodeGen/AMDGPU/register-coalescer--set-undef-full-reg-use-implicit-def-erase-issue109249.mir",
    "//llvm/test/CodeGen/AMDGPU/register-killed-error-after-alloc-failure0.mir",
    "//llvm/test/CodeGen/AMDGPU/register-killed-error-after-alloc-failure1.ll",
    "//llvm/test/CodeGen/AMDGPU/regpressure_printer.mir",
    "//llvm/test/CodeGen/AMDGPU/reject-agpr-usage-before-gfx908.ll",
    "//llvm/test/CodeGen/AMDGPU/rel32.ll",
    "//llvm/test/CodeGen/AMDGPU/release-vgprs-dbg-loc.mir",
    "//llvm/test/CodeGen/AMDGPU/release-vgprs-gfx12-dvgpr.mir",
    "//llvm/test/CodeGen/AMDGPU/release-vgprs-gfx12.mir",
    "//llvm/test/CodeGen/AMDGPU/release-vgprs-spill.ll",
    "//llvm/test/CodeGen/AMDGPU/release-vgprs.mir",
    "//llvm/test/CodeGen/AMDGPU/rem_i128.ll",
    "//llvm/test/CodeGen/AMDGPU/remaining-virtual-register-operands.ll",
    "//llvm/test/CodeGen/AMDGPU/remat-fp64-constants.ll",
    "//llvm/test/CodeGen/AMDGPU/remat-physreg-copy-subreg-extract-already-live-at-def-issue120970.mir",
    "//llvm/test/CodeGen/AMDGPU/remat-smrd.mir",
    "//llvm/test/CodeGen/AMDGPU/remat-sop.mir",
    "//llvm/test/CodeGen/AMDGPU/remat-through-copy.mir",
    "//llvm/test/CodeGen/AMDGPU/remat-vop.mir",
    "//llvm/test/CodeGen/AMDGPU/remove-incompatible-extended-image-insts.ll",
    "//llvm/test/CodeGen/AMDGPU/remove-incompatible-functions.ll",
    "//llvm/test/CodeGen/AMDGPU/remove-incompatible-gws.ll",
    "//llvm/test/CodeGen/AMDGPU/remove-incompatible-s-time.ll",
    "//llvm/test/CodeGen/AMDGPU/remove-incompatible-wave32-feature.ll",
    "//llvm/test/CodeGen/AMDGPU/remove-incompatible-wave64-feature.ll",
    "//llvm/test/CodeGen/AMDGPU/remove-no-kernel-id-attribute.ll",
    "//llvm/test/CodeGen/AMDGPU/remove-not-short-exec-branch-on-unconditional-jump.mir",
    "//llvm/test/CodeGen/AMDGPU/remove-register-flags.mir",
    "//llvm/test/CodeGen/AMDGPU/remove-short-exec-branches-gpr-idx-mode.mir",
    "//llvm/test/CodeGen/AMDGPU/remove-short-exec-branches-special-instructions.mir",
    "//llvm/test/CodeGen/AMDGPU/rename-independent-subregs-unused-lanes.ll",
    "//llvm/test/CodeGen/AMDGPU/reorder-stores.ll",
    "//llvm/test/CodeGen/AMDGPU/repeated-divisor.ll",
    "//llvm/test/CodeGen/AMDGPU/replace-store-of-insert-load.ll",
    "//llvm/test/CodeGen/AMDGPU/reqd-work-group-size.ll",
    "//llvm/test/CodeGen/AMDGPU/required-export-priority.ll",
    "//llvm/test/CodeGen/AMDGPU/required-export-priority.mir",
    "//llvm/test/CodeGen/AMDGPU/reserved-reg-in-clause.mir",
    "//llvm/test/CodeGen/AMDGPU/resource-optimization-remarks.ll",
    "//llvm/test/CodeGen/AMDGPU/resource-usage-crash-unhandled-reg.mir",
    "//llvm/test/CodeGen/AMDGPU/resource-usage-dead-function.ll",
    "//llvm/test/CodeGen/AMDGPU/resource-usage-pal.ll",
    "//llvm/test/CodeGen/AMDGPU/ret.ll",
    "//llvm/test/CodeGen/AMDGPU/ret_jump.ll",
    "//llvm/test/CodeGen/AMDGPU/return-with-successors.mir",
    "//llvm/test/CodeGen/AMDGPU/returnaddress.ll",
    "//llvm/test/CodeGen/AMDGPU/rewrite-mfma-form-spill-cost-reset.ll",
    "//llvm/test/CodeGen/AMDGPU/rewrite-out-arguments-address-space.ll",
    "//llvm/test/CodeGen/AMDGPU/rewrite-out-arguments.ll",
    "//llvm/test/CodeGen/AMDGPU/rewrite-undef-for-phi.ll",
    "//llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-scale-to-agpr.mir",
    "//llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-copy-from.mir",
    "//llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-spill-multi-store-mir.mir",
    "//llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-spill-multi-store.ll",
    "//llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-subreg-insert-extract.mir",
    "//llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-subreg-src2-chain.mir",
    "//llvm/test/CodeGen/AMDGPU/rotate-add.ll",
    "//llvm/test/CodeGen/AMDGPU/rotl.i64.ll",
    "//llvm/test/CodeGen/AMDGPU/rotl.ll",
    "//llvm/test/CodeGen/AMDGPU/rotr.i64.ll",
    "//llvm/test/CodeGen/AMDGPU/rotr.ll",
    "//llvm/test/CodeGen/AMDGPU/roundeven.ll",
    "//llvm/test/CodeGen/AMDGPU/rsq.f32-safe.ll",
    "//llvm/test/CodeGen/AMDGPU/rsq.f32.ll",
    "//llvm/test/CodeGen/AMDGPU/rsq.f64.ll",
    "//llvm/test/CodeGen/AMDGPU/s-barrier-id-allocation.ll",
    "//llvm/test/CodeGen/AMDGPU/s-barrier-lowering.ll",
    "//llvm/test/CodeGen/AMDGPU/s-barrier.ll",
    "//llvm/test/CodeGen/AMDGPU/s-buffer-load-mmo-offsets.ll",
    "//llvm/test/CodeGen/AMDGPU/s-cluster-barrier.ll",
    "//llvm/test/CodeGen/AMDGPU/s-getpc-b64-remat.ll",
    "//llvm/test/CodeGen/AMDGPU/s-wakeup-barrier.ll",
    "//llvm/test/CodeGen/AMDGPU/s_add_co_pseudo_lowering.mir",
    "//llvm/test/CodeGen/AMDGPU/s_addk_i32.ll",
    "//llvm/test/CodeGen/AMDGPU/s_cmp_0.ll",
    "//llvm/test/CodeGen/AMDGPU/s_code_end.ll",
    "//llvm/test/CodeGen/AMDGPU/s_movk_i32.ll",
    "//llvm/test/CodeGen/AMDGPU/s_mulk_i32.ll",
    "//llvm/test/CodeGen/AMDGPU/s_or_b32_transformation.ll",
    "//llvm/test/CodeGen/AMDGPU/s_or_saveexec_xor_combine.mir",
    "//llvm/test/CodeGen/AMDGPU/s_uaddo_usubo_pseudo.ll",
    "//llvm/test/CodeGen/AMDGPU/sad.ll",
    "//llvm/test/CodeGen/AMDGPU/saddo.ll",
    "//llvm/test/CodeGen/AMDGPU/saddsat.ll",
    "//llvm/test/CodeGen/AMDGPU/salu-to-valu.ll",
    "//llvm/test/CodeGen/AMDGPU/same-lds-variable-multiple-use-in-one-phi-node.ll",
    "//llvm/test/CodeGen/AMDGPU/same-slot-agpr-sgpr.mir",
    "//llvm/test/CodeGen/AMDGPU/save-fp.ll",
    "//llvm/test/CodeGen/AMDGPU/scalar-branch-missing-and-exec.ll",
    "//llvm/test/CodeGen/AMDGPU/scalar-float-sop1.ll",
    "//llvm/test/CodeGen/AMDGPU/scalar-float-sop2.ll",
    "//llvm/test/CodeGen/AMDGPU/scalar-store-cache-flush.mir",
    "//llvm/test/CodeGen/AMDGPU/scalar_to_vector.gfx11plus.ll",
    "//llvm/test/CodeGen/AMDGPU/scalar_to_vector.ll",
    "//llvm/test/CodeGen/AMDGPU/scalar_to_vector.v8i16.ll",
    "//llvm/test/CodeGen/AMDGPU/scalar_to_vector_v2x16.ll",
    "//llvm/test/CodeGen/AMDGPU/scalarize-insert-subvector.ll",
    "//llvm/test/CodeGen/AMDGPU/scale-offset-flat.ll",
    "//llvm/test/CodeGen/AMDGPU/scale-offset-global.ll",
    "//llvm/test/CodeGen/AMDGPU/scale-offset-scratch.ll",
    "//llvm/test/CodeGen/AMDGPU/scale-offset-smem.ll",
    "//llvm/test/CodeGen/AMDGPU/scc-clobbered-sgpr-to-vmem-spill.ll",
    "//llvm/test/CodeGen/AMDGPU/sched-assert-dead-def-subreg-use-other-subreg.mir",
    "//llvm/test/CodeGen/AMDGPU/sched-assert-onlydbg-value-empty-region.mir",
    "//llvm/test/CodeGen/AMDGPU/sched-barrier-hang-weak-dep.mir",
    "//llvm/test/CodeGen/AMDGPU/sched-barrier-post-RA.mir",
    "//llvm/test/CodeGen/AMDGPU/sched-barrier-pre-RA.mir",
    "//llvm/test/CodeGen/AMDGPU/sched-group-barrier-pipeline-solver.mir",
    "//llvm/test/CodeGen/AMDGPU/sched-group-barrier-pre-RA.mir",
    "//llvm/test/CodeGen/AMDGPU/sched-handleMoveUp-dead-def-join.mir",
    "//llvm/test/CodeGen/AMDGPU/sched-handleMoveUp-subreg-def-across-subreg-def.mir",
    "//llvm/test/CodeGen/AMDGPU/sched-image-sample-post-RA.mir",
    "//llvm/test/CodeGen/AMDGPU/sched-ldsdma-mask.mir",
    "//llvm/test/CodeGen/AMDGPU/sched-no-schedmodel.mir",
    "//llvm/test/CodeGen/AMDGPU/sched-prefer-non-mfma.mir",
    "//llvm/test/CodeGen/AMDGPU/sched-setprio.ll",
    "//llvm/test/CodeGen/AMDGPU/sched.group.classification.mir",
    "//llvm/test/CodeGen/AMDGPU/sched_mfma_rewrite_copies.mir",
    "//llvm/test/CodeGen/AMDGPU/sched_mfma_rewrite_cost.mir",
    "//llvm/test/CodeGen/AMDGPU/sched_mfma_rewrite_diff_types.mir",
    "//llvm/test/CodeGen/AMDGPU/schedmodel-dummywrite.mir",
    "//llvm/test/CodeGen/AMDGPU/schedule-addrspaces.ll",
    "//llvm/test/CodeGen/AMDGPU/schedule-amdgpu-tracker-physreg-crash.ll",
    "//llvm/test/CodeGen/AMDGPU/schedule-amdgpu-tracker-physreg.ll",
    "//llvm/test/CodeGen/AMDGPU/schedule-amdgpu-trackers.ll",
    "//llvm/test/CodeGen/AMDGPU/schedule-avoid-spills.ll",
    "//llvm/test/CodeGen/AMDGPU/schedule-barrier-fpmode.mir",
    "//llvm/test/CodeGen/AMDGPU/schedule-barrier-latency-gfx9.mir",
    "//llvm/test/CodeGen/AMDGPU/schedule-barrier-latency.mir",
    "//llvm/test/CodeGen/AMDGPU/schedule-barrier.mir",
    "//llvm/test/CodeGen/AMDGPU/schedule-ilp-liveness-tracking.mir",
    "//llvm/test/CodeGen/AMDGPU/schedule-ilp.ll",
    "//llvm/test/CodeGen/AMDGPU/schedule-ilp.mir",
    "//llvm/test/CodeGen/AMDGPU/schedule-kernel-arg-loads.ll",
    "//llvm/test/CodeGen/AMDGPU/schedule-pending-queue.mir",
    "//llvm/test/CodeGen/AMDGPU/schedule-regpressure-ilp-metric-spills.mir",
    "//llvm/test/CodeGen/AMDGPU/schedule-regpressure-lds.ll",
    "//llvm/test/CodeGen/AMDGPU/schedule-regpressure-limit-clustering.ll",
    "//llvm/test/CodeGen/AMDGPU/schedule-regpressure-limit.ll",
    "//llvm/test/CodeGen/AMDGPU/schedule-regpressure-limit2.ll",
    "//llvm/test/CodeGen/AMDGPU/schedule-regpressure-limit3.ll",
    "//llvm/test/CodeGen/AMDGPU/schedule-regpressure-misched-max-waves.ll",
    "//llvm/test/CodeGen/AMDGPU/schedule-regpressure-no-unclustered-regions.mir",
    "//llvm/test/CodeGen/AMDGPU/schedule-relaxed-occupancy.ll",
    "//llvm/test/CodeGen/AMDGPU/schedule-vs-if-nested-loop-failure.ll",
    "//llvm/test/CodeGen/AMDGPU/schedule-xdl-resource.ll",
    "//llvm/test/CodeGen/AMDGPU/scheduler-handle-move-bundle.mir",
    "//llvm/test/CodeGen/AMDGPU/scheduler-rp-calc-one-successor-two-predecessors-bug.ll",
    "//llvm/test/CodeGen/AMDGPU/scheduler-subrange-crash.ll",
    "//llvm/test/CodeGen/AMDGPU/scratch-buffer.ll",
    "//llvm/test/CodeGen/AMDGPU/scratch-pointer-sink.ll",
    "//llvm/test/CodeGen/AMDGPU/scratch-simple.ll",
    "//llvm/test/CodeGen/AMDGPU/sdag-print-divergence.ll",
    "//llvm/test/CodeGen/AMDGPU/sdiv.ll",
    "//llvm/test/CodeGen/AMDGPU/sdiv64.ll",
    "//llvm/test/CodeGen/AMDGPU/sdivrem24.ll",
    "//llvm/test/CodeGen/AMDGPU/sdwa-commute.ll",
    "//llvm/test/CodeGen/AMDGPU/sdwa-cse.mir",
    "//llvm/test/CodeGen/AMDGPU/sdwa-gfx9.mir",
    "//llvm/test/CodeGen/AMDGPU/sdwa-op64-test.ll",
    "//llvm/test/CodeGen/AMDGPU/sdwa-ops.mir",
    "//llvm/test/CodeGen/AMDGPU/sdwa-peephole-cndmask-fail.ll",
    "//llvm/test/CodeGen/AMDGPU/sdwa-peephole-cndmask-sext.ll",
    "//llvm/test/CodeGen/AMDGPU/sdwa-peephole-cndmask-wave32.mir",
    "//llvm/test/CodeGen/AMDGPU/sdwa-peephole-cndmask-wave64.mir",
    "//llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-combine-sel-dst.mir",
    "//llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-combine-sel-src.mir",
    "//llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-combine-sel.ll",
    "//llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-combine-sel.mir",
    "//llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-gfx10.mir",
    "//llvm/test/CodeGen/AMDGPU/sdwa-peephole-instr.mir",
    "//llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll",
    "//llvm/test/CodeGen/AMDGPU/sdwa-preserve.mir",
    "//llvm/test/CodeGen/AMDGPU/sdwa-scalar-ops.mir",
    "//llvm/test/CodeGen/AMDGPU/sdwa-stack.mir",
    "//llvm/test/CodeGen/AMDGPU/sdwa-vop2-64bit.mir",
    "//llvm/test/CodeGen/AMDGPU/select-cmp-shared-constant-fp.ll",
    "//llvm/test/CodeGen/AMDGPU/select-cmp-shared-constant-int.ll",
    "//llvm/test/CodeGen/AMDGPU/select-constant-xor.ll",
    "//llvm/test/CodeGen/AMDGPU/select-fabs-fneg-extract-legacy.ll",
    "//llvm/test/CodeGen/AMDGPU/select-fabs-fneg-extract.f16.ll",
    "//llvm/test/CodeGen/AMDGPU/select-fabs-fneg-extract.legal.f16.ll",
    "//llvm/test/CodeGen/AMDGPU/select-fabs-fneg-extract.ll",
    "//llvm/test/CodeGen/AMDGPU/select-fabs-fneg-extract.v2f16.ll",
    "//llvm/test/CodeGen/AMDGPU/select-flags-to-fmin-fmax.ll",
    "//llvm/test/Transforms/SLPVectorizer/X86/crash_scatter_load_reorder.ll"
  ],
  "test_targets": [
    "//clang-tools-extra/clangd/test:check-clangd",
    "//clang-tools-extra/test:check-clang-tools",
    "//clang/test:check-clang",
    "//compiler-rt/test/hwasan:check-hwasan",
    "//lld/test:check-lld",
    "//llvm/test:check-llvm"
  ],
  "additional_compile_targets": []
}