INFO:2026-07-27T06:37:50Z:root:pulling...
From github.com:llvm/llvm-project
 * branch                      main       -> FETCH_HEAD
   5271fd9e65fb..820b5cb6d9fe  main       -> origin/main
Switched to branch 'main'
Your branch is behind 'origin/main' by 1 commit, and can be fast-forwarded.
  (use "git pull" to update your local branch)
HEAD is now at 820b5cb6d9fe [AArch64] Mark ZT0 register class as non-allocatable (#211750)
INFO:2026-07-27T06:37:53Z:root:syncing...
Deleted branch merge (was 5271fd9e65fb).
Switched to a new branch 'merge'
branch 'merge' set up to track 'origin/main'.
INFO:2026-07-27T06:37:53Z:root:building
ninja: Entering directory `out/gn'
[1/1368] COPY ../../libcxxabi/include/cxxabi.h include/c++/v1/cxxabi.h
[2/1368] COPY ../../libcxxabi/include/__cxxabi_config.h include/c++/v1/__cxxabi_config.h
[3/1368] ACTION //libcxx/include:copy_headers(//llvm/utils/gn/build/toolchain:unix)
[4/1368] ACTION //llvm/tools/llvm-exegesis/lib/AArch64:AArch64GenExegesis(//llvm/utils/gn/build/toolchain:unix)
[5/1368] ACTION //llvm/include/llvm/TargetParser:AArch64TargetParserDef(//llvm/utils/gn/build/toolchain:unix)
[6/1349] ACTION //llvm/lib/Target/AArch64:AArch64GenMCPseudoLowering(//llvm/utils/gn/build/toolchain:unix)
[7/1349] ACTION //llvm/lib/Target/AArch64:AArch64GenSDNodeInfo(//llvm/utils/gn/build/toolchain:unix)
[8/1348] ACTION //llvm/lib/Target/AArch64:AArch64GenO0PreLegalizeGICombiner(//llvm/utils/gn/build/toolchain:unix)
[9/1348] ACTION //llvm/lib/Target/AArch64:AArch64GenPostLegalizeGICombiner(//llvm/utils/gn/build/toolchain:unix)
[10/1348] ACTION //llvm/lib/Target/AArch64:AArch64GenPostLegalizeGILowering(//llvm/utils/gn/build/toolchain:unix)
[11/1348] ACTION //llvm/lib/Target/AArch64:AArch64GenPreLegalizeGICombiner(//llvm/utils/gn/build/toolchain:unix)
[12/1348] ACTION //llvm/lib/Target/AArch64/MCTargetDesc:AArch64GenMCCodeEmitter(//llvm/utils/gn/build/toolchain:unix)
[13/1348] ACTION //llvm/lib/Target/AArch64:AArch64GenCallingConv(//llvm/utils/gn/build/toolchain:unix)
[14/1348] ACTION //llvm/lib/Target/AArch64/Disassembler:AArch64GenDisassemblerTables(//llvm/utils/gn/build/toolchain:unix)
[15/1348] ACTION //llvm/lib/Target/AArch64:AArch64GenRegisterBank(//llvm/utils/gn/build/toolchain:unix)
[16/1348] ACTION //llvm/lib/Target/AArch64/MCTargetDesc:AArch64GenAsmWriter(//llvm/utils/gn/build/toolchain:unix)
[17/1348] ACTION //llvm/lib/Target/AArch64/MCTargetDesc:AArch64GenAsmWriter1(//llvm/utils/gn/build/toolchain:unix)
[18/1348] ACTION //llvm/lib/Target/AArch64/MCTargetDesc:AArch64GenRegisterInfo(//llvm/utils/gn/build/toolchain:unix)
[19/1348] ACTION //llvm/lib/Target/AArch64/Utils:AArch64GenSystemOperands(//llvm/utils/gn/build/toolchain:unix)
[20/1348] ACTION //llvm/lib/Target/AArch64/AsmParser:AArch64GenAsmMatcher(//llvm/utils/gn/build/toolchain:unix)
[21/1348] ACTION //llvm/lib/Target/AArch64:AArch64GenFastISel(//llvm/utils/gn/build/toolchain:unix)
[22/1348] CXX obj/llvm/lib/Target/AMDGPU/MCTargetDesc/MCTargetDesc.AMDGPUELFObjectWriter.o
[23/1348] CXX obj/llvm/lib/Target/AMDGPU/MCTargetDesc/MCTargetDesc.AMDGPUAsmBackend.o
[24/1348] CXX obj/llvm/unittests/Passes/Plugins/DoublerPlugin/DoublerPlugin.DoublerPlugin.o
[25/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPURewriteUndefForPHI.o
[26/1348] CXX obj/llvm/unittests/Analysis/InlineAdvisorPlugin/InlineAdvisorPlugin.InlineAdvisorPlugin.o
[27/1348] ACTION //llvm/lib/Target/AArch64:AArch64GenGlobalISel(//llvm/utils/gn/build/toolchain:unix)
[28/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUPromoteKernelArguments.o
[29/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUPrintfRuntimeBinding.o
[30/1348] CXX obj/llvm/unittests/Passes/Plugins/TestPlugin/TestPlugin.TestPlugin.o
[31/1348] CXX obj/llvm/unittests/Analysis/InlineOrderPlugin/InlineOrderPlugin.InlineOrderPlugin.o
[32/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUUnifyDivergentExitNodes.o
[33/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUAnnotateUniformValues.o
[34/1348] CXX obj/llvm/lib/Target/AMDGPU/MCTargetDesc/MCTargetDesc.AMDGPUTargetStreamer.o
[35/1348] ACTION //llvm/lib/Target/AArch64:AArch64GenDAGISel(//llvm/utils/gn/build/toolchain:unix)
[36/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPURewriteOutArguments.o
[37/1348] CXX obj/llvm/unittests/tools/llvm-profgen/LLVMProfgenTests.ContextCompressionTest.o
[38/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUAsanInstrumentation.o
[39/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600Packetizer.o
[40/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUGlobalISelDivergenceLowering.o
[41/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPULibCalls.o
[42/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600AsmPrinter.o
[43/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPURegBankSelect.o
[44/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUMemoryUtils.o
[45/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600OptimizeVectorRegisters.o
[46/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPURegBankLegalize.o
[47/1348] CXX obj/llvm/lib/Target/AMDGPU/Utils/Utils.AMDGPUPALMetadata.o
[48/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPULowerIntrinsics.o
[49/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600MachineCFGStructurizer.o
[50/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIAnnotateControlFlow.o
[51/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUUniformIntrinsicCombine.o
[52/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPULowerKernelArguments.o
[53/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SILateBranchLowering.o
[54/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SILowerI1Copies.o
[55/1348] CXX obj/llvm/lib/Target/AMDGPU/Utils/Utils.AMDGPUBaseInfo.o
[56/1348] CXX obj/llvm/lib/Target/ARM/MCTargetDesc/MCTargetDesc.ARMELFObjectWriter.o
[57/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SILowerControlFlow.o
[58/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPULateCodeGenPrepare.o
[59/1348] CXX obj/llvm/lib/Target/AVR/MCTargetDesc/MCTargetDesc.AVRELFObjectWriter.o
[60/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIFixSGPRCopies.o
[61/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPURegBankLegalizeHelper.o
[62/1348] CXX obj/llvm/lib/Target/ARM/MCTargetDesc/MCTargetDesc.ARMELFStreamer.o
[63/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUAtomicOptimizer.o
[64/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SILowerSGPRSpills.o
[65/1348] CXX obj/llvm/lib/Target/AVR/MCTargetDesc/MCTargetDesc.AVRAsmBackend.o
[66/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIPreEmitPeephole.o
[67/1348] CXX obj/llvm/lib/Target/AVR/MCTargetDesc/MCTargetDesc.AVRELFStreamer.o
[68/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.GCNRegPressure.o
[69/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUPromoteAlloca.o
[70/1348] CXX obj/llvm/lib/Target/ARM/MCTargetDesc/MCTargetDesc.ARMAsmBackend.o
[71/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUCodeGenPrepare.o
[72/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUSwLowerLDS.o
[73/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUNextUseAnalysis.o
[74/1348] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFTargetLoweringObjectFile.o
[75/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPULowerModuleLDSPass.o
[76/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUInstCombineIntrinsic.o
[77/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.GCNHazardRecognizer.o
[78/1348] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMBlockPlacement.o
[79/1348] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRSubtarget.o
[80/1348] CXX obj/llvm/lib/Target/BPF/MCTargetDesc/MCTargetDesc.BPFELFObjectWriter.o
[81/1348] CXX obj/llvm/lib/Target/Hexagon/MCTargetDesc/MCTargetDesc.HexagonELFObjectWriter.o
[82/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIOptimizeVGPRLiveRange.o
[83/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUAsmPrinter.o
[84/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIWholeQuadMode.o
[85/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUPreLegalizerCombiner.o
[86/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600ISelLowering.o
[87/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUPostLegalizerCombiner.o
[88/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUAttributor.o
[89/1348] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRAsmPrinter.o
[90/1348] CXX obj/llvm/lib/Target/Hexagon/MCTargetDesc/MCTargetDesc.HexagonMCELFStreamer.o
[91/1348] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMTargetObjectFile.o
[92/1348] CXX obj/llvm/lib/Target/Hexagon/MCTargetDesc/MCTargetDesc.HexagonAsmBackend.o
[93/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPULowerBufferFatPointers.o
[94/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIInsertWaitcnts.o
[95/1348] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.MVEGatherScatterLowering.o
[96/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPURegBankLegalizeRules.o
[97/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600TargetTransformInfo.o
[98/1348] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMSelectionDAGInfo.o
[99/1348] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMConstantIslandPass.o
[100/1348] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFAdjustOpt.o
[101/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPURegBankCombiner.o
[102/1348] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFPreserveDIType.o
[103/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUTargetTransformInfo.o
[104/1348] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMParallelDSP.o
[105/1348] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonGenExtract.o
[106/1348] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMLowOverheadLoops.o
[107/1348] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.MVETPAndVPTOptimisationsPass.o
[108/1348] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRTargetObjectFile.o
[109/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.GCNSchedStrategy.o
[110/1348] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFCheckAndAdjustIR.o
[111/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIInstrInfo.o
[112/1348] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMLoadStoreOptimizer.o
[113/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600TargetMachine.o
[114/1348] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonAggressiveRDFCopy.o
[115/1348] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.MVETailPredication.o
[116/1348] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonCommonGEP.o
[117/1348] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonGenMemAbsolute.o
[118/1348] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonFixupHwLoops.o
[119/1348] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonEarlyIfConv.o
[120/1348] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRTargetMachine.o
[121/1348] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonCopyHoisting.o
[122/1348] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonExpandCondsets.o
[123/1348] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonAsmPrinter.o
[124/1348] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonGlobalRegion.o
[125/1348] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonGenPredicate.o
[126/1348] CXX obj/llvm/lib/Target/Lanai/MCTargetDesc/MCTargetDesc.LanaiELFObjectWriter.o
[127/1348] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonTargetObjectFile.o
[128/1348] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonOptimizeSZextends.o
[129/1348] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFAbstractMemberAccess.o
[130/1348] CXX obj/llvm/lib/Target/Lanai/MCTargetDesc/MCTargetDesc.LanaiAsmBackend.o
[131/1348] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRTargetTransformInfo.o
[132/1348] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFAsmPrinter.o
[133/1348] CXX obj/llvm/lib/Target/Lanai/LLVMLanaiCodeGen.LanaiTargetObjectFile.o
[134/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIRegisterInfo.o
[135/1348] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonBitSimplify.o
[136/1348] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonLoopAlign.o
[137/1348] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonHardwareLoops.o
[138/1348] CXX obj/llvm/lib/Target/LoongArch/MCTargetDesc/MCTargetDesc.LoongArchELFObjectWriter.o
[139/1348] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonConstExtenders.o
[140/1348] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMBaseInstrInfo.o
[141/1348] CXX obj/llvm/lib/Target/LoongArch/MCTargetDesc/MCTargetDesc.LoongArchMCAsmInfo.o
[142/1348] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonSelectionDAGInfo.o
[143/1348] CXX obj/llvm/lib/Target/LoongArch/MCTargetDesc/MCTargetDesc.LoongArchELFStreamer.o
[144/1348] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonPeephole.o
[145/1348] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonSplitConst32AndConst64.o
[146/1348] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.RDFCopy.o
[147/1348] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMTargetMachine.o
[148/1348] CXX obj/llvm/lib/Target/LoongArch/MCTargetDesc/MCTargetDesc.LoongArchAsmBackend.o
[149/1348] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonLiveVariables.o
[150/1348] CXX obj/llvm/lib/Target/Hexagon/MCTargetDesc/MCTargetDesc.HexagonMCTargetDesc.o
[151/1348] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonOptAddrMode.o
[152/1348] CXX obj/llvm/lib/Target/LoongArch/MCTargetDesc/MCTargetDesc.LoongArchMCCodeEmitter.o
[153/1348] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonVectorLoopCarriedReuse.o
[154/1348] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonXQFloatGenerator.o
[155/1348] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonTfrCleanup.o
[156/1348] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonRDFOpt.o
[157/1348] CXX obj/llvm/lib/Target/Mips/MCTargetDesc/MCTargetDesc.MipsAsmBackend.o
[158/1348] CXX obj/llvm/lib/Target/Mips/MCTargetDesc/MCTargetDesc.MipsELFObjectWriter.o
[159/1348] CXX obj/llvm/lib/Target/Lanai/LLVMLanaiCodeGen.LanaiTargetMachine.o
[160/1348] CXX obj/llvm/lib/Target/LoongArch/LLVMLoongArchCodeGen.LoongArchMCInstLower.o
[161/1348] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMTargetTransformInfo.o
[162/1348] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonGenInsert.o
[163/1348] CXX obj/llvm/lib/Target/Mips/MCTargetDesc/MCTargetDesc.MipsELFStreamer.o
[164/1348] CXX obj/llvm/lib/Target/LoongArch/AsmParser/AsmParser.LoongArchAsmParser.o
[165/1348] CXX obj/llvm/lib/Target/Mips/MCTargetDesc/MCTargetDesc.MipsOptionRecord.o
[166/1348] CXX obj/llvm/lib/Target/Hexagon/AsmParser/AsmParser.HexagonAsmParser.o
[167/1348] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BTFDebug.o
[168/1348] CXX obj/llvm/lib/Target/PowerPC/MCTargetDesc/MCTargetDesc.PPCELFObjectWriter.o
[169/1348] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonVLIWPacketizer.o
[170/1348] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonFrameLowering.o
[171/1348] CXX obj/llvm/lib/Target/Mips/MCTargetDesc/MCTargetDesc.MipsTargetStreamer.o
[172/1348] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonSplitDouble.o
[173/1348] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonISelDAGToDAG.o
[174/1348] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonISelDAGToDAGHVX.o
[175/1348] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXAtomicLower.o
[176/1348] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonPostRAHandleQFP.o
[177/1348] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonLoopIdiomRecognition.o
[178/1348] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXAllocaHoisting.o
[179/1348] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVVMReflect.o
[180/1348] CXX obj/llvm/lib/Target/PowerPC/MCTargetDesc/MCTargetDesc.PPCAsmBackend.o
[181/1348] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCCTRLoopsVerify.o
[182/1348] CXX obj/llvm/lib/Target/RISCV/MCTargetDesc/MCTargetDesc.RISCVELFObjectWriter.o
[183/1348] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonISelLowering.o
[184/1348] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsModuleISelDAGToDAG.o
[185/1348] CXX obj/llvm/lib/Target/PowerPC/MCTargetDesc/MCTargetDesc.PPCELFStreamer.o
[186/1348] CXX obj/llvm/lib/Target/RISCV/MCTargetDesc/MCTargetDesc.RISCVMCAsmInfo.o
[187/1348] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFTargetMachine.o
[188/1348] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonGlobalScheduler.o
[189/1348] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIISelLowering.o
[190/1348] ACTION //llvm/lib/Target/AArch64/MCTargetDesc:AArch64GenInstrInfo(//llvm/utils/gn/build/toolchain:unix)
[191/1348] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsOptimizePICCall.o
[192/1348] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCBranchCoalescing.o
[193/1348] ACTION //llvm/lib/Target/AArch64/MCTargetDesc:AArch64GenSubtargetInfo(//llvm/utils/gn/build/toolchain:unix)
[194/1302] CXX obj/llvm/lib/Target/RISCV/MCTargetDesc/MCTargetDesc.RISCVMCExpr.o
[195/1302] CXX obj/llvm/lib/Target/Mips/AsmParser/AsmParser.MipsAsmParser.o
[196/1302] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsTargetObjectFile.o
[197/1302] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXLowerAggrCopies.o
[198/1302] CXX obj/llvm/lib/Target/LoongArch/LLVMLoongArchCodeGen.LoongArchAsmPrinter.o
[199/1302] CXX obj/llvm/lib/Target/RISCV/MCTargetDesc/MCTargetDesc.RISCVELFStreamer.o
[200/1302] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsISelDAGToDAG.o
[201/1302] CXX obj/llvm/lib/Target/PowerPC/MCTargetDesc/MCTargetDesc.PPCMCTargetDesc.o
[202/1302] CXX obj/llvm/lib/Target/Sparc/MCTargetDesc/MCTargetDesc.SparcAsmBackend.o
[203/1302] CXX obj/llvm/lib/Target/Lanai/LLVMLanaiCodeGen.LanaiCodeGenPassBuilder.o
[204/1302] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonTargetTransformInfo.o
[205/1302] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCCTRLoops.o
[206/1302] CXX obj/llvm/lib/Target/Sparc/MCTargetDesc/MCTargetDesc.SparcMCAsmInfo.o
[207/1302] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsSEISelDAGToDAG.o
[208/1302] CXX obj/llvm/lib/Target/Sparc/MCTargetDesc/MCTargetDesc.SparcMCExpr.o
[209/1302] CXX obj/llvm/lib/Target/Sparc/MCTargetDesc/MCTargetDesc.SparcELFObjectWriter.o
[210/1302] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsAsmPrinter.o
[211/1302] CXX obj/llvm/lib/Target/RISCV/MCTargetDesc/MCTargetDesc.RISCVMachObjectWriter.o
[212/1302] CXX obj/llvm/lib/Target/Sparc/MCTargetDesc/MCTargetDesc.SparcMCCodeEmitter.o
[213/1302] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCBoolRetToInt.o
[214/1302] CXX obj/llvm/lib/Target/RISCV/MCTargetDesc/MCTargetDesc.RISCVTargetStreamer.o
[215/1302] CXX obj/llvm/lib/Target/RISCV/MCTargetDesc/MCTargetDesc.RISCVAsmBackend.o
[216/1302] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCReduceCRLogicals.o
[217/1302] CXX obj/llvm/lib/Target/RISCV/MCTargetDesc/MCTargetDesc.RISCVMCCodeEmitter.o
[218/1302] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFCodeGenPassBuilder.o
[219/1302] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCVSXFMAMutate.o
[220/1302] CXX obj/llvm/lib/Target/Sparc/AsmParser/AsmParser.SparcAsmParser.o
[221/1302] CXX obj/llvm/lib/Target/LoongArch/LLVMLoongArchCodeGen.LoongArchTargetTransformInfo.o
[222/1302] CXX obj/llvm/lib/Target/LoongArch/LLVMLoongArchCodeGen.LoongArchTargetMachine.o
[223/1302] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsPostLegalizerCombiner.o
[224/1302] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMISelLowering.o
[225/1302] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCMIPeephole.o
[226/1302] CXX obj/lld/ELF/ELF.Relocations.o
FAILED: obj/lld/ELF/ELF.Relocations.o 
../../../chrome/src/third_party/llvm-build/Release+Asserts/bin/clang++ -MMD -MF obj/lld/ELF/ELF.Relocations.o.d -o obj/lld/ELF/ELF.Relocations.o -c ../../lld/ELF/Relocations.cpp  -I../../lld/ELF -I../../llvm/include -Igen/llvm/include -I../../lld/include -Igen/lld/include -Igen/lld/ELF -I. -Igen/llvm/include/llvm/IR -O3 -fdiagnostics-color -Wall -Wextra -Wno-unused-parameter -Wdelete-non-virtual-dtor -Wstring-conversion -no-canonical-prefixes -Werror=date-time -fdebug-compilation-dir=. --sysroot=../../sysroot -Wpoison-system-directories -fPIC -Wcovered-switch-default -std=c++17 -fvisibility-inlines-hidden -fno-exceptions -fno-rtti
../../lld/ELF/Relocations.cpp:756:45: error: non-constant-expression cannot be narrowed from type 'uint8_t' (aka 'unsigned char') to 'bool' in initializer list [-Wc++11-narrowing]
  756 |         {type, &plt, sym.getPltOffset(ctx), sym.isPreemptible, sym, 0, expr});
      |                                             ^~~~~~~~~~~~~~~~~
../../lld/ELF/Relocations.cpp:1255:3: note: in instantiation of function template specialization 'addPltEntry<lld::elf::IpltSection, lld::elf::IgotPltSection>' requested here
 1255 |   addPltEntry(ctx, *ctx.in.iplt, *ctx.in.igotPlt, dyn, ctx.target->iRelativeRel,
      |   ^
../../lld/ELF/Relocations.cpp:756:45: note: insert an explicit cast to silence this issue
  756 |         {type, &plt, sym.getPltOffset(ctx), sym.isPreemptible, sym, 0, expr});
      |                                             ^~~~~~~~~~~~~~~~~
      |                                             static_cast<bool>( )
../../lld/ELF/Relocations.cpp:760:58: error: non-constant-expression cannot be narrowed from type 'uint8_t' (aka 'unsigned char') to 'bool' in initializer list [-Wc++11-narrowing]
  760 |   rel.addReloc({type, &gotPlt, sym.getGotPltOffset(ctx), sym.isPreemptible, sym,
      |                                                          ^~~~~~~~~~~~~~~~~
../../lld/ELF/Relocations.cpp:760:58: note: insert an explicit cast to silence this issue
  760 |   rel.addReloc({type, &gotPlt, sym.getGotPltOffset(ctx), sym.isPreemptible, sym,
      |                                                          ^~~~~~~~~~~~~~~~~
      |                                                          static_cast<bool>( )
../../lld/ELF/Relocations.cpp:756:45: error: non-constant-expression cannot be narrowed from type 'uint8_t' (aka 'unsigned char') to 'bool' in initializer list [-Wc++11-narrowing]
  756 |         {type, &plt, sym.getPltOffset(ctx), sym.isPreemptible, sym, 0, expr});
      |                                             ^~~~~~~~~~~~~~~~~
../../lld/ELF/Relocations.cpp:1310:7: note: in instantiation of function template specialization 'addPltEntry<lld::elf::PltSection, lld::elf::GotPltSection>' requested here
 1310 |       addPltEntry(ctx, *ctx.in.plt, *ctx.in.gotPlt, *ctx.in.relaPlt,
      |       ^
../../lld/ELF/Relocations.cpp:756:45: note: insert an explicit cast to silence this issue
  756 |         {type, &plt, sym.getPltOffset(ctx), sym.isPreemptible, sym, 0, expr});
      |                                             ^~~~~~~~~~~~~~~~~
      |                                             static_cast<bool>( )
../../lld/ELF/Relocations.cpp:760:58: error: non-constant-expression cannot be narrowed from type 'uint8_t' (aka 'unsigned char') to 'bool' in initializer list [-Wc++11-narrowing]
  760 |   rel.addReloc({type, &gotPlt, sym.getGotPltOffset(ctx), sym.isPreemptible, sym,
      |                                                          ^~~~~~~~~~~~~~~~~
../../lld/ELF/Relocations.cpp:760:58: note: insert an explicit cast to silence this issue
  760 |   rel.addReloc({type, &gotPlt, sym.getGotPltOffset(ctx), sym.isPreemptible, sym,
      |                                                          ^~~~~~~~~~~~~~~~~
      |                                                          static_cast<bool>( )
4 errors generated.
[227/1302] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonTargetMachine.o
[228/1302] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsTargetMachine.o
[229/1302] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsTargetTransformInfo.o
[230/1302] CXX obj/llvm/lib/Target/Sparc/LLVMSparcCodeGen.SparcAsmPrinter.o
[231/1302] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCLoopInstrFormPrep.o
[232/1302] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVZacasABIFix.o
[233/1302] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVZilsdOptimizer.o
[234/1302] CXX obj/llvm/lib/Target/Sparc/LLVMSparcCodeGen.SparcTargetObjectFile.o
[235/1302] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVCodeGenPrepare.o
[236/1302] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVVLOptimizer.o
[237/1302] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVTargetObjectFile.o
[238/1302] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCAsmPrinter.o
[239/1302] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonVectorCombine.o
[240/1302] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXTargetTransformInfo.o
[241/1302] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVGatherScatterLowering.o
[242/1302] CXX obj/llvm/lib/Target/AArch64/LLVMAArch64CodeGen.AArch64RedundantCondBranchPass.o
[243/1302] CXX obj/llvm/lib/Target/RISCV/AsmParser/AsmParser.RISCVAsmParser.o
[244/1302] CXX obj/llvm/lib/Target/RISCV/GISel/LLVMRISCVCodeGen.RISCVO0PreLegalizerCombiner.o
[245/1302] CXX obj/llvm/lib/Target/Sparc/LLVMSparcCodeGen.SparcISelLowering.o
[246/1302] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXAsmPrinter.o
[247/1302] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVAsmPrinter.o
[248/1302] CXX obj/llvm/lib/Target/AArch64/LLVMAArch64CodeGen.AArch64RedundantCopyElimination.o
[249/1302] CXX obj/llvm/lib/Target/AArch64/LLVMAArch64CodeGen.AArch64MacroFusion.o
[250/1302] CXX obj/llvm/lib/Target/AArch64/LLVMAArch64CodeGen.AArch64PromoteConstant.o
[251/1302] CXX obj/llvm/lib/Target/RISCV/GISel/LLVMRISCVCodeGen.RISCVPostLegalizerCombiner.o
[252/1302] CXX obj/llvm/lib/Target/AArch64/LLVMAArch64CodeGen.AArch64PTrueCoalescing.o
[253/1302] CXX obj/llvm/lib/Target/AArch64/LLVMAArch64CodeGen.AArch64MIPeepholeOpt.o
[254/1302] CXX obj/llvm/lib/Target/AArch64/LLVMAArch64CodeGen.AArch64MachineScheduler.o
[255/1302] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCTargetMachine.o
[256/1302] CXX obj/llvm/lib/Target/AArch64/LLVMAArch64CodeGen.AArch64SIMDInstrOpt.o
[257/1302] CXX obj/llvm/lib/Target/AArch64/LLVMAArch64CodeGen.AArch64PBQPRegAlloc.o
[258/1302] CXX obj/llvm/lib/Target/AArch64/LLVMAArch64CodeGen.AArch64SpeculationHardening.o
[259/1302] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCTargetTransformInfo.o
[260/1302] CXX obj/llvm/lib/Target/AArch64/LLVMAArch64CodeGen.AArch64MachineFunctionInfo.o
[261/1302] CXX obj/llvm/lib/Target/Sparc/LLVMSparcCodeGen.SparcTargetTransformInfo.o
[262/1302] CXX obj/llvm/lib/Target/AArch64/LLVMAArch64CodeGen.AArch64PostCoalescerPass.o
[263/1302] CXX obj/llvm/lib/Target/Sparc/LLVMSparcCodeGen.SparcTargetMachine.o
[264/1302] CXX obj/llvm/lib/Target/AArch64/LLVMAArch64CodeGen.AArch64StorePairSuppress.o
[265/1302] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXTargetMachine.o
[266/1302] CXX obj/llvm/lib/Target/RISCV/GISel/LLVMRISCVCodeGen.RISCVPreLegalizerCombiner.o
[267/1302] CXX obj/llvm/lib/Target/AArch64/LLVMAArch64CodeGen.AArch64SRLTDefineSuperRegs.o
[268/1302] CXX obj/llvm/lib/Target/AArch64/LLVMAArch64CodeGen.AArch64MCInstLower.o
[269/1302] CXX obj/llvm/lib/Target/AArch64/LLVMAArch64CodeGen.AArch64SelectionDAGInfo.o
[270/1302] CXX obj/llvm/lib/Target/AArch64/LLVMAArch64CodeGen.AArch64SLSHardening.o
[271/1302] CXX obj/llvm/lib/Target/AArch64/LLVMAArch64CodeGen.AArch64PrologueEpilogue.o
[272/1302] CXX obj/llvm/lib/Target/AArch64/LLVMAArch64CodeGen.AArch64PointerAuth.o
[273/1302] CXX obj/llvm/lib/Target/AArch64/LLVMAArch64CodeGen.AArch64StackTaggingPreRA.o
[274/1302] CXX obj/llvm/lib/Target/AArch64/LLVMAArch64CodeGen.AArch64TargetObjectFile.o
[275/1302] CXX obj/llvm/lib/Target/AArch64/LLVMAArch64CodeGen.AArch64StackTagging.o
[276/1302] CXX obj/llvm/lib/Target/AArch64/LLVMAArch64CodeGen.AArch64RegisterInfo.o
[277/1302] CXX obj/llvm/lib/Target/AArch64/GISel/LLVMAArch64CodeGen.AArch64CallLowering.o
[278/1302] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUTargetMachine.o
[279/1302] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVTargetMachine.o
[280/1302] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVTargetTransformInfo.o
[281/1302] CXX obj/llvm/lib/Target/AArch64/GISel/LLVMAArch64CodeGen.AArch64O0PreLegalizerCombiner.o
[282/1302] CXX obj/llvm/lib/Target/AArch64/GISel/LLVMAArch64CodeGen.AArch64LegalizerInfo.o
[283/1302] CXX obj/llvm/lib/Target/AArch64/GISel/LLVMAArch64CodeGen.AArch64PostLegalizerCombiner.o
[284/1302] CXX obj/llvm/lib/Target/AArch64/GISel/LLVMAArch64CodeGen.AArch64PostLegalizerLowering.o
[285/1302] CXX obj/llvm/lib/Target/AMDGPU/AsmParser/AsmParser.AMDGPUAsmParser.o
[286/1302] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCISelLowering.o
[287/1302] CXX obj/llvm/lib/Target/AArch64/LLVMAArch64CodeGen.AArch64TargetMachine.o
[288/1302] CXX obj/llvm/lib/Target/AMDGPU/Disassembler/Disassembler.AMDGPUDisassembler.o
[289/1302] CXX obj/llvm/lib/Target/AArch64/LLVMAArch64CodeGen.AArch64TargetTransformInfo.o
[290/1302] CXX obj/llvm/lib/Target/AArch64/GISel/LLVMAArch64CodeGen.AArch64InstructionSelector.o
[291/1302] CXX obj/llvm/lib/Target/AArch64/LLVMAArch64CodeGen.AArch64Subtarget.o
ninja: build stopped: subcommand failed.
Command '['ninja', '-C', 'out/gn']' returned non-zero exit status 1.