INFO:2026-08-18T23:02:25Z:root:pulling...
From github.com:llvm/llvm-project
 * branch                      main       -> FETCH_HEAD
   9444c2d49a70..b1f74191d8ae  main       -> origin/main
Switched to branch 'main'
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HEAD is now at b1f74191d8ae [GISel][NewPM] Port Legalizer
INFO:2026-08-18T23:02:29Z:root:syncing...
Deleted branch merge (was a15cc98a5696).
Switched to a new branch 'merge'
branch 'merge' set up to track 'origin/main'.
[merge 3468a0e1c2f6] [gn build] Port ab547095ead5
 1 file changed, 1 insertion(+)
[gn build] Port ab547095ead5 -- https://github.com/llvm/llvm-project/commit/ab547095ead5
INFO:2026-08-18T23:02:30Z:root:building
ninja: Entering directory `out/gn'
[0/1] Regenerating ninja files
[1/990] COPY ../../libcxxabi/include/__cxxabi_config.h include/c++/v1/__cxxabi_config.h
[2/990] COPY ../../libcxxabi/include/cxxabi.h include/c++/v1/cxxabi.h
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[267/990] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.GCNNSAReassign.o
[268/990] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600MachineCFGStructurizer.o
[269/990] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPULowerModuleLDSPass.o
[270/990] CXX obj/llvm/lib/IR/IR.Verifier.o
[271/990] AR lib/libLLVMCore.a
[272/990] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUSwLowerLDS.o
[273/990] LINK ./bin/llvm-pdbutil
[274/990] CXX obj/llvm/lib/CodeGen/GlobalISel/GlobalISel.CombinerHelper.o
[275/990] AR lib/libLLVMAnalysis.a
[276/990] AR lib/libLLVMTarget.a
[277/990] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPULowerBufferFatPointers.o
[278/990] CXX obj/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.AsmPrinter.o
[279/990] LINK obj/llvm/unittests/ObjCopy/ObjCopyTests
[280/990] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIOptimizeExecMasking.o
[281/990] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIOptimizeExecMaskingPreRA.o
[282/990] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUPreLegalizerCombiner.o
[283/990] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SILoadStoreOptimizer.o
[284/990] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SILowerI1Copies.o
[285/990] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SILateBranchLowering.o
[286/990] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SILowerWWMCopies.o
[287/990] CXX obj/llvm/lib/Target/AArch64/LLVMAArch64CodeGen.AArch64TargetMachine.o
[288/990] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUPromoteAlloca.o
[289/990] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIFormMemoryClauses.o
[290/990] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIFixSGPRCopies.o
[291/990] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPURegisterBankInfo.o
[292/990] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonGenExtract.o
[293/990] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUPostLegalizerCombiner.o
[294/990] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMFixCortexA57AES1742098Pass.o
[295/990] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPURegBankCombiner.o
[296/990] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SILowerSGPRSpills.o
[297/990] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonCommonGEP.o
[298/990] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIPreAllocateWWMRegs.o
[299/990] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIFoldOperands.o
[300/990] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600ISelLowering.o
[301/990] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIWholeQuadMode.o
[302/990] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMLegalizerInfo.o
[303/990] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUISelDAGToDAG.o
[304/990] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonExpandCondsets.o
[305/990] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.MVEGatherScatterLowering.o
[306/990] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIOptimizeVGPRLiveRange.o
[307/990] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.MVELaneInterleavingPass.o
[308/990] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonGenPredicate.o
[309/990] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCCTRLoopsVerify.o
[310/990] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.MVETPAndVPTOptimisationsPass.o
[311/990] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonHVXSaveRemark.o
[312/990] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonBitSimplify.o
[313/990] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonNewValueJump.o
[314/990] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXMarkKernelPtrsGlobal.o
[315/990] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCBranchCoalescing.o
[316/990] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonConstExtenders.o
[317/990] CXX obj/llvm/lib/Target/LoongArch/LLVMLoongArchCodeGen.LoongArchDeadRegisterDefinitions.o
[318/990] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonVectorLoopCarriedReuse.o
[319/990] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonLoadStoreWidening.o
[320/990] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonLiveVariables.o
[321/990] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXPromoteParamAlign.o
[322/990] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPULegalizerInfo.o
[323/990] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonHardwareLoops.o
[324/990] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsPreLegalizerCombiner.o
[325/990] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMLowOverheadLoops.o
[326/990] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXLowerAggrCopies.o
[327/990] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonRDFOpt.o
[328/990] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonOptAddrMode.o
[329/990] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsLegalizerInfo.o
[330/990] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIInsertWaitcnts.o
[331/990] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCCTRLoops.o
[332/990] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonVLIWPacketizer.o
[333/990] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCReduceCRLogicals.o
[334/990] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMLoadStoreOptimizer.o
[335/990] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonGenInsert.o
[336/990] CXX obj/llvm/lib/Target/AArch64/GISel/LLVMAArch64CodeGen.AArch64InstructionSelector.o
[337/990] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonPostRAHandleQFP.o
[338/990] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXLowerArgs.o
[339/990] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCTLSDynamicCall.o
[340/990] AR lib/libLLVMCFGuard.a
[341/990] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCVSXFMAMutate.o
[342/990] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsRegisterBankInfo.o
[343/990] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600TargetMachine.o
[344/990] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonLoopIdiomRecognition.o
[345/990] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonGlobalScheduler.o
[346/990] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCMIPeephole.o
[347/990] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMTargetMachine.o
[348/990] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVDeadRegisterDefinitions.o
[349/990] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVMachineScheduler.o
[350/990] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVVSETVLIInfoAnalysis.o
[351/990] CXX obj/llvm/lib/Target/WebAssembly/GISel/LLVMWebAssemblyCodeGen.WebAssemblyLegalizerInfo.o
[352/990] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVZilsdOptimizer.o
[353/990] CXX obj/llvm/lib/Target/RISCV/GISel/LLVMRISCVCodeGen.RISCVLegalizerInfo.o
[354/990] CXX obj/llvm/lib/Transforms/Utils/Utils.EntryExitInstrumenter.o
[355/990] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsTargetMachine.o
[356/990] CXX obj/llvm/lib/Transforms/ObjCARC/ObjCARC.ObjCARCContract.o
[357/990] CXX obj/llvm/lib/Target/WebAssembly/LLVMWebAssemblyCodeGen.WebAssemblyExceptionInfo.o
[358/990] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVCodeGenPrepare.o
[359/990] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVInsertVSETVLI.o
[360/990] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsPostLegalizerCombiner.o
[361/990] CXX obj/llvm/lib/Target/Lanai/LLVMLanaiCodeGen.LanaiCodeGenPassBuilder.o
[362/990] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFTargetMachine.o
[363/990] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCLoopInstrFormPrep.o
[364/990] CXX obj/llvm/lib/Transforms/Utils/Utils.CanonicalizeFreezeInLoops.o
[365/990] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVVLOptimizer.o
[366/990] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86AvoidStoreForwardingBlocks.o
[367/990] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86CleanupLocalDynamicTLS.o
[368/990] CXX obj/llvm/lib/Transforms/Scalar/Scalar.Scalar.o
[369/990] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86GlobalBaseReg.o
[370/990] CXX obj/llvm/lib/Transforms/Utils/Utils.FixIrreducible.o
[371/990] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVPromoteConstant.o
[372/990] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVZacasABIFix.o
[373/990] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonTargetMachine.o
[374/990] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVGatherScatterLowering.o
[375/990] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVSubtarget.o
[376/990] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86FloatingPoint.o
[377/990] CXX obj/llvm/lib/Target/X86/GISel/LLVMX86CodeGen.X86LegalizerInfo.o
[378/990] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86CmovConversion.o
[379/990] ACTION //llvm/test:lit_site_cfg(//llvm/utils/gn/build/toolchain:unix)
FAILED: gen/llvm/test/lit.site.cfg.py 
python3 ../../llvm/utils/gn/build/write_cmake_config.py -o gen/llvm/test/lit.site.cfg.py ../../llvm/test/lit.site.cfg.py.in LIT_SITE_CFG_IN_HEADER=\#\#\ Autogenerated\ from\ //llvm/test/lit.site.cfg.py.in,\ do\ not\ edit\\n\\n\#\ Takes\ a\ path\ that\'s\ relative\ to\ __file__\ and\ makes\ it\ absolute.\\ndef\ path\(p\):\\n\ \ \ \ return\ os.path.abspath\(os.path.join\(__file__,\ \'..\',\ p\)\)\ if\ p\ else\ \'\' LLVM_BINARY_DIR=../../../obj/llvm LLVM_SOURCE_DIR=../../../../../llvm LLVM_TOOLS_DIR=../../../bin SHLIBDIR=../../../lib BUILD_SHARED_LIBS=0 HOST_CC=cc HOST_CXX=c++ HOST_LDFLAGS= ENABLE_BACKTRACES=1 LLVM_APPEND_VC_REV=0 LLVM_ENABLE_FFI=0 LLVM_ENABLE_HTTPLIB=0 LLVM_ENABLE_PROFCHECK=0 LLVM_FORCE_VC_REVISION= LLVM_HAS_LOGF128=0 LLVM_HAVE_OPT_VIEWER_MODULES=0 LLVM_HOST_TRIPLE=x86_64-unknown-linux-gnu LLVM_INCLUDE_DXIL_TESTS=0 LLVM_INCLUDE_SPIRV_TOOLS_TESTS=0 LLVM_LIBS_DIR=../../../lib LLVM_LINK_LLVM_DYLIB=0 LLVM_LIT_TOOLS_DIR= LLVM_IR2VEC_TEST_PYTHON_BINDINGS=0 LLVM_IR2VEC_BINDINGS_DIR= LLVM_NATIVE_ARCH=X86 LLVM_TOOL_LLVM_DRIVER_BUILD=0 LLVM_USE_INTEL_JITEVENTS=0 LLVM_USE_SANITIZER= LLVM_VERSION_MAJOR=24 LLVM_VERSION_MINOR=0 LLVM_VERSION_SUFFIX=git Python3_EXECUTABLE=python3 TARGETS_TO_BUILD=AArch64\ AMDGPU\ ARM\ AVR\ BPF\ Hexagon\ Lanai\ LoongArch\ Mips\ NVPTX\ PowerPC\ RISCV\ Sparc\ SystemZ\ WebAssembly\ X86 LLVM_TARGET_TRIPLE=x86_64-unknown-linux-gnu LLVM_LIBCXX_USED=0 LLVM_BINDINGS= LLVM_BYE_LINK_INTO_TOOLS=0 LLVM_EXAMPLEIRTRANSFORMS_LINK_INTO_TOOLS=0 HAVE_OCAMLOPT=0 OCAMLFIND=OCAMLFIND-NOTFOUND OCAMLFLAGS= LLVM_INCLUDE_EXAMPLES=0 LLVM_HAVE_OPENCSD=0 LLVM_HAVE_TF_AOT=0 LLVM_HAVE_TFLITE=0 LLVM_INLINER_MODEL_AUTOGENERATED=0 LLVM_RAEVICT_MODEL_AUTOGENERATED=0 PTXAS_EXECUTABLE= HOST_ARCH=x86_64 EXEEXT= LLVM_ENABLE_PLUGINS=1 LLVM_LIT_ERRC_MESSAGES= LLVM_PLUGIN_EXT=.so SHLIBEXT=.so HOST_OS=Linux GOLD_EXECUTABLE=ld CMAKE_OSX_SYSROOT= CMAKE_XCRUN= LD64_EXECUTABLE= ENABLE_ASSERTIONS=1 LLVM_ENABLE_DIA_SDK=0 LLVM_ENABLE_LIBXML2=1 LLVM_ENABLE_ONDISK_CAS=1 LLVM_ENABLE_EXPENSIVE_CHECKS=0 LLVM_ENABLE_THREADS=1 LLVM_ENABLE_ZLIB=1 LLVM_ENABLE_ZSTD=0 LLVM_ENABLE_CURL=0 LLVM_ENABLE_REVERSE_ITERATION=0
Traceback (most recent call last):
  File "/usr/local/google/home/thakis/src/llvm-project/out/gn/../../llvm/utils/gn/build/write_cmake_config.py", line 126, in <module>
    sys.exit(main())
             ~~~~^^
  File "/usr/local/google/home/thakis/src/llvm-project/out/gn/../../llvm/utils/gn/build/write_cmake_config.py", line 76, in main
    in_line = var_re.sub(repl, in_line)
  File "/usr/local/google/home/thakis/src/llvm-project/out/gn/../../llvm/utils/gn/build/write_cmake_config.py", line 74, in repl
    return values[key]
           ~~~~~~^^^^^
KeyError: 'LLVM_HAVE_MLIR_LOWERING'
[380/990] CXX obj/llvm/lib/Transforms/Scalar/Scalar.DCE.o
[381/990] CXX obj/llvm/lib/Target/RISCV/GISel/LLVMRISCVCodeGen.RISCVPostLegalizerCombiner.o
[382/990] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCTargetMachine.o
[383/990] CXX obj/llvm/lib/Transforms/Scalar/Scalar.FlattenCFGPass.o
[384/990] CXX obj/llvm/lib/Transforms/Scalar/Scalar.LowerAtomicPass.o
[385/990] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86LowerAMXType.o
[386/990] CXX obj/llvm/lib/Transforms/Scalar/Scalar.InstSimplifyPass.o
[387/990] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonVectorCombine.o
[388/990] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFCodeGenPassBuilder.o
[389/990] CXX obj/llvm/lib/Target/RISCV/GISel/LLVMRISCVCodeGen.RISCVO0PreLegalizerCombiner.o
[390/990] CXX obj/llvm/lib/Transforms/Scalar/Scalar.Reg2Mem.o
[391/990] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86LowerAMXIntrinsics.o
[392/990] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86LoadValueInjectionLoadHardening.o
[393/990] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86TileConfig.o
[394/990] CXX obj/llvm/lib/Target/RISCV/GISel/LLVMRISCVCodeGen.RISCVPreLegalizerCombiner.o
[395/990] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIISelLowering.o
[396/990] CXX obj/llvm/lib/Transforms/Scalar/Scalar.Sink.o
[397/990] CXX obj/llvm/lib/Target/WebAssembly/GISel/LLVMWebAssemblyCodeGen.WebAssemblyPreLegalizerCombiner.o
[398/990] CXX obj/llvm/lib/Transforms/Scalar/Scalar.LogicalSROA.o
[399/990] CXX obj/llvm/lib/Transforms/Utils/Utils.BreakCriticalEdges.o
[400/990] CXX obj/llvm/lib/Transforms/Scalar/Scalar.ConstantHoisting.o
[401/990] CXX obj/llvm/lib/Target/WebAssembly/GISel/LLVMWebAssemblyCodeGen.WebAssemblyPostLegalizerCombiner.o
[402/990] CXX obj/llvm/lib/Target/X86/GISel/LLVMX86CodeGen.X86PostLegalizerCombiner.o
[403/990] CXX obj/llvm/lib/Target/X86/GISel/LLVMX86CodeGen.X86PreLegalizerCombiner.o
[404/990] CXX obj/llvm/lib/Transforms/Scalar/Scalar.SpeculativeExecution.o
[405/990] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86PreTileConfig.o
[406/990] CXX obj/llvm/lib/Transforms/Scalar/Scalar.PlaceSafepoints.o
[407/990] CXX obj/llvm/lib/Transforms/Scalar/Scalar.PartiallyInlineLibCalls.o
[408/990] CXX obj/llvm/lib/Transforms/Scalar/Scalar.EarlyCSE.o
[409/990] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVTargetMachine.o
[410/990] CXX obj/llvm/lib/Transforms/Scalar/Scalar.LoopDataPrefetch.o
[411/990] CXX obj/llvm/lib/Transforms/Scalar/Scalar.SimplifyCFGPass.o
[412/990] CXX obj/llvm/lib/Transforms/Scalar/Scalar.InferAddressSpaces.o
[413/990] CXX obj/llvm/lib/Transforms/Scalar/Scalar.NaryReassociate.o
[414/990] CXX obj/llvm/lib/Transforms/Scalar/Scalar.LoopTermFold.o
[415/990] CXX obj/llvm/lib/Transforms/Scalar/Scalar.SeparateConstOffsetFromGEP.o
[416/990] CXX obj/llvm/lib/Transforms/Scalar/Scalar.TailRecursionElimination.o
[417/990] CXX obj/llvm/lib/Transforms/Utils/Utils.LCSSA.o
[418/990] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86AsmPrinter.o
[419/990] CXX obj/llvm/lib/Transforms/Scalar/Scalar.ScalarizeMaskedMemIntrin.o
[420/990] CXX obj/llvm/lib/Target/WebAssembly/LLVMWebAssemblyCodeGen.WebAssemblyTargetMachine.o
[421/990] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXCodeGenPassBuilder.o
[422/990] CXX obj/llvm/lib/Transforms/Scalar/Scalar.Scalarizer.o
[423/990] CXX obj/llvm/lib/Target/AArch64/LLVMAArch64CodeGen.AArch64ISelLowering.o
[424/990] CXX obj/llvm/lib/Transforms/Scalar/Scalar.DeadStoreElimination.o
[425/990] CXX obj/llvm/lib/Transforms/Scalar/Scalar.StraightLineStrengthReduce.o
[426/990] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86MCInstLower.o
[427/990] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86TargetMachine.o
[428/990] CXX obj/llvm/lib/Transforms/Scalar/Scalar.LoopUnrollPass.o
[429/990] CXX obj/llvm/lib/Transforms/Scalar/Scalar.Reassociate.o
[430/990] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUInstructionSelector.o
[431/990] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVCodeGenPassBuilder.o
[432/990] CXX obj/llvm/lib/Transforms/Scalar/Scalar.StructurizeCFG.o
[433/990] CXX obj/llvm/lib/Transforms/Scalar/Scalar.LICM.o
[434/990] CXX obj/llvm/lib/Transforms/Scalar/Scalar.GVN.o
[435/990] CXX obj/llvm/lib/Target/WebAssembly/LLVMWebAssemblyCodeGen.WebAssemblyCodeGenPassBuilder.o
[436/990] CXX obj/llvm/lib/Transforms/InstCombine/InstCombine.InstructionCombining.o
[437/990] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86CodeGenPassBuilder.o
[438/990] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUTargetMachine.o
[439/990] CXX obj/llvm/lib/Transforms/Scalar/Scalar.SROA.o
[440/990] CXX obj/llvm/lib/Transforms/Scalar/Scalar.LoopStrengthReduce.o
[441/990] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVISelLowering.o
[442/990] CXX obj/llvm/lib/Passes/Passes.PassBuilder.o
[443/990] CXX obj/llvm/lib/Target/RISCV/GISel/LLVMRISCVCodeGen.RISCVInstructionSelector.o
[444/990] CXX obj/llvm/lib/Target/AArch64/LLVMAArch64CodeGen.AArch64Subtarget.o
ninja: build stopped: subcommand failed.
Command '['ninja', '-C', 'out/gn']' returned non-zero exit status 1.