INFO:2026-09-21T11:49:38Z:root:pulling...
From github.com:llvm/llvm-project
 * branch                      main       -> FETCH_HEAD
   72e9d33d2945..0da8b0febd7d  main       -> origin/main
Switched to branch 'main'
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HEAD is now at 0da8b0febd7d [MachineScheduler](NFC) Remove separate handling for non-alias loads and stores (#224310)
INFO:2026-09-21T11:49:43Z:root:syncing...
Deleted branch merge (was a87a65b1bc4e).
Switched to a new branch 'merge'
branch 'merge' set up to track 'origin/main'.
[merge 8d511921f139] [gn build] Port 3eaddb5735f6
 1 file changed, 1 insertion(+)
[merge 32cfea251afe] [gn build] Port d0dc3b038f52
 1 file changed, 1 insertion(+)
[gn build] Port 3eaddb5735f6 -- https://github.com/llvm/llvm-project/commit/3eaddb5735f6
[gn build] Port d0dc3b038f52 -- https://github.com/llvm/llvm-project/commit/d0dc3b038f52
INFO:2026-09-21T11:49:46Z:root:building
ninja: Entering directory `out/gn'
[0/1] Regenerating ninja files
[1/521] COPY ../../libcxxabi/include/__cxxabi_config.h include/c++/v1/__cxxabi_config.h
[2/521] COPY ../../libcxxabi/include/cxxabi.h include/c++/v1/cxxabi.h
[3/521] AR lib/libLLVMRISCVAsmParser.a
[4/521] ACTION //libcxx/include:copy_headers(//llvm/utils/gn/build/toolchain:unix)
[5/521] CXX obj/llvm/lib/Target/Mips/MCTargetDesc/MCTargetDesc.MipsMCTargetDesc.o
FAILED: obj/llvm/lib/Target/Mips/MCTargetDesc/MCTargetDesc.MipsMCTargetDesc.o 
../../../chrome/src/third_party/llvm-build/Release+Asserts/bin/clang++ -MMD -MF obj/llvm/lib/Target/Mips/MCTargetDesc/MCTargetDesc.MipsMCTargetDesc.o.d -o obj/llvm/lib/Target/Mips/MCTargetDesc/MCTargetDesc.MipsMCTargetDesc.o -c ../../llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp  -I../../llvm/lib/Target/Mips -I../../llvm/include -Igen/llvm/include -Igen/llvm/lib/Target/Mips/MCTargetDesc -I. -O3 -fdiagnostics-color -Wall -Wextra -Wno-unused-parameter -Wdelete-non-virtual-dtor -Wstring-conversion -no-canonical-prefixes -Werror=date-time -fdebug-compilation-dir=. --sysroot=../../sysroot -Wpoison-system-directories -fPIC -Wcovered-switch-default -std=c++17 -fvisibility-inlines-hidden -fno-exceptions -fno-rtti
../../llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp:49:10: fatal error: 'MipsGenAsmMatcher.inc' file not found
   49 | #include "MipsGenAsmMatcher.inc"
      |          ^~~~~~~~~~~~~~~~~~~~~~~
1 error generated.
[6/521] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCMachineScheduler.o
[7/521] CXX obj/llvm/lib/CodeGen/CodeGen.MacroFusion.o
[8/521] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonHazardRecognizer.o
[9/521] CXX obj/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.ResourcePriorityQueue.o
[10/521] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonMachineScheduler.o
[11/521] CXX obj/llvm/lib/CodeGen/CodeGen.DFAPacketizer.o
[12/521] CXX obj/llvm/lib/CodeGen/CodeGen.PostRASchedulerList.o
[13/521] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUExportClustering.o
[14/521] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600MachineScheduler.o
[15/521] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUHazardLatency.o
[16/521] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVExpandPseudoBase.o
[17/521] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600Packetizer.o
[18/521] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUBarrierLatency.o
[19/521] CXX obj/llvm/lib/CodeGen/CodeGen.VLIWMachineScheduler.o
[20/521] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVDeadRegisterDefinitions.o
[21/521] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVExpandPseudoPostRA.o
[22/521] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCSubtarget.o
[23/521] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVExpandPseudoAtomics.o
[24/521] CXX obj/llvm/lib/Target/RISCV/GISel/LLVMRISCVCodeGen.RISCVRegisterBankInfo.o
[25/521] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.GCNVOPDUtils.o
[26/521] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVExpandPseudoPreEmit.o
[27/521] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonSubtarget.o
[28/521] CXX obj/llvm/lib/CodeGen/CodeGen.ScheduleDAGInstrs.o
[29/521] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.GCNCreateVOPD.o
[30/521] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonVLIWPacketizer.o
[31/521] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMMacroFusion.o
[32/521] CXX obj/llvm/lib/Target/RISCV/GISel/LLVMRISCVCodeGen.RISCVCallLowering.o
[33/521] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVCallingConv.o
[34/521] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600InstrInfo.o
[35/521] CXX obj/llvm/lib/CodeGen/CodeGen.WindowScheduler.o
[36/521] CXX obj/llvm/lib/Target/AArch64/LLVMAArch64CodeGen.AArch64MachineScheduler.o
[37/521] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMLatencyMutations.o
[38/521] CXX obj/llvm/lib/Target/AArch64/LLVMAArch64CodeGen.AArch64MacroFusion.o
[39/521] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVCodeGenPrepare.o
[40/521] CXX obj/llvm/lib/CodeGen/CodeGen.TargetInstrInfo.o
[41/521] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUCoExecSchedStrategy.o
[42/521] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUSubtarget.o
[43/521] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.GCNIterativeScheduler.o
[44/521] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIMachineScheduler.o
[45/521] CXX obj/llvm/lib/Target/RISCV/GISel/LLVMRISCVCodeGen.RISCVLegalizerInfo.o
[46/521] CXX obj/llvm/lib/Target/RISCV/GISel/LLVMRISCVCodeGen.RISCVO0PreLegalizerCombiner.o
[47/521] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.GCNSubtarget.o
[48/521] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCTargetMachine.o
[49/521] CXX obj/llvm/lib/Target/RISCV/GISel/LLVMRISCVCodeGen.RISCVPostLegalizerCombiner.o
[50/521] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVAsmPrinter.o
[51/521] CXX obj/llvm/lib/Target/RISCV/LLVMRISCVCodeGen.RISCVCodeGenPassBuilder.o
[52/521] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonInstrInfo.o
[53/521] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonGlobalScheduler.o
[54/521] CXX obj/llvm/lib/Target/NVPTX/LLVMNVPTXCodeGen.NVPTXCodeGenPassBuilder.o
[55/521] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600TargetMachine.o
[56/521] CXX obj/llvm/lib/Target/RISCV/GISel/LLVMRISCVCodeGen.RISCVPreLegalizerCombiner.o
[57/521] CXX obj/llvm/lib/CodeGen/CodeGen.MachineScheduler.o
[58/521] CXX obj/llvm/lib/Passes/Passes.CodeGenPassBuilder.o
[59/521] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonTargetMachine.o
[60/521] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUIGroupLP.o
[61/521] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMTargetMachine.o
[62/521] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMBaseInstrInfo.o
[63/521] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.GCNSchedStrategy.o
[64/521] CXX obj/llvm/lib/Target/AArch64/LLVMAArch64CodeGen.AArch64TargetMachine.o
[65/521] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIInstrInfo.o
[66/521] CXX obj/llvm/lib/CodeGen/CodeGen.MachinePipeliner.o
[67/521] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUTargetMachine.o
[68/521] CXX obj/llvm/lib/Target/RISCV/GISel/LLVMRISCVCodeGen.RISCVInstructionSelector.o
[69/521] CXX obj/llvm/lib/Passes/Passes.PassBuilder.o
[70/521] CXX obj/llvm/lib/Target/AArch64/LLVMAArch64CodeGen.AArch64Subtarget.o
ninja: build stopped: subcommand failed.
Command '['ninja', '-C', 'out/gn']' returned non-zero exit status 1.