gn analyze output: { "compile_targets": [], "status": "Found dependency", "test_targets": [ "//clang-tools-extra/clangd/test:check-clangd", "//clang-tools-extra/test:check-clang-tools", "//clang/test:check-clang", "//lld/test:check-lld", "//llvm/test:check-llvm" ] } gn analyze input: { "files": [ "//llvm/lib/CodeGen/MachineInstr.cpp", "//llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp", "//llvm/lib/Target/RISCV/RISCVInstrInfo.cpp", "//llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp", "//llvm/test/CodeGen/LoongArch/lsx/vec-trunc.ll", "//llvm/test/CodeGen/RISCV/early-clobber-tied-def-subreg-liveness.ll", "//llvm/test/CodeGen/RISCV/intrinsic-cttz-elts-vscale.ll", "//llvm/test/CodeGen/RISCV/pr69586.ll", "//llvm/test/CodeGen/RISCV/regalloc-last-chance-recoloring-failure.ll", "//llvm/test/CodeGen/RISCV/rvv/bitreverse-sdnode.ll", "//llvm/test/CodeGen/RISCV/rvv/bitreverse-vp.ll", "//llvm/test/CodeGen/RISCV/rvv/bswap-sdnode.ll", "//llvm/test/CodeGen/RISCV/rvv/bswap-vp.ll", "//llvm/test/CodeGen/RISCV/rvv/callee-saved-regs.ll", "//llvm/test/CodeGen/RISCV/rvv/calling-conv-fastcc.ll", "//llvm/test/CodeGen/RISCV/rvv/combine-reduce-add-to-vcpop.ll", "//llvm/test/CodeGen/RISCV/rvv/ctpop-vp.ll", "//llvm/test/CodeGen/RISCV/rvv/cttz-vp.ll", "//llvm/test/CodeGen/RISCV/rvv/expandload.ll", "//llvm/test/CodeGen/RISCV/rvv/fixed-vector-i8-index-cornercase.ll", "//llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse-vp.ll", "//llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap-vp.ll", "//llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz-vp.ll", "//llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctpop-vp.ll", "//llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz-vp.ll", "//llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fmaximum-vp.ll", "//llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fminimum-vp.ll", "//llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fpowi.ll", "//llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fshr-fshl-vp.ll", "//llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-explodevector.ll", "//llvm/test/CodeGen/RISCV/rvv/fixed-vectors-interleaved-access.ll", "//llvm/test/CodeGen/RISCV/rvv/fixed-vectors-llrint.ll", "//llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-fp.ll", "//llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int.ll", "//llvm/test/CodeGen/RISCV/rvv/fixed-vectors-select-addsub.ll", "//llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-fp-vp.ll", "//llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-int-vp.ll", "//llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-fp-interleave.ll", "//llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-int-interleave.ll", "//llvm/test/CodeGen/RISCV/rvv/fixed-vectors-trunc-vp.ll", "//llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vcopysign-vp.ll", "//llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfma-vp.ll", "//llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmax-vp.ll", "//llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmin-vp.ll", "//llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmuladd-vp.ll", "//llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwadd.ll", "//llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwmul.ll", "//llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwsub.ll", "//llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpmerge.ll", "//llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpscatter.ll", "//llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vscale-range.ll", "//llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vselect-vp.ll", "//llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwadd.ll", "//llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwaddu.ll", "//llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmul.ll", "//llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmulsu.ll", "//llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmulu.ll", "//llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwsub.ll", "//llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwsubu.ll", "//llvm/test/CodeGen/RISCV/rvv/fmaximum-sdnode.ll", "//llvm/test/CodeGen/RISCV/rvv/fmaximum-vp.ll", "//llvm/test/CodeGen/RISCV/rvv/fminimum-sdnode.ll", "//llvm/test/CodeGen/RISCV/rvv/fminimum-vp.ll", "//llvm/test/CodeGen/RISCV/rvv/fpclamptosat_vec.ll", "//llvm/test/CodeGen/RISCV/rvv/frm-insert.ll", "//llvm/test/CodeGen/RISCV/rvv/fshr-fshl-vp.ll", "//llvm/test/CodeGen/RISCV/rvv/mscatter-sdnode.ll", "//llvm/test/CodeGen/RISCV/rvv/pr63596.ll", "//llvm/test/CodeGen/RISCV/rvv/reg-alloc-reserve-bp.ll", "//llvm/test/CodeGen/RISCV/rvv/remat.ll", "//llvm/test/CodeGen/RISCV/rvv/rv32-spill-vector-csr.ll", "//llvm/test/CodeGen/RISCV/rvv/rv32-spill-vector.ll", "//llvm/test/CodeGen/RISCV/rvv/rv32-spill-zvlsseg.ll", "//llvm/test/CodeGen/RISCV/rvv/rv64-spill-vector-csr.ll", "//llvm/test/CodeGen/RISCV/rvv/rv64-spill-vector.ll", "//llvm/test/CodeGen/RISCV/rvv/rv64-spill-zvlsseg.ll", "//llvm/test/CodeGen/RISCV/rvv/rvv-cfi-info.ll", "//llvm/test/CodeGen/RISCV/rvv/setcc-fp-vp.ll", "//llvm/test/CodeGen/RISCV/rvv/setcc-int-vp.ll", "//llvm/test/CodeGen/RISCV/rvv/stack-folding.ll", "//llvm/test/CodeGen/RISCV/rvv/stack-slot-coloring.ll", "//llvm/test/CodeGen/RISCV/rvv/stack-slot-coloring.mir", "//llvm/test/CodeGen/RISCV/rvv/stores-of-loads-merging.ll", "//llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-fixed.ll", "//llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-load.ll", "//llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll", "//llvm/test/CodeGen/RISCV/rvv/vfadd-constrained-sdnode.ll", "//llvm/test/CodeGen/RISCV/rvv/vfadd-sdnode.ll", "//llvm/test/CodeGen/RISCV/rvv/vfadd-vp.ll", "//llvm/test/CodeGen/RISCV/rvv/vfdiv-constrained-sdnode.ll", "//llvm/test/CodeGen/RISCV/rvv/vfdiv-sdnode.ll", "//llvm/test/CodeGen/RISCV/rvv/vfdiv-vp.ll", "//llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll", "//llvm/test/CodeGen/RISCV/rvv/vfmadd-constrained-sdnode.ll", "//llvm/test/CodeGen/RISCV/rvv/vfmadd-sdnode.ll", "//llvm/test/CodeGen/RISCV/rvv/vfmax-sdnode.ll", "//llvm/test/CodeGen/RISCV/rvv/vfmax-vp.ll", "//llvm/test/CodeGen/RISCV/rvv/vfmin-sdnode.ll", "//llvm/test/CodeGen/RISCV/rvv/vfmin-vp.ll", "//llvm/test/CodeGen/RISCV/rvv/vfmsub-constrained-sdnode.ll", "//llvm/test/CodeGen/RISCV/rvv/vfmul-constrained-sdnode.ll", "//llvm/test/CodeGen/RISCV/rvv/vfmul-sdnode.ll", "//llvm/test/CodeGen/RISCV/rvv/vfmul-vp.ll", "//llvm/test/CodeGen/RISCV/rvv/vfmuladd-vp.ll", "//llvm/test/CodeGen/RISCV/rvv/vfnmadd-constrained-sdnode.ll", "//llvm/test/CodeGen/RISCV/rvv/vfnmsub-constrained-sdnode.ll", "//llvm/test/CodeGen/RISCV/rvv/vfptrunc-vp.ll", "//llvm/test/CodeGen/RISCV/rvv/vfsub-constrained-sdnode.ll", "//llvm/test/CodeGen/RISCV/rvv/vfsub-sdnode.ll", "//llvm/test/CodeGen/RISCV/rvv/vfsub-vp.ll", "//llvm/test/CodeGen/RISCV/rvv/vpmerge-sdnode.ll", "//llvm/test/CodeGen/RISCV/rvv/vpscatter-sdnode.ll", "//llvm/test/CodeGen/RISCV/rvv/vselect-vp.ll", "//llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll", "//llvm/test/CodeGen/RISCV/rvv/vtrunc-vp.ll", "//llvm/test/CodeGen/RISCV/rvv/vxrm-insert.ll", "//llvm/test/CodeGen/RISCV/srem-seteq-illegal-types.ll", "//mlir/include/mlir/TableGen/Attribute.h", "//mlir/include/mlir/TableGen/EnumInfo.h", "//mlir/include/mlir/TableGen/Pattern.h", "//mlir/lib/TableGen/Attribute.cpp", "//mlir/lib/TableGen/CMakeLists.txt", "//mlir/lib/TableGen/EnumInfo.cpp", "//mlir/lib/TableGen/Pattern.cpp", "//mlir/tools/mlir-tblgen/EnumPythonBindingGen.cpp", "//mlir/tools/mlir-tblgen/EnumsGen.cpp", "//mlir/tools/mlir-tblgen/LLVMIRConversionGen.cpp", "//mlir/tools/mlir-tblgen/OpDocGen.cpp", "//mlir/tools/mlir-tblgen/OpFormatGen.cpp", "//mlir/tools/mlir-tblgen/RewriterGen.cpp", "//mlir/tools/mlir-tblgen/SPIRVUtilsGen.cpp", "//mlir/tools/mlir-tblgen/TosaUtilsGen.cpp" ], "test_targets": [ "//clang-tools-extra/clangd/test:check-clangd", "//clang-tools-extra/test:check-clang-tools", "//clang/test:check-clang", "//lld/test:check-lld", "//llvm/test:check-llvm" ], "additional_compile_targets": [] }