ninja: Entering directory `out/gn'
[0/2] ACTION //clang/test:check-clang(//llvm/utils/gn/build/toolchain:unix)
llvm-lit: /Users/thakis/src/llvm-project/llvm/utils/lit/lit/llvm/config.py:520: note: using clang: /Users/thakis/src/llvm-project/out/gn/bin/clang
llvm-lit: /Users/thakis/src/llvm-project/llvm/utils/lit/lit/llvm/subst.py:126: note: Did not find cir-opt in /Users/thakis/src/llvm-project/out/gn/bin:/Users/thakis/src/llvm-project/out/gn/bin
llvm-lit: /Users/thakis/src/llvm-project/llvm/utils/lit/lit/util.py:473: note: using SDKROOT: '/Applications/Xcode.app/Contents/Developer/Platforms/MacOSX.platform/Developer/SDKs/MacOSX13.1.sdk'
llvm-lit: /Users/thakis/src/llvm-project/llvm/utils/lit/lit/llvm/config.py:520: note: using ld.lld: /Users/thakis/src/llvm-project/out/gn/bin/ld.lld
llvm-lit: /Users/thakis/src/llvm-project/llvm/utils/lit/lit/llvm/config.py:520: note: using lld-link: /Users/thakis/src/llvm-project/out/gn/bin/lld-link
llvm-lit: /Users/thakis/src/llvm-project/llvm/utils/lit/lit/llvm/config.py:520: note: using ld64.lld: /Users/thakis/src/llvm-project/out/gn/bin/ld64.lld
llvm-lit: /Users/thakis/src/llvm-project/llvm/utils/lit/lit/llvm/config.py:520: note: using wasm-ld: /Users/thakis/src/llvm-project/out/gn/bin/wasm-ld
-- Testing: 21153 tests, 8 workers --
Testing: 
FAIL: Clang :: CodeGen/arm-neon-directed-rounding-constrained.c (1 of 21153)
******************** TEST 'Clang :: CodeGen/arm-neon-directed-rounding-constrained.c' FAILED ********************
Exit Code: 1

Command Output (stderr):
--
/Users/thakis/src/llvm-project/out/gn/bin/clang -cc1 -internal-isystem /Users/thakis/src/llvm-project/out/gn/lib/clang/21/include -nostdsysteminc -triple thumbv8-linux-gnueabihf -target-cpu cortex-a57      -ffreestanding -disable-O0-optnone -emit-llvm /Users/thakis/src/llvm-project/clang/test/CodeGen/arm-neon-directed-rounding-constrained.c -o - |      /Users/thakis/src/llvm-project/out/gn/bin/opt -S -passes=mem2reg | /Users/thakis/src/llvm-project/out/gn/bin/FileCheck -check-prefixes=COMMON,COMMONIR,UNCONSTRAINED /Users/thakis/src/llvm-project/clang/test/CodeGen/arm-neon-directed-rounding-constrained.c # RUN: at line 1
+ /Users/thakis/src/llvm-project/out/gn/bin/clang -cc1 -internal-isystem /Users/thakis/src/llvm-project/out/gn/lib/clang/21/include -nostdsysteminc -triple thumbv8-linux-gnueabihf -target-cpu cortex-a57 -ffreestanding -disable-O0-optnone -emit-llvm /Users/thakis/src/llvm-project/clang/test/CodeGen/arm-neon-directed-rounding-constrained.c -o -
+ /Users/thakis/src/llvm-project/out/gn/bin/opt -S -passes=mem2reg
+ /Users/thakis/src/llvm-project/out/gn/bin/FileCheck -check-prefixes=COMMON,COMMONIR,UNCONSTRAINED /Users/thakis/src/llvm-project/clang/test/CodeGen/arm-neon-directed-rounding-constrained.c
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-neon-directed-rounding-constrained.c:40:14: error: COMMONIR: expected string not found in input
// COMMONIR: [[TMP0:%.*]] = bitcast <2 x float> %a to <8 x i8>
             ^
<stdin>:7:45: note: scanning from here
define dso_local <2 x float> @test_vrndi_f32(<2 x float> noundef %a) #0 {
                                            ^
<stdin>:13:8: note: possible intended match here
 %vrndi_v.i = bitcast <8 x i8> %0 to <2 x float>
       ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-neon-directed-rounding-constrained.c:52:14: error: COMMONIR: expected string not found in input
// COMMONIR: [[TMP0:%.*]] = bitcast <4 x float> %a to <16 x i8>
             ^
<stdin>:21:46: note: scanning from here
define dso_local <4 x float> @test_vrndiq_f32(<4 x float> noundef %a) #0 {
                                             ^
<stdin>:27:9: note: possible intended match here
 %vrndiq_v.i = bitcast <16 x i8> %0 to <4 x float>
        ^

Input file: <stdin>
Check file: /Users/thakis/src/llvm-project/clang/test/CodeGen/arm-neon-directed-rounding-constrained.c

-dump-input=help explains the following input dump.

Input was:
<<<<<<
            1: ; ModuleID = '<stdin>' 
            2: source_filename = "/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-neon-directed-rounding-constrained.c" 
            3: target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64" 
            4: target triple = "thumbv8-unknown-linux-gnueabihf" 
            5:  
            6: ; Function Attrs: noinline nounwind 
            7: define dso_local <2 x float> @test_vrndi_f32(<2 x float> noundef %a) #0 { 
check:40'0                                                 X~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
            8: entry: 
check:40'0     ~~~~~~~
            9:  %__p0.addr.i = alloca <2 x float>, align 8 
check:40'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           10:  %ref.tmp.i = alloca <8 x i8>, align 8 
check:40'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           11:  store <2 x float> %a, ptr %__p0.addr.i, align 8 
check:40'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           12:  %0 = load <8 x i8>, ptr %__p0.addr.i, align 8 
check:40'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           13:  %vrndi_v.i = bitcast <8 x i8> %0 to <2 x float> 
check:40'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:40'1            ?                                          possible intended match
           14:  %vrndi_v1.i = call <2 x float> @llvm.nearbyint.v2f32(<2 x float> %vrndi_v.i) 
check:40'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           15:  store <2 x float> %vrndi_v1.i, ptr %ref.tmp.i, align 8 
check:40'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           16:  %1 = load <2 x float>, ptr %ref.tmp.i, align 8 
check:40'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           17:  ret <2 x float> %1 
check:40'0     ~~~~~~~~~~~~~~~~~~~~
           18: } 
check:40'0     ~~
           19:  
check:40'0     ~
           20: ; Function Attrs: noinline nounwind 
check:40'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           21: define dso_local <4 x float> @test_vrndiq_f32(<4 x float> noundef %a) #0 { 
check:40'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:52'0                                                  X~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           22: entry: 
check:52'0     ~~~~~~~
           23:  %__p0.addr.i = alloca <4 x float>, align 8 
check:52'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           24:  %ref.tmp.i = alloca <16 x i8>, align 8 
check:52'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           25:  store <4 x float> %a, ptr %__p0.addr.i, align 8 
check:52'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           26:  %0 = load <16 x i8>, ptr %__p0.addr.i, align 8 
check:52'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           27:  %vrndiq_v.i = bitcast <16 x i8> %0 to <4 x float> 
check:52'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:52'1             ?                                           possible intended match
           28:  %vrndiq_v1.i = call <4 x float> @llvm.nearbyint.v4f32(<4 x float> %vrndiq_v.i) 
check:52'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           29:  store <4 x float> %vrndiq_v1.i, ptr %ref.tmp.i, align 8 
check:52'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           30:  %1 = load <4 x float>, ptr %ref.tmp.i, align 8 
check:52'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           31:  ret <4 x float> %1 
check:52'0     ~~~~~~~~~~~~~~~~~~~~
           32: } 
check:52'0     ~~
            .
            .
            .
>>>>>>

--

********************
Testing: 
FAIL: Clang :: CodeGen/arm-poly-add.c (2 of 21153)
******************** TEST 'Clang :: CodeGen/arm-poly-add.c' FAILED ********************
Exit Code: 1

Command Output (stderr):
--
/Users/thakis/src/llvm-project/out/gn/bin/clang -cc1 -internal-isystem /Users/thakis/src/llvm-project/out/gn/lib/clang/21/include -nostdsysteminc -triple armv8.2a-arm-none-eabi    -target-feature +neon    -mfloat-abi hard  -disable-O0-optnone -emit-llvm -o - /Users/thakis/src/llvm-project/clang/test/CodeGen/arm-poly-add.c | /Users/thakis/src/llvm-project/out/gn/bin/opt -S -passes=mem2reg   | /Users/thakis/src/llvm-project/out/gn/bin/FileCheck /Users/thakis/src/llvm-project/clang/test/CodeGen/arm-poly-add.c # RUN: at line 2
+ /Users/thakis/src/llvm-project/out/gn/bin/clang -cc1 -internal-isystem /Users/thakis/src/llvm-project/out/gn/lib/clang/21/include -nostdsysteminc -triple armv8.2a-arm-none-eabi -target-feature +neon -mfloat-abi hard -disable-O0-optnone -emit-llvm -o - /Users/thakis/src/llvm-project/clang/test/CodeGen/arm-poly-add.c
+ /Users/thakis/src/llvm-project/out/gn/bin/opt -S -passes=mem2reg
+ /Users/thakis/src/llvm-project/out/gn/bin/FileCheck /Users/thakis/src/llvm-project/clang/test/CodeGen/arm-poly-add.c
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-poly-add.c:21:16: error: CHECK-NEXT: expected string not found in input
// CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i16> [[A:%.*]] to <8 x i8>
               ^
<stdin>:15:7: note: scanning from here
entry:
      ^
<stdin>:24:2: note: possible intended match here
 %3 = bitcast <8 x i8> %2 to <4 x i16>
 ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-poly-add.c:33:16: error: CHECK-NEXT: expected string not found in input
// CHECK-NEXT: [[TMP0:%.*]] = bitcast <1 x i64> [[A:%.*]] to <8 x i8>
               ^
<stdin>:32:7: note: scanning from here
entry:
      ^
<stdin>:41:2: note: possible intended match here
 %3 = bitcast <8 x i8> %2 to <1 x i64>
 ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-poly-add.c:54:16: error: CHECK-NEXT: expected string not found in input
// CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x i16> [[A:%.*]] to <16 x i8>
               ^
<stdin>:56:7: note: scanning from here
entry:
      ^
<stdin>:65:2: note: possible intended match here
 %3 = bitcast <16 x i8> %2 to <8 x i16>
 ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-poly-add.c:66:16: error: CHECK-NEXT: expected string not found in input
// CHECK-NEXT: [[TMP0:%.*]] = bitcast <2 x i64> [[A:%.*]] to <16 x i8>
               ^
<stdin>:73:7: note: scanning from here
entry:
      ^
<stdin>:82:2: note: possible intended match here
 %3 = bitcast <16 x i8> %2 to <2 x i64>
 ^

Input file: <stdin>
Check file: /Users/thakis/src/llvm-project/clang/test/CodeGen/arm-poly-add.c

-dump-input=help explains the following input dump.

Input was:
<<<<<<
           .
           .
           .
          10:  ret <8 x i8> %0 
          11: } 
          12:  
          13: ; Function Attrs: noinline nounwind 
          14: define dso_local arm_aapcs_vfpcc <4 x i16> @test_vadd_p16(<4 x i16> noundef %a, <4 x i16> noundef %b) #0 { 
          15: entry: 
next:21'0           X error: no match found
          16:  %__p0.addr.i = alloca <4 x i16>, align 8 
next:21'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          17:  %__p1.addr.i = alloca <4 x i16>, align 8 
next:21'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          18:  %ref.tmp.i = alloca <8 x i8>, align 8 
next:21'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          19:  store <4 x i16> %a, ptr %__p0.addr.i, align 8 
next:21'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          20:  store <4 x i16> %b, ptr %__p1.addr.i, align 8 
next:21'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          21:  %0 = load <8 x i8>, ptr %__p0.addr.i, align 8 
next:21'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          22:  %1 = load <8 x i8>, ptr %__p1.addr.i, align 8 
next:21'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          23:  %2 = xor <8 x i8> %0, %1 
next:21'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~
          24:  %3 = bitcast <8 x i8> %2 to <4 x i16> 
next:21'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
next:21'1      ?                                      possible intended match
          25:  store <4 x i16> %3, ptr %ref.tmp.i, align 8 
next:21'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          26:  %4 = load <4 x i16>, ptr %ref.tmp.i, align 8 
next:21'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          27:  ret <4 x i16> %4 
next:21'0     ~~~~~~~~~~~~~~~~~~
          28: } 
next:21'0     ~~
          29:  
next:21'0     ~
          30: ; Function Attrs: noinline nounwind 
next:21'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          31: define dso_local arm_aapcs_vfpcc <1 x i64> @test_vadd_p64(<1 x i64> noundef %a, <1 x i64> noundef %b) #0 { 
next:21'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          32: entry: 
next:33'0           X error: no match found
          33:  %__p0.addr.i = alloca <1 x i64>, align 8 
next:33'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          34:  %__p1.addr.i = alloca <1 x i64>, align 8 
next:33'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          35:  %ref.tmp.i = alloca <8 x i8>, align 8 
next:33'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          36:  store <1 x i64> %a, ptr %__p0.addr.i, align 8 
next:33'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          37:  store <1 x i64> %b, ptr %__p1.addr.i, align 8 
next:33'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          38:  %0 = load <8 x i8>, ptr %__p0.addr.i, align 8 
next:33'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          39:  %1 = load <8 x i8>, ptr %__p1.addr.i, align 8 
next:33'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          40:  %2 = xor <8 x i8> %0, %1 
next:33'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~
          41:  %3 = bitcast <8 x i8> %2 to <1 x i64> 
next:33'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
next:33'1      ?                                      possible intended match
          42:  store <1 x i64> %3, ptr %ref.tmp.i, align 8 
next:33'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          43:  %4 = load <1 x i64>, ptr %ref.tmp.i, align 8 
next:33'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          44:  ret <1 x i64> %4 
next:33'0     ~~~~~~~~~~~~~~~~~~
          45: } 
next:33'0     ~~
          46:  
next:33'0     ~
           .
           .
           .
          51:  ret <16 x i8> %0 
          52: } 
          53:  
          54: ; Function Attrs: noinline nounwind 
          55: define dso_local arm_aapcs_vfpcc <8 x i16> @test_vaddq_p16(<8 x i16> noundef %a, <8 x i16> noundef %b) #0 { 
          56: entry: 
next:54'0           X error: no match found
          57:  %__p0.addr.i = alloca <8 x i16>, align 8 
next:54'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          58:  %__p1.addr.i = alloca <8 x i16>, align 8 
next:54'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          59:  %ref.tmp.i = alloca <16 x i8>, align 8 
next:54'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          60:  store <8 x i16> %a, ptr %__p0.addr.i, align 8 
next:54'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          61:  store <8 x i16> %b, ptr %__p1.addr.i, align 8 
next:54'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          62:  %0 = load <16 x i8>, ptr %__p0.addr.i, align 8 
next:54'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          63:  %1 = load <16 x i8>, ptr %__p1.addr.i, align 8 
next:54'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          64:  %2 = xor <16 x i8> %0, %1 
next:54'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~
          65:  %3 = bitcast <16 x i8> %2 to <8 x i16> 
next:54'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
next:54'1      ?                                       possible intended match
          66:  store <8 x i16> %3, ptr %ref.tmp.i, align 8 
next:54'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          67:  %4 = load <8 x i16>, ptr %ref.tmp.i, align 8 
next:54'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          68:  ret <8 x i16> %4 
next:54'0     ~~~~~~~~~~~~~~~~~~
          69: } 
next:54'0     ~~
          70:  
next:54'0     ~
          71: ; Function Attrs: noinline nounwind 
next:54'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          72: define dso_local arm_aapcs_vfpcc <2 x i64> @test_vaddq_p64(<2 x i64> noundef %a, <2 x i64> noundef %b) #0 { 
next:54'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          73: entry: 
next:66'0           X error: no match found
          74:  %__p0.addr.i = alloca <2 x i64>, align 8 
next:66'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          75:  %__p1.addr.i = alloca <2 x i64>, align 8 
next:66'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          76:  %ref.tmp.i = alloca <16 x i8>, align 8 
next:66'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          77:  store <2 x i64> %a, ptr %__p0.addr.i, align 8 
next:66'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          78:  store <2 x i64> %b, ptr %__p1.addr.i, align 8 
next:66'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          79:  %0 = load <16 x i8>, ptr %__p0.addr.i, align 8 
next:66'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          80:  %1 = load <16 x i8>, ptr %__p1.addr.i, align 8 
next:66'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          81:  %2 = xor <16 x i8> %0, %1 
next:66'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~
          82:  %3 = bitcast <16 x i8> %2 to <2 x i64> 
next:66'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
next:66'1      ?                                       possible intended match
          83:  store <2 x i64> %3, ptr %ref.tmp.i, align 8 
next:66'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          84:  %4 = load <2 x i64>, ptr %ref.tmp.i, align 8 
next:66'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          85:  ret <2 x i64> %4 
next:66'0     ~~~~~~~~~~~~~~~~~~
          86: } 
next:66'0     ~~
          87:  
next:66'0     ~
           .
           .
           .
>>>>>>

--

********************
Testing: 
FAIL: Clang :: CodeGen/arm-bf16-convert-intrinsics.c (3 of 21153)
******************** TEST 'Clang :: CodeGen/arm-bf16-convert-intrinsics.c' FAILED ********************
Exit Code: 1

Command Output (stderr):
--
/Users/thakis/src/llvm-project/out/gn/bin/clang -cc1 -internal-isystem /Users/thakis/src/llvm-project/out/gn/lib/clang/21/include -nostdsysteminc    -triple aarch64 -target-feature +neon -target-feature +bf16    -disable-O0-optnone -emit-llvm -o - /Users/thakis/src/llvm-project/clang/test/CodeGen/arm-bf16-convert-intrinsics.c    | /Users/thakis/src/llvm-project/out/gn/bin/opt -S -passes=mem2reg    | /Users/thakis/src/llvm-project/out/gn/bin/FileCheck --check-prefixes=CHECK,CHECK-A64 /Users/thakis/src/llvm-project/clang/test/CodeGen/arm-bf16-convert-intrinsics.c # RUN: at line 2
+ /Users/thakis/src/llvm-project/out/gn/bin/clang -cc1 -internal-isystem /Users/thakis/src/llvm-project/out/gn/lib/clang/21/include -nostdsysteminc -triple aarch64 -target-feature +neon -target-feature +bf16 -disable-O0-optnone -emit-llvm -o - /Users/thakis/src/llvm-project/clang/test/CodeGen/arm-bf16-convert-intrinsics.c
+ /Users/thakis/src/llvm-project/out/gn/bin/FileCheck --check-prefixes=CHECK,CHECK-A64 /Users/thakis/src/llvm-project/clang/test/CodeGen/arm-bf16-convert-intrinsics.c
+ /Users/thakis/src/llvm-project/out/gn/bin/opt -S -passes=mem2reg
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-bf16-convert-intrinsics.c:29:20: error: CHECK-A64-NEXT: is not on the line after the previous match
// CHECK-A64-NEXT: store <4 x bfloat> [[A:%.*]], ptr [[__REINT_808_I]], align 8
                   ^
<stdin>:13:2: note: 'next' match was here
 store <4 x bfloat> %a, ptr %__p0_808.addr.i, align 8
 ^
<stdin>:10:41: note: previous match ended here
 %ref.tmp.i = alloca <4 x i32>, align 16
                                        ^
<stdin>:11:1: note: non-matching line after previous match is here
 %__s0.i = alloca <4 x i16>, align 8
^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-bf16-convert-intrinsics.c:81:20: error: CHECK-A64-NEXT: is not on the line after the previous match
// CHECK-A64-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <8 x bfloat> [[A:%.*]], <8 x bfloat> [[A]], <4 x i32> <i32 0, i32 1, i32 2, i32 3>
                   ^
<stdin>:34:2: note: 'next' match was here
 %shuffle.i = shufflevector <8 x bfloat> %a, <8 x bfloat> %a, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
 ^
<stdin>:31:43: note: previous match ended here
 %ref.tmp.i.i = alloca <4 x i32>, align 16
                                          ^
<stdin>:32:1: note: non-matching line after previous match is here
 %__s0.i.i = alloca <4 x i16>, align 8
^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-bf16-convert-intrinsics.c:154:20: error: CHECK-A64-NEXT: is not on the line after the previous match
// CHECK-A64-NEXT: [[SHUFFLE_I:%.*]] = shufflevector <8 x bfloat> [[A:%.*]], <8 x bfloat> [[A]], <4 x i32> <i32 4, i32 5, i32 6, i32 7>
                   ^
<stdin>:56:2: note: 'next' match was here
 %shuffle.i = shufflevector <8 x bfloat> %a, <8 x bfloat> %a, <4 x i32> <i32 4, i32 5, i32 6, i32 7>
 ^
<stdin>:53:43: note: previous match ended here
 %ref.tmp.i.i = alloca <4 x i32>, align 16
                                          ^
<stdin>:54:1: note: non-matching line after previous match is here
 %__s0.i.i = alloca <4 x i16>, align 8
^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-bf16-convert-intrinsics.c:225:20: error: CHECK-A64-NEXT: expected string not found in input
// CHECK-A64-NEXT: [[TMP0:%.*]] = bitcast <4 x float> [[A:%.*]] to <16 x i8>
                   ^
<stdin>:73:7: note: scanning from here
entry:
      ^
<stdin>:78:2: note: possible intended match here
 %1 = bitcast <16 x i8> %0 to <4 x float>
 ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-bf16-convert-intrinsics.c:263:20: error: CHECK-A64-NEXT: expected string not found in input
// CHECK-A64-NEXT: [[TMP0:%.*]] = bitcast <4 x float> [[A:%.*]] to <16 x i8>
                   ^
<stdin>:87:7: note: scanning from here
entry:
      ^
<stdin>:92:2: note: possible intended match here
 %1 = bitcast <16 x i8> %0 to <4 x float>
 ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-bf16-convert-intrinsics.c:322:20: error: CHECK-A64-NEXT: expected string not found in input
// CHECK-A64-NEXT: [[TMP0:%.*]] = bitcast <8 x bfloat> [[INACTIVE:%.*]] to <16 x i8>
                   ^
<stdin>:102:7: note: scanning from here
entry:
      ^
<stdin>:112:2: note: possible intended match here
 %4 = bitcast <16 x i8> %1 to <4 x float>
 ^

Input file: <stdin>
Check file: /Users/thakis/src/llvm-project/clang/test/CodeGen/arm-bf16-convert-intrinsics.c

-dump-input=help explains the following input dump.

Input was:
<<<<<<
            .
            .
            .
            8: entry: 
            9:  %__p0_808.addr.i = alloca <4 x bfloat>, align 8 
           10:  %ref.tmp.i = alloca <4 x i32>, align 16 
           11:  %__s0.i = alloca <4 x i16>, align 8 
           12:  %ref.tmp1.i = alloca <16 x i8>, align 16 
           13:  store <4 x bfloat> %a, ptr %__p0_808.addr.i, align 8 
next:29         !~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~  error: match on wrong line
           14:  %0 = load <4 x i16>, ptr %__p0_808.addr.i, align 8 
           15:  store <4 x i16> %0, ptr %__s0.i, align 8 
           16:  %1 = load <8 x i8>, ptr %__s0.i, align 8 
           17:  %2 = bitcast <8 x i8> %1 to <4 x i16> 
           18:  %3 = zext <4 x i16> %2 to <4 x i32> 
            .
            .
            .
           29: entry: 
           30:  %__p0_808.addr.i.i = alloca <4 x bfloat>, align 8 
           31:  %ref.tmp.i.i = alloca <4 x i32>, align 16 
           32:  %__s0.i.i = alloca <4 x i16>, align 8 
           33:  %ref.tmp1.i.i = alloca <16 x i8>, align 16 
           34:  %shuffle.i = shufflevector <8 x bfloat> %a, <8 x bfloat> %a, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 
next:81         !~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~  error: match on wrong line
           35:  store <4 x bfloat> %shuffle.i, ptr %__p0_808.addr.i.i, align 8 
           36:  %0 = load <4 x i16>, ptr %__p0_808.addr.i.i, align 8 
           37:  store <4 x i16> %0, ptr %__s0.i.i, align 8 
           38:  %1 = load <8 x i8>, ptr %__s0.i.i, align 8 
           39:  %2 = bitcast <8 x i8> %1 to <4 x i16> 
            .
            .
            .
           51: entry: 
           52:  %__p0_808.addr.i.i = alloca <4 x bfloat>, align 8 
           53:  %ref.tmp.i.i = alloca <4 x i32>, align 16 
           54:  %__s0.i.i = alloca <4 x i16>, align 8 
           55:  %ref.tmp1.i.i = alloca <16 x i8>, align 16 
           56:  %shuffle.i = shufflevector <8 x bfloat> %a, <8 x bfloat> %a, <4 x i32> <i32 4, i32 5, i32 6, i32 7> 
next:154        !~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~  error: match on wrong line
           57:  store <4 x bfloat> %shuffle.i, ptr %__p0_808.addr.i.i, align 8 
           58:  %0 = load <4 x i16>, ptr %__p0_808.addr.i.i, align 8 
           59:  store <4 x i16> %0, ptr %__s0.i.i, align 8 
           60:  %1 = load <8 x i8>, ptr %__s0.i.i, align 8 
           61:  %2 = bitcast <8 x i8> %1 to <4 x i16> 
            .
            .
            .
           68:  ret <4 x float> %5 
           69: } 
           70:  
           71: ; Function Attrs: noinline nounwind 
           72: define dso_local <4 x bfloat> @test_vcvt_bf16_f32(<4 x float> noundef %a) #0 { 
           73: entry: 
next:225'0           X error: no match found
           74:  %__p0.addr.i = alloca <4 x float>, align 16 
next:225'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           75:  %ref.tmp.i = alloca <8 x i8>, align 8 
next:225'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           76:  store <4 x float> %a, ptr %__p0.addr.i, align 16 
next:225'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           77:  %0 = load <16 x i8>, ptr %__p0.addr.i, align 16 
next:225'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           78:  %1 = bitcast <16 x i8> %0 to <4 x float> 
next:225'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
next:225'1      ?                                         possible intended match
           79:  %2 = fptrunc <4 x float> %1 to <4 x bfloat> 
next:225'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           80:  store <4 x bfloat> %2, ptr %ref.tmp.i, align 8 
next:225'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           81:  %3 = load <4 x bfloat>, ptr %ref.tmp.i, align 8 
next:225'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           82:  ret <4 x bfloat> %3 
next:225'0     ~~~~~~~~~~~~~~~~~~~~~
           83: } 
next:225'0     ~~
           84:  
next:225'0     ~
           85: ; Function Attrs: noinline nounwind 
next:225'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           86: define dso_local <8 x bfloat> @test_vcvtq_low_bf16_f32(<4 x float> noundef %a) #0 { 
next:225'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           87: entry: 
next:263'0           X error: no match found
           88:  %__p0.addr.i = alloca <4 x float>, align 16 
next:263'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           89:  %ref.tmp.i = alloca <16 x i8>, align 16 
next:263'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           90:  store <4 x float> %a, ptr %__p0.addr.i, align 16 
next:263'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           91:  %0 = load <16 x i8>, ptr %__p0.addr.i, align 16 
next:263'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           92:  %1 = bitcast <16 x i8> %0 to <4 x float> 
next:263'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
next:263'1      ?                                         possible intended match
           93:  %2 = fptrunc <4 x float> %1 to <4 x bfloat> 
next:263'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           94:  %3 = shufflevector <4 x bfloat> %2, <4 x bfloat> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 
next:263'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           95:  store <8 x bfloat> %3, ptr %ref.tmp.i, align 16 
next:263'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           96:  %4 = load <8 x bfloat>, ptr %ref.tmp.i, align 16 
next:263'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           97:  ret <8 x bfloat> %4 
next:263'0     ~~~~~~~~~~~~~~~~~~~~~
           98: } 
next:263'0     ~~
           99:  
next:263'0     ~
          100: ; Function Attrs: noinline nounwind 
next:263'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          101: define dso_local <8 x bfloat> @test_vcvtq_high_bf16_f32(<8 x bfloat> noundef %inactive, <4 x float> noundef %a) #0 { 
next:263'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          102: entry: 
next:322'0           X error: no match found
          103:  %__p0.addr.i = alloca <8 x bfloat>, align 16 
next:322'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          104:  %__p1.addr.i = alloca <4 x float>, align 16 
next:322'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          105:  %ref.tmp.i = alloca <16 x i8>, align 16 
next:322'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          106:  store <8 x bfloat> %inactive, ptr %__p0.addr.i, align 16 
next:322'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          107:  store <4 x float> %a, ptr %__p1.addr.i, align 16 
next:322'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          108:  %0 = load <16 x i8>, ptr %__p0.addr.i, align 16 
next:322'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          109:  %1 = load <16 x i8>, ptr %__p1.addr.i, align 16 
next:322'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          110:  %2 = bitcast <16 x i8> %0 to <8 x bfloat> 
next:322'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          111:  %3 = shufflevector <8 x bfloat> %2, <8 x bfloat> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 
next:322'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          112:  %4 = bitcast <16 x i8> %1 to <4 x float> 
next:322'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
next:322'1      ?                                         possible intended match
          113:  %5 = fptrunc <4 x float> %4 to <4 x bfloat> 
next:322'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          114:  %6 = shufflevector <4 x bfloat> %3, <4 x bfloat> %5, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 
next:322'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          115:  store <8 x bfloat> %6, ptr %ref.tmp.i, align 16 
next:322'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          116:  %7 = load <8 x bfloat>, ptr %ref.tmp.i, align 16 
next:322'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          117:  ret <8 x bfloat> %7 
next:322'0     ~~~~~~~~~~~~~~~~~~~~~
            .
            .
            .
>>>>>>

--

********************
Testing: 
FAIL: Clang :: CodeGen/arm-v8.2a-neon-intrinsics-generic.c (4 of 21153)
******************** TEST 'Clang :: CodeGen/arm-v8.2a-neon-intrinsics-generic.c' FAILED ********************
Exit Code: 1

Command Output (stderr):
--
/Users/thakis/src/llvm-project/out/gn/bin/clang -cc1 -internal-isystem /Users/thakis/src/llvm-project/out/gn/lib/clang/21/include -nostdsysteminc -triple armv8.2a-linux-gnu -target-abi apcs-gnu -target-feature +neon -target-feature -fullfp16  -disable-O0-optnone -emit-llvm -o - /Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics-generic.c  | /Users/thakis/src/llvm-project/out/gn/bin/opt -S -passes=sroa  | /Users/thakis/src/llvm-project/out/gn/bin/FileCheck /Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics-generic.c --check-prefixes=CHECK-NOFP16 # RUN: at line 2
+ /Users/thakis/src/llvm-project/out/gn/bin/clang -cc1 -internal-isystem /Users/thakis/src/llvm-project/out/gn/lib/clang/21/include -nostdsysteminc -triple armv8.2a-linux-gnu -target-abi apcs-gnu -target-feature +neon -target-feature -fullfp16 -disable-O0-optnone -emit-llvm -o - /Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics-generic.c
+ /Users/thakis/src/llvm-project/out/gn/bin/FileCheck /Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics-generic.c --check-prefixes=CHECK-NOFP16
+ /Users/thakis/src/llvm-project/out/gn/bin/opt -S -passes=sroa
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics-generic.c:24:23: error: CHECK-NOFP16-NEXT: is not on the line after the previous match
// CHECK-NOFP16-NEXT: [[TMP6:%.*]] = bitcast <4 x i16> [[A]] to <8 x i8>
                      ^
<stdin>:20:2: note: 'next' match was here
 %8 = bitcast <4 x i16> %a to <8 x i8>
 ^
<stdin>:17:41: note: previous match ended here
 %5 = bitcast <2 x i32> %3 to <4 x half>
                                        ^
<stdin>:18:1: note: non-matching line after previous match is here
 %6 = bitcast <4 x half> %4 to <4 x i16>
^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics-generic.c:57:23: error: CHECK-NOFP16-NEXT: is not on the line after the previous match
// CHECK-NOFP16-NEXT: [[TMP6:%.*]] = bitcast <8 x i16> [[A]] to <16 x i8>
                      ^
<stdin>:43:2: note: 'next' match was here
 %8 = bitcast <8 x i16> %a to <16 x i8>
 ^
<stdin>:40:41: note: previous match ended here
 %5 = bitcast <4 x i32> %3 to <8 x half>
                                        ^
<stdin>:41:1: note: non-matching line after previous match is here
 %6 = bitcast <8 x half> %4 to <8 x i16>
^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics-generic.c:91:23: error: CHECK-NOFP16-NEXT: expected string not found in input
// CHECK-NOFP16-NEXT: [[TMP6:%.*]] = bitcast <4 x half> [[TMP4]] to <8 x i8>
                      ^
<stdin>:64:41: note: scanning from here
 %5 = bitcast <2 x i32> %3 to <4 x half>
                                        ^
<stdin>:64:41: note: with "TMP4" equal to "%4"
 %5 = bitcast <2 x i32> %3 to <4 x half>
                                        ^
<stdin>:65:2: note: possible intended match here
 %6 = bitcast <4 x half> %4 to <4 x i16>
 ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics-generic.c:129:23: error: CHECK-NOFP16-NEXT: expected string not found in input
// CHECK-NOFP16-NEXT: [[TMP6:%.*]] = bitcast <8 x half> [[TMP4]] to <16 x i8>
                      ^
<stdin>:88:41: note: scanning from here
 %5 = bitcast <4 x i32> %3 to <8 x half>
                                        ^
<stdin>:88:41: note: with "TMP4" equal to "%4"
 %5 = bitcast <4 x i32> %3 to <8 x half>
                                        ^
<stdin>:89:2: note: possible intended match here
 %6 = bitcast <8 x half> %4 to <8 x i16>
 ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics-generic.c:167:23: error: CHECK-NOFP16-NEXT: expected string not found in input
// CHECK-NOFP16-NEXT: [[TMP6:%.*]] = bitcast <4 x half> [[TMP4]] to <8 x i8>
                      ^
<stdin>:112:41: note: scanning from here
 %5 = bitcast <2 x i32> %3 to <4 x half>
                                        ^
<stdin>:112:41: note: with "TMP4" equal to "%4"
 %5 = bitcast <2 x i32> %3 to <4 x half>
                                        ^
<stdin>:113:2: note: possible intended match here
 %6 = bitcast <4 x half> %4 to <4 x i16>
 ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics-generic.c:205:23: error: CHECK-NOFP16-NEXT: expected string not found in input
// CHECK-NOFP16-NEXT: [[TMP6:%.*]] = bitcast <8 x half> [[TMP4]] to <16 x i8>
                      ^
<stdin>:136:41: note: scanning from here
 %5 = bitcast <4 x i32> %3 to <8 x half>
                                        ^
<stdin>:136:41: note: with "TMP4" equal to "%4"
 %5 = bitcast <4 x i32> %3 to <8 x half>
                                        ^
<stdin>:137:2: note: possible intended match here
 %6 = bitcast <8 x half> %4 to <8 x i16>
 ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics-generic.c:243:23: error: CHECK-NOFP16-NEXT: expected string not found in input
// CHECK-NOFP16-NEXT: [[TMP6:%.*]] = bitcast <4 x half> [[TMP4]] to <8 x i8>
                      ^
<stdin>:160:41: note: scanning from here
 %5 = bitcast <2 x i32> %3 to <4 x half>
                                        ^
<stdin>:160:41: note: with "TMP4" equal to "%4"
 %5 = bitcast <2 x i32> %3 to <4 x half>
                                        ^
<stdin>:161:2: note: possible intended match here
 %6 = bitcast <4 x half> %4 to <4 x i16>
 ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics-generic.c:281:23: error: CHECK-NOFP16-NEXT: expected string not found in input
// CHECK-NOFP16-NEXT: [[TMP6:%.*]] = bitcast <8 x half> [[TMP4]] to <16 x i8>
                      ^
<stdin>:184:41: note: scanning from here
 %5 = bitcast <4 x i32> %3 to <8 x half>
                                        ^
<stdin>:184:41: note: with "TMP4" equal to "%4"
 %5 = bitcast <4 x i32> %3 to <8 x half>
                                        ^
<stdin>:185:2: note: possible intended match here
 %6 = bitcast <8 x half> %4 to <8 x i16>
 ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics-generic.c:421:23: error: CHECK-NOFP16-NEXT: expected string not found in input
// CHECK-NOFP16-NEXT: [[TMP1:%.*]] = bitcast <4 x half> [[TMP0]] to <8 x i8>
                      ^
<stdin>:254:48: note: scanning from here
 %0 = bitcast <2 x i32> %a.coerce to <4 x half>
                                               ^
<stdin>:254:48: note: with "TMP0" equal to "%0"
 %0 = bitcast <2 x i32> %a.coerce to <4 x half>
                                               ^
<stdin>:255:2: note: possible intended match here
 %1 = bitcast <4 x half> %0 to <4 x i16>
 ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics-generic.c:444:23: error: CHECK-NOFP16-NEXT: expected string not found in input
// CHECK-NOFP16-NEXT: [[TMP1:%.*]] = bitcast <4 x half> [[TMP0]] to <8 x i8>
                      ^
<stdin>:267:48: note: scanning from here
 %0 = bitcast <2 x i32> %a.coerce to <4 x half>
                                               ^
<stdin>:267:48: note: with "TMP0" equal to "%0"
 %0 = bitcast <2 x i32> %a.coerce to <4 x half>
                                               ^
<stdin>:268:2: note: possible intended match here
 %1 = bitcast <4 x half> %0 to <4 x i16>
 ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics-generic.c:468:23: error: CHECK-NOFP16-NEXT: expected string not found in input
// CHECK-NOFP16-NEXT: [[TMP2:%.*]] = bitcast <4 x half> [[TMP0]] to <8 x i8>
                      ^
<stdin>:281:48: note: scanning from here
 %1 = bitcast <2 x i32> %b.coerce to <4 x half>
                                               ^
<stdin>:281:48: note: with "TMP0" equal to "%0"
 %1 = bitcast <2 x i32> %b.coerce to <4 x half>
                                               ^
<stdin>:282:2: note: possible intended match here
 %2 = bitcast <4 x half> %0 to <4 x i16>
 ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics-generic.c:496:23: error: CHECK-NOFP16-NEXT: expected string not found in input
// CHECK-NOFP16-NEXT: [[TMP2:%.*]] = bitcast <8 x half> [[TMP0]] to <16 x i8>
                      ^
<stdin>:298:48: note: scanning from here
 %1 = bitcast <4 x i32> %b.coerce to <8 x half>
                                               ^
<stdin>:298:48: note: with "TMP0" equal to "%0"
 %1 = bitcast <4 x i32> %b.coerce to <8 x half>
                                               ^
<stdin>:299:2: note: possible intended match here
 %2 = bitcast <8 x half> %0 to <8 x i16>
 ^

Input file: <stdin>
Check file: /Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics-generic.c

-dump-input=help explains the following input dump.

Input was:
<<<<<<
            .
            .
            .
           15:  %3 = bitcast <4 x half> %1 to <2 x i32> 
           16:  %4 = bitcast <2 x i32> %2 to <4 x half> 
           17:  %5 = bitcast <2 x i32> %3 to <4 x half> 
           18:  %6 = bitcast <4 x half> %4 to <4 x i16> 
           19:  %7 = bitcast <4 x half> %5 to <4 x i16> 
           20:  %8 = bitcast <4 x i16> %a to <8 x i8> 
next:24         !~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~  error: match on wrong line
           21:  %9 = bitcast <4 x i16> %6 to <8 x i8> 
           22:  %10 = bitcast <4 x i16> %7 to <8 x i8> 
           23:  %vbsl_v.i = call <8 x i8> @llvm.arm.neon.vbsl.v8i8(<8 x i8> %8, <8 x i8> %9, <8 x i8> %10) 
           24:  %11 = bitcast <8 x i8> %vbsl_v.i to <4 x i16> 
           25:  %12 = bitcast <4 x i16> %11 to <4 x half> 
            .
            .
            .
           38:  %3 = bitcast <8 x half> %1 to <4 x i32> 
           39:  %4 = bitcast <4 x i32> %2 to <8 x half> 
           40:  %5 = bitcast <4 x i32> %3 to <8 x half> 
           41:  %6 = bitcast <8 x half> %4 to <8 x i16> 
           42:  %7 = bitcast <8 x half> %5 to <8 x i16> 
           43:  %8 = bitcast <8 x i16> %a to <16 x i8> 
next:57         !~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~  error: match on wrong line
           44:  %9 = bitcast <8 x i16> %6 to <16 x i8> 
           45:  %10 = bitcast <8 x i16> %7 to <16 x i8> 
           46:  %vbslq_v.i = call <16 x i8> @llvm.arm.neon.vbsl.v16i8(<16 x i8> %8, <16 x i8> %9, <16 x i8> %10) 
           47:  %11 = bitcast <16 x i8> %vbslq_v.i to <8 x i16> 
           48:  %12 = bitcast <8 x i16> %11 to <8 x half> 
            .
            .
            .
           59:  %1 = bitcast <2 x i32> %b.coerce to <4 x half> 
           60:  %2 = bitcast <4 x half> %0 to <2 x i32> 
           61:  %3 = bitcast <4 x half> %1 to <2 x i32> 
           62:  call void @llvm.experimental.noalias.scope.decl(metadata !3) 
           63:  %4 = bitcast <2 x i32> %2 to <4 x half> 
           64:  %5 = bitcast <2 x i32> %3 to <4 x half> 
next:91'0                                              X error: no match found
next:91'1                                                with "TMP4" equal to "%4"
           65:  %6 = bitcast <4 x half> %4 to <4 x i16> 
next:91'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
next:91'2       ?                                        possible intended match
           66:  %7 = bitcast <4 x half> %5 to <4 x i16> 
next:91'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           67:  %8 = bitcast <4 x i16> %6 to <8 x i8> 
next:91'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           68:  %9 = bitcast <4 x i16> %7 to <8 x i8> 
next:91'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           69:  %10 = bitcast <8 x i8> %8 to <4 x i16> 
next:91'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           70:  %11 = bitcast <8 x i8> %9 to <4 x i16> 
next:91'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            .
            .
            .
           83:  %1 = bitcast <4 x i32> %b.coerce to <8 x half> 
           84:  %2 = bitcast <8 x half> %0 to <4 x i32> 
           85:  %3 = bitcast <8 x half> %1 to <4 x i32> 
           86:  call void @llvm.experimental.noalias.scope.decl(metadata !6) 
           87:  %4 = bitcast <4 x i32> %2 to <8 x half> 
           88:  %5 = bitcast <4 x i32> %3 to <8 x half> 
next:129'0                                             X error: no match found
next:129'1                                               with "TMP4" equal to "%4"
           89:  %6 = bitcast <8 x half> %4 to <8 x i16> 
next:129'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
next:129'2      ?                                        possible intended match
           90:  %7 = bitcast <8 x half> %5 to <8 x i16> 
next:129'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           91:  %8 = bitcast <8 x i16> %6 to <16 x i8> 
next:129'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           92:  %9 = bitcast <8 x i16> %7 to <16 x i8> 
next:129'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           93:  %10 = bitcast <16 x i8> %8 to <8 x i16> 
next:129'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           94:  %11 = bitcast <16 x i8> %9 to <8 x i16> 
next:129'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            .
            .
            .
          107:  %1 = bitcast <2 x i32> %b.coerce to <4 x half> 
          108:  %2 = bitcast <4 x half> %0 to <2 x i32> 
          109:  %3 = bitcast <4 x half> %1 to <2 x i32> 
          110:  call void @llvm.experimental.noalias.scope.decl(metadata !9) 
          111:  %4 = bitcast <2 x i32> %2 to <4 x half> 
          112:  %5 = bitcast <2 x i32> %3 to <4 x half> 
next:167'0                                             X error: no match found
next:167'1                                               with "TMP4" equal to "%4"
          113:  %6 = bitcast <4 x half> %4 to <4 x i16> 
next:167'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
next:167'2      ?                                        possible intended match
          114:  %7 = bitcast <4 x half> %5 to <4 x i16> 
next:167'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          115:  %8 = bitcast <4 x i16> %6 to <8 x i8> 
next:167'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          116:  %9 = bitcast <4 x i16> %7 to <8 x i8> 
next:167'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          117:  %10 = bitcast <8 x i8> %8 to <4 x i16> 
next:167'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          118:  %11 = bitcast <8 x i8> %9 to <4 x i16> 
next:167'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            .
            .
            .
          131:  %1 = bitcast <4 x i32> %b.coerce to <8 x half> 
          132:  %2 = bitcast <8 x half> %0 to <4 x i32> 
          133:  %3 = bitcast <8 x half> %1 to <4 x i32> 
          134:  call void @llvm.experimental.noalias.scope.decl(metadata !12) 
          135:  %4 = bitcast <4 x i32> %2 to <8 x half> 
          136:  %5 = bitcast <4 x i32> %3 to <8 x half> 
next:205'0                                             X error: no match found
next:205'1                                               with "TMP4" equal to "%4"
          137:  %6 = bitcast <8 x half> %4 to <8 x i16> 
next:205'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
next:205'2      ?                                        possible intended match
          138:  %7 = bitcast <8 x half> %5 to <8 x i16> 
next:205'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          139:  %8 = bitcast <8 x i16> %6 to <16 x i8> 
next:205'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          140:  %9 = bitcast <8 x i16> %7 to <16 x i8> 
next:205'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          141:  %10 = bitcast <16 x i8> %8 to <8 x i16> 
next:205'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          142:  %11 = bitcast <16 x i8> %9 to <8 x i16> 
next:205'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            .
            .
            .
          155:  %1 = bitcast <2 x i32> %b.coerce to <4 x half> 
          156:  %2 = bitcast <4 x half> %0 to <2 x i32> 
          157:  %3 = bitcast <4 x half> %1 to <2 x i32> 
          158:  call void @llvm.experimental.noalias.scope.decl(metadata !15) 
          159:  %4 = bitcast <2 x i32> %2 to <4 x half> 
          160:  %5 = bitcast <2 x i32> %3 to <4 x half> 
next:243'0                                             X error: no match found
next:243'1                                               with "TMP4" equal to "%4"
          161:  %6 = bitcast <4 x half> %4 to <4 x i16> 
next:243'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
next:243'2      ?                                        possible intended match
          162:  %7 = bitcast <4 x half> %5 to <4 x i16> 
next:243'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          163:  %8 = bitcast <4 x i16> %6 to <8 x i8> 
next:243'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          164:  %9 = bitcast <4 x i16> %7 to <8 x i8> 
next:243'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          165:  %10 = bitcast <8 x i8> %8 to <4 x i16> 
next:243'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          166:  %11 = bitcast <8 x i8> %9 to <4 x i16> 
next:243'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            .
            .
            .
          179:  %1 = bitcast <4 x i32> %b.coerce to <8 x half> 
          180:  %2 = bitcast <8 x half> %0 to <4 x i32> 
          181:  %3 = bitcast <8 x half> %1 to <4 x i32> 
          182:  call void @llvm.experimental.noalias.scope.decl(metadata !18) 
          183:  %4 = bitcast <4 x i32> %2 to <8 x half> 
          184:  %5 = bitcast <4 x i32> %3 to <8 x half> 
next:281'0                                             X error: no match found
next:281'1                                               with "TMP4" equal to "%4"
          185:  %6 = bitcast <8 x half> %4 to <8 x i16> 
next:281'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
next:281'2      ?                                        possible intended match
          186:  %7 = bitcast <8 x half> %5 to <8 x i16> 
next:281'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          187:  %8 = bitcast <8 x i16> %6 to <16 x i8> 
next:281'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          188:  %9 = bitcast <8 x i16> %7 to <16 x i8> 
next:281'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          189:  %10 = bitcast <16 x i8> %8 to <8 x i16> 
next:281'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          190:  %11 = bitcast <16 x i8> %9 to <8 x i16> 
next:281'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            .
            .
            .
          249: } 
          250:  
          251: ; Function Attrs: noinline nounwind 
          252: define dso_local <2 x i32> @test_vdup_lane_f16(<2 x i32> noundef %a.coerce) #0 { 
          253: entry: 
          254:  %0 = bitcast <2 x i32> %a.coerce to <4 x half> 
next:421'0                                                    X error: no match found
next:421'1                                                      with "TMP0" equal to "%0"
          255:  %1 = bitcast <4 x half> %0 to <4 x i16> 
next:421'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
next:421'2      ?                                        possible intended match
          256:  %2 = bitcast <4 x i16> %1 to <8 x i8> 
next:421'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          257:  %3 = bitcast <8 x i8> %2 to <4 x i16> 
next:421'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          258:  %lane = shufflevector <4 x i16> %3, <4 x i16> %3, <4 x i32> <i32 3, i32 3, i32 3, i32 3> 
next:421'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          259:  %4 = bitcast <4 x i16> %lane to <4 x half> 
next:421'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          260:  %5 = bitcast <4 x half> %4 to <2 x i32> 
next:421'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          261:  ret <2 x i32> %5 
next:421'0     ~~~~~~~~~~~~~~~~~~
          262: } 
next:421'0     ~~
          263:  
next:421'0     ~
          264: ; Function Attrs: noinline nounwind 
next:421'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          265: define dso_local <4 x i32> @test_vdupq_lane_f16(<2 x i32> noundef %a.coerce) #0 { 
next:421'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          266: entry: 
          267:  %0 = bitcast <2 x i32> %a.coerce to <4 x half> 
next:444'0                                                    X error: no match found
next:444'1                                                      with "TMP0" equal to "%0"
          268:  %1 = bitcast <4 x half> %0 to <4 x i16> 
next:444'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
next:444'2      ?                                        possible intended match
          269:  %2 = bitcast <4 x i16> %1 to <8 x i8> 
next:444'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          270:  %3 = bitcast <8 x i8> %2 to <4 x i16> 
next:444'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          271:  %lane = shufflevector <4 x i16> %3, <4 x i16> %3, <8 x i32> <i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3> 
next:444'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          272:  %4 = bitcast <8 x i16> %lane to <8 x half> 
next:444'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          273:  %5 = bitcast <8 x half> %4 to <4 x i32> 
next:444'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            .
            .
            .
          276:  
next:444'0     ~
          277: ; Function Attrs: noinline nounwind 
next:444'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          278: define dso_local <2 x i32> @test_vext_f16(<2 x i32> noundef %a.coerce, <2 x i32> noundef %b.coerce) #0 { 
next:444'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          279: entry: 
          280:  %0 = bitcast <2 x i32> %a.coerce to <4 x half> 
          281:  %1 = bitcast <2 x i32> %b.coerce to <4 x half> 
next:468'0                                                    X error: no match found
next:468'1                                                      with "TMP0" equal to "%0"
          282:  %2 = bitcast <4 x half> %0 to <4 x i16> 
next:468'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
next:468'2      ?                                        possible intended match
          283:  %3 = bitcast <4 x half> %1 to <4 x i16> 
next:468'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          284:  %4 = bitcast <4 x i16> %2 to <8 x i8> 
next:468'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          285:  %5 = bitcast <4 x i16> %3 to <8 x i8> 
next:468'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          286:  %6 = bitcast <8 x i8> %4 to <4 x i16> 
next:468'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          287:  %7 = bitcast <8 x i8> %5 to <4 x i16> 
next:468'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            .
            .
            .
          293:  
next:468'0     ~
          294: ; Function Attrs: noinline nounwind 
next:468'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          295: define dso_local <4 x i32> @test_vextq_f16(<4 x i32> noundef %a.coerce, <4 x i32> noundef %b.coerce) #0 { 
next:468'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          296: entry: 
          297:  %0 = bitcast <4 x i32> %a.coerce to <8 x half> 
          298:  %1 = bitcast <4 x i32> %b.coerce to <8 x half> 
next:496'0                                                    X error: no match found
next:496'1                                                      with "TMP0" equal to "%0"
          299:  %2 = bitcast <8 x half> %0 to <8 x i16> 
next:496'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
next:496'2      ?                                        possible intended match
          300:  %3 = bitcast <8 x half> %1 to <8 x i16> 
next:496'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          301:  %4 = bitcast <8 x i16> %2 to <16 x i8> 
next:496'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          302:  %5 = bitcast <8 x i16> %3 to <16 x i8> 
next:496'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          303:  %6 = bitcast <16 x i8> %4 to <8 x i16> 
next:496'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          304:  %7 = bitcast <16 x i8> %5 to <8 x i16> 
next:496'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            .
            .
            .
>>>>>>

--

********************
Testing: 
FAIL: Clang :: CodeGen/arm-v8.1a-neon-intrinsics.c (5 of 21153)
******************** TEST 'Clang :: CodeGen/arm-v8.1a-neon-intrinsics.c' FAILED ********************
Exit Code: 1

Command Output (stderr):
--
/Users/thakis/src/llvm-project/out/gn/bin/clang -cc1 -internal-isystem /Users/thakis/src/llvm-project/out/gn/lib/clang/21/include -nostdsysteminc -triple armv8.1a-linux-gnu -target-abi apcs-gnu -target-feature +neon   -emit-llvm -o - /Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.1a-neon-intrinsics.c -disable-O0-optnone | /Users/thakis/src/llvm-project/out/gn/bin/opt -passes=mem2reg,dce -S   | /Users/thakis/src/llvm-project/out/gn/bin/FileCheck /Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.1a-neon-intrinsics.c --check-prefix=CHECK-ARM # RUN: at line 2
+ /Users/thakis/src/llvm-project/out/gn/bin/clang -cc1 -internal-isystem /Users/thakis/src/llvm-project/out/gn/lib/clang/21/include -nostdsysteminc -triple armv8.1a-linux-gnu -target-abi apcs-gnu -target-feature +neon -emit-llvm -o - /Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.1a-neon-intrinsics.c -disable-O0-optnone
+ /Users/thakis/src/llvm-project/out/gn/bin/FileCheck /Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.1a-neon-intrinsics.c --check-prefix=CHECK-ARM
+ /Users/thakis/src/llvm-project/out/gn/bin/opt -passes=mem2reg,dce -S
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.1a-neon-intrinsics.c:16:20: error: CHECK-ARM-NEXT: is not on the line after the previous match
// CHECK-ARM-NEXT: [[VQRDMLAH_V3_I:%.*]] = call <4 x i16> @llvm.arm.neon.vqrdmlah.v4i16(<4 x i16> [[A:%.*]], <4 x i16> [[B:%.*]], <4 x i16> [[C:%.*]])
                   ^
<stdin>:22:2: note: 'next' match was here
 %vqrdmlah_s163.i = call <4 x i16> @llvm.arm.neon.vqrdmlah.v4i16(<4 x i16> %vqrdmlah_s16.i, <4 x i16> %vqrdmlah_s161.i, <4 x i16> %vqrdmlah_s162.i)
 ^
<stdin>:8:7: note: previous match ended here
entry:
      ^
<stdin>:9:1: note: non-matching line after previous match is here
 %__p0.addr.i = alloca <4 x i16>, align 8
^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.1a-neon-intrinsics.c:31:20: error: CHECK-ARM-NEXT: is not on the line after the previous match
// CHECK-ARM-NEXT: [[VQRDMLAH_V3_I:%.*]] = call <2 x i32> @llvm.arm.neon.vqrdmlah.v2i32(<2 x i32> [[A:%.*]], <2 x i32> [[B:%.*]], <2 x i32> [[C:%.*]])
                   ^
<stdin>:45:2: note: 'next' match was here
 %vqrdmlah_s323.i = call <2 x i32> @llvm.arm.neon.vqrdmlah.v2i32(<2 x i32> %vqrdmlah_s32.i, <2 x i32> %vqrdmlah_s321.i, <2 x i32> %vqrdmlah_s322.i)
 ^
<stdin>:31:7: note: previous match ended here
entry:
      ^
<stdin>:32:1: note: non-matching line after previous match is here
 %__p0.addr.i = alloca <2 x i32>, align 8
^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.1a-neon-intrinsics.c:46:20: error: CHECK-ARM-NEXT: is not on the line after the previous match
// CHECK-ARM-NEXT: [[VQRDMLAHQ_V3_I:%.*]] = call <8 x i16> @llvm.arm.neon.vqrdmlah.v8i16(<8 x i16> [[A:%.*]], <8 x i16> [[B:%.*]], <8 x i16> [[C:%.*]])
                   ^
<stdin>:68:2: note: 'next' match was here
 %vqrdmlahq_s163.i = call <8 x i16> @llvm.arm.neon.vqrdmlah.v8i16(<8 x i16> %vqrdmlahq_s16.i, <8 x i16> %vqrdmlahq_s161.i, <8 x i16> %vqrdmlahq_s162.i)
 ^
<stdin>:54:7: note: previous match ended here
entry:
      ^
<stdin>:55:1: note: non-matching line after previous match is here
 %__p0.addr.i = alloca <8 x i16>, align 16
^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.1a-neon-intrinsics.c:61:20: error: CHECK-ARM-NEXT: is not on the line after the previous match
// CHECK-ARM-NEXT: [[VQRDMLAHQ_V3_I:%.*]] = call <4 x i32> @llvm.arm.neon.vqrdmlah.v4i32(<4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]], <4 x i32> [[C:%.*]])
                   ^
<stdin>:91:2: note: 'next' match was here
 %vqrdmlahq_s323.i = call <4 x i32> @llvm.arm.neon.vqrdmlah.v4i32(<4 x i32> %vqrdmlahq_s32.i, <4 x i32> %vqrdmlahq_s321.i, <4 x i32> %vqrdmlahq_s322.i)
 ^
<stdin>:77:7: note: previous match ended here
entry:
      ^
<stdin>:78:1: note: non-matching line after previous match is here
 %__p0.addr.i = alloca <4 x i32>, align 16
^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.1a-neon-intrinsics.c:76:20: error: CHECK-ARM-NEXT: is not on the line after the previous match
// CHECK-ARM-NEXT: [[TMP0:%.*]] = bitcast <4 x i16> [[C:%.*]] to <8 x i8>
                   ^
<stdin>:123:2: note: 'next' match was here
 %vqrdmlah_s164.i = bitcast <4 x i16> %vqrdmlah_s163.i to <8 x i8>
 ^
<stdin>:100:7: note: previous match ended here
entry:
      ^
<stdin>:101:1: note: non-matching line after previous match is here
 %__p0.addr.i = alloca <4 x i16>, align 8
^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.1a-neon-intrinsics.c:97:20: error: CHECK-ARM-NEXT: is not on the line after the previous match
// CHECK-ARM-NEXT: [[TMP0:%.*]] = bitcast <2 x i32> [[C:%.*]] to <8 x i8>
                   ^
<stdin>:154:2: note: 'next' match was here
 %vqrdmlah_s324.i = bitcast <2 x i32> %vqrdmlah_s323.i to <8 x i8>
 ^
<stdin>:131:7: note: previous match ended here
entry:
      ^
<stdin>:132:1: note: non-matching line after previous match is here
 %__p0.addr.i = alloca <2 x i32>, align 8
^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.1a-neon-intrinsics.c:118:20: error: CHECK-ARM-NEXT: expected string not found in input
// CHECK-ARM-NEXT: [[TMP0:%.*]] = bitcast <4 x i16> [[C:%.*]] to <8 x i8>
                   ^
<stdin>:162:7: note: scanning from here
entry:
      ^
<stdin>:171:2: note: possible intended match here
 %1 = bitcast <8 x i8> %0 to <4 x i16>
 ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.1a-neon-intrinsics.c:139:20: error: CHECK-ARM-NEXT: expected string not found in input
// CHECK-ARM-NEXT: [[TMP0:%.*]] = bitcast <2 x i32> [[C:%.*]] to <8 x i8>
                   ^
<stdin>:193:7: note: scanning from here
entry:
      ^
<stdin>:202:2: note: possible intended match here
 %1 = bitcast <8 x i8> %0 to <2 x i32>
 ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.1a-neon-intrinsics.c:160:20: error: CHECK-ARM-NEXT: is not on the line after the previous match
// CHECK-ARM-NEXT: [[VQRDMLSH_V3_I:%.*]] = call <4 x i16> @llvm.arm.neon.vqrdmlsh.v4i16(<4 x i16> [[A:%.*]], <4 x i16> [[B:%.*]], <4 x i16> [[C:%.*]])
                   ^
<stdin>:238:2: note: 'next' match was here
 %vqrdmlsh_s163.i = call <4 x i16> @llvm.arm.neon.vqrdmlsh.v4i16(<4 x i16> %vqrdmlsh_s16.i, <4 x i16> %vqrdmlsh_s161.i, <4 x i16> %vqrdmlsh_s162.i)
 ^
<stdin>:224:7: note: previous match ended here
entry:
      ^
<stdin>:225:1: note: non-matching line after previous match is here
 %__p0.addr.i = alloca <4 x i16>, align 8
^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.1a-neon-intrinsics.c:175:20: error: CHECK-ARM-NEXT: is not on the line after the previous match
// CHECK-ARM-NEXT: [[VQRDMLSH_V3_I:%.*]] = call <2 x i32> @llvm.arm.neon.vqrdmlsh.v2i32(<2 x i32> [[A:%.*]], <2 x i32> [[B:%.*]], <2 x i32> [[C:%.*]])
                   ^
<stdin>:261:2: note: 'next' match was here
 %vqrdmlsh_s323.i = call <2 x i32> @llvm.arm.neon.vqrdmlsh.v2i32(<2 x i32> %vqrdmlsh_s32.i, <2 x i32> %vqrdmlsh_s321.i, <2 x i32> %vqrdmlsh_s322.i)
 ^
<stdin>:247:7: note: previous match ended here
entry:
      ^
<stdin>:248:1: note: non-matching line after previous match is here
 %__p0.addr.i = alloca <2 x i32>, align 8
^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.1a-neon-intrinsics.c:190:20: error: CHECK-ARM-NEXT: is not on the line after the previous match
// CHECK-ARM-NEXT: [[VQRDMLSHQ_V3_I:%.*]] = call <8 x i16> @llvm.arm.neon.vqrdmlsh.v8i16(<8 x i16> [[A:%.*]], <8 x i16> [[B:%.*]], <8 x i16> [[C:%.*]])
                   ^
<stdin>:284:2: note: 'next' match was here
 %vqrdmlshq_s163.i = call <8 x i16> @llvm.arm.neon.vqrdmlsh.v8i16(<8 x i16> %vqrdmlshq_s16.i, <8 x i16> %vqrdmlshq_s161.i, <8 x i16> %vqrdmlshq_s162.i)
 ^
<stdin>:270:7: note: previous match ended here
entry:
      ^
<stdin>:271:1: note: non-matching line after previous match is here
 %__p0.addr.i = alloca <8 x i16>, align 16
^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.1a-neon-intrinsics.c:205:20: error: CHECK-ARM-NEXT: is not on the line after the previous match
// CHECK-ARM-NEXT: [[VQRDMLSHQ_V3_I:%.*]] = call <4 x i32> @llvm.arm.neon.vqrdmlsh.v4i32(<4 x i32> [[A:%.*]], <4 x i32> [[B:%.*]], <4 x i32> [[C:%.*]])
                   ^
<stdin>:307:2: note: 'next' match was here
 %vqrdmlshq_s323.i = call <4 x i32> @llvm.arm.neon.vqrdmlsh.v4i32(<4 x i32> %vqrdmlshq_s32.i, <4 x i32> %vqrdmlshq_s321.i, <4 x i32> %vqrdmlshq_s322.i)
 ^
<stdin>:293:7: note: previous match ended here
entry:
      ^
<stdin>:294:1: note: non-matching line after previous match is here
 %__p0.addr.i = alloca <4 x i32>, align 16
^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.1a-neon-intrinsics.c:220:20: error: CHECK-ARM-NEXT: is not on the line after the previous match
// CHECK-ARM-NEXT: [[TMP0:%.*]] = bitcast <4 x i16> [[C:%.*]] to <8 x i8>
                   ^
<stdin>:339:2: note: 'next' match was here
 %vqrdmlsh_s164.i = bitcast <4 x i16> %vqrdmlsh_s163.i to <8 x i8>
 ^
<stdin>:316:7: note: previous match ended here
entry:
      ^
<stdin>:317:1: note: non-matching line after previous match is here
 %__p0.addr.i = alloca <4 x i16>, align 8
^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.1a-neon-intrinsics.c:241:20: error: CHECK-ARM-NEXT: is not on the line after the previous match
// CHECK-ARM-NEXT: [[TMP0:%.*]] = bitcast <2 x i32> [[C:%.*]] to <8 x i8>
                   ^
<stdin>:370:2: note: 'next' match was here
 %vqrdmlsh_s324.i = bitcast <2 x i32> %vqrdmlsh_s323.i to <8 x i8>
 ^
<stdin>:347:7: note: previous match ended here
entry:
      ^
<stdin>:348:1: note: non-matching line after previous match is here
 %__p0.addr.i = alloca <2 x i32>, align 8
^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.1a-neon-intrinsics.c:262:20: error: CHECK-ARM-NEXT: expected string not found in input
// CHECK-ARM-NEXT: [[TMP0:%.*]] = bitcast <4 x i16> [[C:%.*]] to <8 x i8>
                   ^
<stdin>:378:7: note: scanning from here
entry:
      ^
<stdin>:387:2: note: possible intended match here
 %1 = bitcast <8 x i8> %0 to <4 x i16>
 ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.1a-neon-intrinsics.c:283:20: error: CHECK-ARM-NEXT: expected string not found in input
// CHECK-ARM-NEXT: [[TMP0:%.*]] = bitcast <2 x i32> [[C:%.*]] to <8 x i8>
                   ^
<stdin>:409:7: note: scanning from here
entry:
      ^
<stdin>:418:2: note: possible intended match here
 %1 = bitcast <8 x i8> %0 to <2 x i32>
 ^

Input file: <stdin>
Check file: /Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.1a-neon-intrinsics.c

-dump-input=help explains the following input dump.

Input was:
<<<<<<
            .
            .
            .
           17:  %1 = load <8 x i8>, ptr %__p1.addr.i, align 8 
           18:  %2 = load <8 x i8>, ptr %__p2.addr.i, align 8 
           19:  %vqrdmlah_s16.i = bitcast <8 x i8> %0 to <4 x i16> 
           20:  %vqrdmlah_s161.i = bitcast <8 x i8> %1 to <4 x i16> 
           21:  %vqrdmlah_s162.i = bitcast <8 x i8> %2 to <4 x i16> 
           22:  %vqrdmlah_s163.i = call <4 x i16> @llvm.arm.neon.vqrdmlah.v4i16(<4 x i16> %vqrdmlah_s16.i, <4 x i16> %vqrdmlah_s161.i, <4 x i16> %vqrdmlah_s162.i) 
next:16         !~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~  error: match on wrong line
           23:  %vqrdmlah_s164.i = bitcast <4 x i16> %vqrdmlah_s163.i to <8 x i8> 
           24:  store <8 x i8> %vqrdmlah_s164.i, ptr %ref.tmp.i, align 8 
           25:  %3 = load <4 x i16>, ptr %ref.tmp.i, align 8 
           26:  ret <4 x i16> %3 
           27: } 
            .
            .
            .
           40:  %1 = load <8 x i8>, ptr %__p1.addr.i, align 8 
           41:  %2 = load <8 x i8>, ptr %__p2.addr.i, align 8 
           42:  %vqrdmlah_s32.i = bitcast <8 x i8> %0 to <2 x i32> 
           43:  %vqrdmlah_s321.i = bitcast <8 x i8> %1 to <2 x i32> 
           44:  %vqrdmlah_s322.i = bitcast <8 x i8> %2 to <2 x i32> 
           45:  %vqrdmlah_s323.i = call <2 x i32> @llvm.arm.neon.vqrdmlah.v2i32(<2 x i32> %vqrdmlah_s32.i, <2 x i32> %vqrdmlah_s321.i, <2 x i32> %vqrdmlah_s322.i) 
next:31         !~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~  error: match on wrong line
           46:  %vqrdmlah_s324.i = bitcast <2 x i32> %vqrdmlah_s323.i to <8 x i8> 
           47:  store <8 x i8> %vqrdmlah_s324.i, ptr %ref.tmp.i, align 8 
           48:  %3 = load <2 x i32>, ptr %ref.tmp.i, align 8 
           49:  ret <2 x i32> %3 
           50: } 
            .
            .
            .
           63:  %1 = load <16 x i8>, ptr %__p1.addr.i, align 16 
           64:  %2 = load <16 x i8>, ptr %__p2.addr.i, align 16 
           65:  %vqrdmlahq_s16.i = bitcast <16 x i8> %0 to <8 x i16> 
           66:  %vqrdmlahq_s161.i = bitcast <16 x i8> %1 to <8 x i16> 
           67:  %vqrdmlahq_s162.i = bitcast <16 x i8> %2 to <8 x i16> 
           68:  %vqrdmlahq_s163.i = call <8 x i16> @llvm.arm.neon.vqrdmlah.v8i16(<8 x i16> %vqrdmlahq_s16.i, <8 x i16> %vqrdmlahq_s161.i, <8 x i16> %vqrdmlahq_s162.i) 
next:46         !~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~  error: match on wrong line
           69:  %vqrdmlahq_s164.i = bitcast <8 x i16> %vqrdmlahq_s163.i to <16 x i8> 
           70:  store <16 x i8> %vqrdmlahq_s164.i, ptr %ref.tmp.i, align 16 
           71:  %3 = load <8 x i16>, ptr %ref.tmp.i, align 16 
           72:  ret <8 x i16> %3 
           73: } 
            .
            .
            .
           86:  %1 = load <16 x i8>, ptr %__p1.addr.i, align 16 
           87:  %2 = load <16 x i8>, ptr %__p2.addr.i, align 16 
           88:  %vqrdmlahq_s32.i = bitcast <16 x i8> %0 to <4 x i32> 
           89:  %vqrdmlahq_s321.i = bitcast <16 x i8> %1 to <4 x i32> 
           90:  %vqrdmlahq_s322.i = bitcast <16 x i8> %2 to <4 x i32> 
           91:  %vqrdmlahq_s323.i = call <4 x i32> @llvm.arm.neon.vqrdmlah.v4i32(<4 x i32> %vqrdmlahq_s32.i, <4 x i32> %vqrdmlahq_s321.i, <4 x i32> %vqrdmlahq_s322.i) 
next:61         !~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~  error: match on wrong line
           92:  %vqrdmlahq_s324.i = bitcast <4 x i32> %vqrdmlahq_s323.i to <16 x i8> 
           93:  store <16 x i8> %vqrdmlahq_s324.i, ptr %ref.tmp.i, align 16 
           94:  %3 = load <4 x i32>, ptr %ref.tmp.i, align 16 
           95:  ret <4 x i32> %3 
           96: } 
            .
            .
            .
          118:  %5 = load <8 x i8>, ptr %__p2.addr.i, align 8 
          119:  %vqrdmlah_s16.i = bitcast <8 x i8> %3 to <4 x i16> 
          120:  %vqrdmlah_s161.i = bitcast <8 x i8> %4 to <4 x i16> 
          121:  %vqrdmlah_s162.i = bitcast <8 x i8> %5 to <4 x i16> 
          122:  %vqrdmlah_s163.i = call <4 x i16> @llvm.arm.neon.vqrdmlah.v4i16(<4 x i16> %vqrdmlah_s16.i, <4 x i16> %vqrdmlah_s161.i, <4 x i16> %vqrdmlah_s162.i) 
          123:  %vqrdmlah_s164.i = bitcast <4 x i16> %vqrdmlah_s163.i to <8 x i8> 
next:76         !~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~  error: match on wrong line
          124:  store <8 x i8> %vqrdmlah_s164.i, ptr %ref.tmp.i, align 8 
          125:  %6 = load <4 x i16>, ptr %ref.tmp.i, align 8 
          126:  ret <4 x i16> %6 
          127: } 
          128:  
            .
            .
            .
          149:  %5 = load <8 x i8>, ptr %__p2.addr.i, align 8 
          150:  %vqrdmlah_s32.i = bitcast <8 x i8> %3 to <2 x i32> 
          151:  %vqrdmlah_s321.i = bitcast <8 x i8> %4 to <2 x i32> 
          152:  %vqrdmlah_s322.i = bitcast <8 x i8> %5 to <2 x i32> 
          153:  %vqrdmlah_s323.i = call <2 x i32> @llvm.arm.neon.vqrdmlah.v2i32(<2 x i32> %vqrdmlah_s32.i, <2 x i32> %vqrdmlah_s321.i, <2 x i32> %vqrdmlah_s322.i) 
          154:  %vqrdmlah_s324.i = bitcast <2 x i32> %vqrdmlah_s323.i to <8 x i8> 
next:97         !~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~  error: match on wrong line
          155:  store <8 x i8> %vqrdmlah_s324.i, ptr %ref.tmp.i, align 8 
          156:  %6 = load <2 x i32>, ptr %ref.tmp.i, align 8 
          157:  ret <2 x i32> %6 
          158: } 
          159:  
          160: ; Function Attrs: noinline nounwind 
          161: define dso_local <8 x i16> @test_vqrdmlahq_lane_s16(<8 x i16> noundef %a, <8 x i16> noundef %b, <4 x i16> noundef %c) #0 { 
          162: entry: 
next:118'0           X error: no match found
          163:  %__p0.addr.i = alloca <8 x i16>, align 16 
next:118'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          164:  %__p1.addr.i = alloca <8 x i16>, align 16 
next:118'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          165:  %__p2.addr.i = alloca <8 x i16>, align 16 
next:118'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          166:  %ref.tmp.i = alloca <16 x i8>, align 16 
next:118'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          167:  %__s0 = alloca <4 x i16>, align 8 
next:118'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          168:  %ref.tmp = alloca <16 x i8>, align 16 
next:118'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          169:  store <4 x i16> %c, ptr %__s0, align 8 
next:118'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          170:  %0 = load <8 x i8>, ptr %__s0, align 8 
next:118'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          171:  %1 = bitcast <8 x i8> %0 to <4 x i16> 
next:118'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
next:118'1      ?                                      possible intended match
          172:  %lane = shufflevector <4 x i16> %1, <4 x i16> %1, <8 x i32> <i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3> 
next:118'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          173:  store <8 x i16> %lane, ptr %ref.tmp, align 16 
next:118'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          174:  %2 = load <8 x i16>, ptr %ref.tmp, align 16 
next:118'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          175:  store <8 x i16> %a, ptr %__p0.addr.i, align 16 
next:118'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          176:  store <8 x i16> %b, ptr %__p1.addr.i, align 16 
next:118'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            .
            .
            .
          188:  ret <8 x i16> %6 
next:118'0     ~~~~~~~~~~~~~~~~~~
          189: } 
next:118'0     ~~
          190:  
next:118'0     ~
          191: ; Function Attrs: noinline nounwind 
next:118'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          192: define dso_local <4 x i32> @test_vqrdmlahq_lane_s32(<4 x i32> noundef %a, <4 x i32> noundef %b, <2 x i32> noundef %c) #0 { 
next:118'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          193: entry: 
next:139'0           X error: no match found
          194:  %__p0.addr.i = alloca <4 x i32>, align 16 
next:139'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          195:  %__p1.addr.i = alloca <4 x i32>, align 16 
next:139'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          196:  %__p2.addr.i = alloca <4 x i32>, align 16 
next:139'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          197:  %ref.tmp.i = alloca <16 x i8>, align 16 
next:139'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          198:  %__s0 = alloca <2 x i32>, align 8 
next:139'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          199:  %ref.tmp = alloca <16 x i8>, align 16 
next:139'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          200:  store <2 x i32> %c, ptr %__s0, align 8 
next:139'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          201:  %0 = load <8 x i8>, ptr %__s0, align 8 
next:139'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          202:  %1 = bitcast <8 x i8> %0 to <2 x i32> 
next:139'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
next:139'1      ?                                      possible intended match
          203:  %lane = shufflevector <2 x i32> %1, <2 x i32> %1, <4 x i32> <i32 1, i32 1, i32 1, i32 1> 
next:139'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          204:  store <4 x i32> %lane, ptr %ref.tmp, align 16 
next:139'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          205:  %2 = load <4 x i32>, ptr %ref.tmp, align 16 
next:139'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          206:  store <4 x i32> %a, ptr %__p0.addr.i, align 16 
next:139'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          207:  store <4 x i32> %b, ptr %__p1.addr.i, align 16 
next:139'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            .
            .
            .
          233:  %1 = load <8 x i8>, ptr %__p1.addr.i, align 8 
          234:  %2 = load <8 x i8>, ptr %__p2.addr.i, align 8 
          235:  %vqrdmlsh_s16.i = bitcast <8 x i8> %0 to <4 x i16> 
          236:  %vqrdmlsh_s161.i = bitcast <8 x i8> %1 to <4 x i16> 
          237:  %vqrdmlsh_s162.i = bitcast <8 x i8> %2 to <4 x i16> 
          238:  %vqrdmlsh_s163.i = call <4 x i16> @llvm.arm.neon.vqrdmlsh.v4i16(<4 x i16> %vqrdmlsh_s16.i, <4 x i16> %vqrdmlsh_s161.i, <4 x i16> %vqrdmlsh_s162.i) 
next:160        !~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~  error: match on wrong line
          239:  %vqrdmlsh_s164.i = bitcast <4 x i16> %vqrdmlsh_s163.i to <8 x i8> 
          240:  store <8 x i8> %vqrdmlsh_s164.i, ptr %ref.tmp.i, align 8 
          241:  %3 = load <4 x i16>, ptr %ref.tmp.i, align 8 
          242:  ret <4 x i16> %3 
          243: } 
            .
            .
            .
          256:  %1 = load <8 x i8>, ptr %__p1.addr.i, align 8 
          257:  %2 = load <8 x i8>, ptr %__p2.addr.i, align 8 
          258:  %vqrdmlsh_s32.i = bitcast <8 x i8> %0 to <2 x i32> 
          259:  %vqrdmlsh_s321.i = bitcast <8 x i8> %1 to <2 x i32> 
          260:  %vqrdmlsh_s322.i = bitcast <8 x i8> %2 to <2 x i32> 
          261:  %vqrdmlsh_s323.i = call <2 x i32> @llvm.arm.neon.vqrdmlsh.v2i32(<2 x i32> %vqrdmlsh_s32.i, <2 x i32> %vqrdmlsh_s321.i, <2 x i32> %vqrdmlsh_s322.i) 
next:175        !~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~  error: match on wrong line
          262:  %vqrdmlsh_s324.i = bitcast <2 x i32> %vqrdmlsh_s323.i to <8 x i8> 
          263:  store <8 x i8> %vqrdmlsh_s324.i, ptr %ref.tmp.i, align 8 
          264:  %3 = load <2 x i32>, ptr %ref.tmp.i, align 8 
          265:  ret <2 x i32> %3 
          266: } 
            .
            .
            .
          279:  %1 = load <16 x i8>, ptr %__p1.addr.i, align 16 
          280:  %2 = load <16 x i8>, ptr %__p2.addr.i, align 16 
          281:  %vqrdmlshq_s16.i = bitcast <16 x i8> %0 to <8 x i16> 
          282:  %vqrdmlshq_s161.i = bitcast <16 x i8> %1 to <8 x i16> 
          283:  %vqrdmlshq_s162.i = bitcast <16 x i8> %2 to <8 x i16> 
          284:  %vqrdmlshq_s163.i = call <8 x i16> @llvm.arm.neon.vqrdmlsh.v8i16(<8 x i16> %vqrdmlshq_s16.i, <8 x i16> %vqrdmlshq_s161.i, <8 x i16> %vqrdmlshq_s162.i) 
next:190        !~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~  error: match on wrong line
          285:  %vqrdmlshq_s164.i = bitcast <8 x i16> %vqrdmlshq_s163.i to <16 x i8> 
          286:  store <16 x i8> %vqrdmlshq_s164.i, ptr %ref.tmp.i, align 16 
          287:  %3 = load <8 x i16>, ptr %ref.tmp.i, align 16 
          288:  ret <8 x i16> %3 
          289: } 
            .
            .
            .
          302:  %1 = load <16 x i8>, ptr %__p1.addr.i, align 16 
          303:  %2 = load <16 x i8>, ptr %__p2.addr.i, align 16 
          304:  %vqrdmlshq_s32.i = bitcast <16 x i8> %0 to <4 x i32> 
          305:  %vqrdmlshq_s321.i = bitcast <16 x i8> %1 to <4 x i32> 
          306:  %vqrdmlshq_s322.i = bitcast <16 x i8> %2 to <4 x i32> 
          307:  %vqrdmlshq_s323.i = call <4 x i32> @llvm.arm.neon.vqrdmlsh.v4i32(<4 x i32> %vqrdmlshq_s32.i, <4 x i32> %vqrdmlshq_s321.i, <4 x i32> %vqrdmlshq_s322.i) 
next:205        !~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~  error: match on wrong line
          308:  %vqrdmlshq_s324.i = bitcast <4 x i32> %vqrdmlshq_s323.i to <16 x i8> 
          309:  store <16 x i8> %vqrdmlshq_s324.i, ptr %ref.tmp.i, align 16 
          310:  %3 = load <4 x i32>, ptr %ref.tmp.i, align 16 
          311:  ret <4 x i32> %3 
          312: } 
            .
            .
            .
          334:  %5 = load <8 x i8>, ptr %__p2.addr.i, align 8 
          335:  %vqrdmlsh_s16.i = bitcast <8 x i8> %3 to <4 x i16> 
          336:  %vqrdmlsh_s161.i = bitcast <8 x i8> %4 to <4 x i16> 
          337:  %vqrdmlsh_s162.i = bitcast <8 x i8> %5 to <4 x i16> 
          338:  %vqrdmlsh_s163.i = call <4 x i16> @llvm.arm.neon.vqrdmlsh.v4i16(<4 x i16> %vqrdmlsh_s16.i, <4 x i16> %vqrdmlsh_s161.i, <4 x i16> %vqrdmlsh_s162.i) 
          339:  %vqrdmlsh_s164.i = bitcast <4 x i16> %vqrdmlsh_s163.i to <8 x i8> 
next:220        !~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~  error: match on wrong line
          340:  store <8 x i8> %vqrdmlsh_s164.i, ptr %ref.tmp.i, align 8 
          341:  %6 = load <4 x i16>, ptr %ref.tmp.i, align 8 
          342:  ret <4 x i16> %6 
          343: } 
          344:  
            .
            .
            .
          365:  %5 = load <8 x i8>, ptr %__p2.addr.i, align 8 
          366:  %vqrdmlsh_s32.i = bitcast <8 x i8> %3 to <2 x i32> 
          367:  %vqrdmlsh_s321.i = bitcast <8 x i8> %4 to <2 x i32> 
          368:  %vqrdmlsh_s322.i = bitcast <8 x i8> %5 to <2 x i32> 
          369:  %vqrdmlsh_s323.i = call <2 x i32> @llvm.arm.neon.vqrdmlsh.v2i32(<2 x i32> %vqrdmlsh_s32.i, <2 x i32> %vqrdmlsh_s321.i, <2 x i32> %vqrdmlsh_s322.i) 
          370:  %vqrdmlsh_s324.i = bitcast <2 x i32> %vqrdmlsh_s323.i to <8 x i8> 
next:241        !~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~  error: match on wrong line
          371:  store <8 x i8> %vqrdmlsh_s324.i, ptr %ref.tmp.i, align 8 
          372:  %6 = load <2 x i32>, ptr %ref.tmp.i, align 8 
          373:  ret <2 x i32> %6 
          374: } 
          375:  
          376: ; Function Attrs: noinline nounwind 
          377: define dso_local <8 x i16> @test_vqrdmlshq_lane_s16(<8 x i16> noundef %a, <8 x i16> noundef %b, <4 x i16> noundef %c) #0 { 
          378: entry: 
next:262'0           X error: no match found
          379:  %__p0.addr.i = alloca <8 x i16>, align 16 
next:262'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          380:  %__p1.addr.i = alloca <8 x i16>, align 16 
next:262'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          381:  %__p2.addr.i = alloca <8 x i16>, align 16 
next:262'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          382:  %ref.tmp.i = alloca <16 x i8>, align 16 
next:262'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          383:  %__s0 = alloca <4 x i16>, align 8 
next:262'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          384:  %ref.tmp = alloca <16 x i8>, align 16 
next:262'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          385:  store <4 x i16> %c, ptr %__s0, align 8 
next:262'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          386:  %0 = load <8 x i8>, ptr %__s0, align 8 
next:262'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          387:  %1 = bitcast <8 x i8> %0 to <4 x i16> 
next:262'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
next:262'1      ?                                      possible intended match
          388:  %lane = shufflevector <4 x i16> %1, <4 x i16> %1, <8 x i32> <i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3> 
next:262'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          389:  store <8 x i16> %lane, ptr %ref.tmp, align 16 
next:262'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          390:  %2 = load <8 x i16>, ptr %ref.tmp, align 16 
next:262'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          391:  store <8 x i16> %a, ptr %__p0.addr.i, align 16 
next:262'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          392:  store <8 x i16> %b, ptr %__p1.addr.i, align 16 
next:262'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            .
            .
            .
          404:  ret <8 x i16> %6 
next:262'0     ~~~~~~~~~~~~~~~~~~
          405: } 
next:262'0     ~~
          406:  
next:262'0     ~
          407: ; Function Attrs: noinline nounwind 
next:262'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          408: define dso_local <4 x i32> @test_vqrdmlshq_lane_s32(<4 x i32> noundef %a, <4 x i32> noundef %b, <2 x i32> noundef %c) #0 { 
next:262'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          409: entry: 
next:283'0           X error: no match found
          410:  %__p0.addr.i = alloca <4 x i32>, align 16 
next:283'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          411:  %__p1.addr.i = alloca <4 x i32>, align 16 
next:283'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          412:  %__p2.addr.i = alloca <4 x i32>, align 16 
next:283'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          413:  %ref.tmp.i = alloca <16 x i8>, align 16 
next:283'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          414:  %__s0 = alloca <2 x i32>, align 8 
next:283'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          415:  %ref.tmp = alloca <16 x i8>, align 16 
next:283'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          416:  store <2 x i32> %c, ptr %__s0, align 8 
next:283'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          417:  %0 = load <8 x i8>, ptr %__s0, align 8 
next:283'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          418:  %1 = bitcast <8 x i8> %0 to <2 x i32> 
next:283'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
next:283'1      ?                                      possible intended match
          419:  %lane = shufflevector <2 x i32> %1, <2 x i32> %1, <4 x i32> <i32 1, i32 1, i32 1, i32 1> 
next:283'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          420:  store <4 x i32> %lane, ptr %ref.tmp, align 16 
next:283'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          421:  %2 = load <4 x i32>, ptr %ref.tmp, align 16 
next:283'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          422:  store <4 x i32> %a, ptr %__p0.addr.i, align 16 
next:283'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          423:  store <4 x i32> %b, ptr %__p1.addr.i, align 16 
next:283'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            .
            .
            .
>>>>>>

--

********************
Testing: 
FAIL: Clang :: CodeGen/arm-v8.6a-neon-intrinsics.c (6 of 21153)
******************** TEST 'Clang :: CodeGen/arm-v8.6a-neon-intrinsics.c' FAILED ********************
Exit Code: 1

Command Output (stderr):
--
/Users/thakis/src/llvm-project/out/gn/bin/clang -cc1 -internal-isystem /Users/thakis/src/llvm-project/out/gn/lib/clang/21/include -nostdsysteminc -triple armv8.6a-arm-none-eabi -target-feature +neon -target-feature +fullfp16 -target-feature +i8mm  -disable-O0-optnone -emit-llvm -o - /Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.6a-neon-intrinsics.c  | /Users/thakis/src/llvm-project/out/gn/bin/opt -S -passes=mem2reg,sroa  | /Users/thakis/src/llvm-project/out/gn/bin/FileCheck /Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.6a-neon-intrinsics.c # RUN: at line 1
+ /Users/thakis/src/llvm-project/out/gn/bin/clang -cc1 -internal-isystem /Users/thakis/src/llvm-project/out/gn/lib/clang/21/include -nostdsysteminc -triple armv8.6a-arm-none-eabi -target-feature +neon -target-feature +fullfp16 -target-feature +i8mm -disable-O0-optnone -emit-llvm -o - /Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.6a-neon-intrinsics.c
+ /Users/thakis/src/llvm-project/out/gn/bin/FileCheck /Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.6a-neon-intrinsics.c
+ /Users/thakis/src/llvm-project/out/gn/bin/opt -S -passes=mem2reg,sroa
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.6a-neon-intrinsics.c:11:11: error: CHECK: expected string not found in input
// CHECK: [[VAL:%.*]] = call <4 x i32> @llvm.arm.neon.smmla.v4i32.v16i8(<4 x i32> %r, <16 x i8> %a, <16 x i8> %b)
          ^
<stdin>:7:44: note: scanning from here
define dso_local <4 x i32> @test_vmmlaq_s32(<4 x i32> noundef %r, <16 x i8> noundef %a, <16 x i8> noundef %b) #0 {
                                           ^
<stdin>:11:7: note: possible intended match here
 %vmmla1.i = call <4 x i32> @llvm.arm.neon.smmla.v4i32.v16i8(<4 x i32> %vmmla.i, <16 x i8> %a, <16 x i8> %b)
      ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.6a-neon-intrinsics.c:18:11: error: CHECK: expected string not found in input
// CHECK: [[VAL:%.*]] = call <4 x i32> @llvm.arm.neon.ummla.v4i32.v16i8(<4 x i32> %r, <16 x i8> %a, <16 x i8> %b)
          ^
<stdin>:16:44: note: scanning from here
define dso_local <4 x i32> @test_vmmlaq_u32(<4 x i32> noundef %r, <16 x i8> noundef %a, <16 x i8> noundef %b) #0 {
                                           ^
<stdin>:20:7: note: possible intended match here
 %vmmla1.i = call <4 x i32> @llvm.arm.neon.ummla.v4i32.v16i8(<4 x i32> %vmmla.i, <16 x i8> %a, <16 x i8> %b)
      ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.6a-neon-intrinsics.c:25:11: error: CHECK: expected string not found in input
// CHECK: [[VAL:%.*]] = call <4 x i32> @llvm.arm.neon.usmmla.v4i32.v16i8(<4 x i32> %r, <16 x i8> %a, <16 x i8> %b)
          ^
<stdin>:25:46: note: scanning from here
define dso_local <4 x i32> @test_vusmmlaq_s32(<4 x i32> noundef %r, <16 x i8> noundef %a, <16 x i8> noundef %b) #0 {
                                             ^
<stdin>:29:9: note: possible intended match here
 %vusmmla1.i = call <4 x i32> @llvm.arm.neon.usmmla.v4i32.v16i8(<4 x i32> %vusmmla.i, <16 x i8> %a, <16 x i8> %b)
        ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.6a-neon-intrinsics.c:32:11: error: CHECK: expected string not found in input
// CHECK: [[VAL:%.*]] = call <2 x i32> @llvm.arm.neon.usdot.v2i32.v8i8(<2 x i32> %r, <8 x i8> %a, <8 x i8> %b)
          ^
<stdin>:34:44: note: scanning from here
define dso_local <2 x i32> @test_vusdot_s32(<2 x i32> noundef %r, <8 x i8> noundef %a, <8 x i8> noundef %b) #0 {
                                           ^
<stdin>:38:8: note: possible intended match here
 %vusdot1.i = call <2 x i32> @llvm.arm.neon.usdot.v2i32.v8i8(<2 x i32> %vusdot.i, <8 x i8> %a, <8 x i8> %b)
       ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.6a-neon-intrinsics.c:45:11: error: CHECK: expected string not found in input
// CHECK: [[OP:%.*]] = call <2 x i32> @llvm.arm.neon.usdot.v2i32.v8i8(<2 x i32> %r, <8 x i8> %a, <8 x i8> [[TMP3]])
          ^
<stdin>:50:39: note: scanning from here
 %4 = bitcast <2 x i32> %r to <8 x i8>
                                      ^
<stdin>:50:39: note: with "TMP3" equal to "%3"
 %4 = bitcast <2 x i32> %r to <8 x i8>
                                      ^
<stdin>:52:8: note: possible intended match here
 %vusdot1.i = call <2 x i32> @llvm.arm.neon.usdot.v2i32.v8i8(<2 x i32> %vusdot.i, <8 x i8> %a, <8 x i8> %3)
       ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.6a-neon-intrinsics.c:58:11: error: CHECK: expected string not found in input
// CHECK: [[OP:%.*]] = call <2 x i32> @llvm.arm.neon.usdot.v2i32.v8i8(<2 x i32> %r, <8 x i8> [[TMP3]], <8 x i8> %a)
          ^
<stdin>:64:39: note: scanning from here
 %4 = bitcast <2 x i32> %r to <8 x i8>
                                      ^
<stdin>:64:39: note: with "TMP3" equal to "%3"
 %4 = bitcast <2 x i32> %r to <8 x i8>
                                      ^
<stdin>:66:9: note: possible intended match here
 %vusdot1.i = call <2 x i32> @llvm.arm.neon.usdot.v2i32.v8i8(<2 x i32> %vusdot.i, <8 x i8> %3, <8 x i8> %a)
        ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.6a-neon-intrinsics.c:71:11: error: CHECK: expected string not found in input
// CHECK: [[OP:%.*]] = call <4 x i32> @llvm.arm.neon.usdot.v4i32.v16i8(<4 x i32> %r, <16 x i8> %a, <16 x i8> [[TMP4]])
          ^
<stdin>:78:40: note: scanning from here
 %4 = bitcast <4 x i32> %r to <16 x i8>
                                       ^
<stdin>:78:40: note: with "TMP4" equal to "%3"
 %4 = bitcast <4 x i32> %r to <16 x i8>
                                       ^
<stdin>:80:8: note: possible intended match here
 %vusdot1.i = call <4 x i32> @llvm.arm.neon.usdot.v4i32.v16i8(<4 x i32> %vusdot.i, <16 x i8> %a, <16 x i8> %3)
       ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.6a-neon-intrinsics.c:83:11: error: CHECK: expected string not found in input
// CHECK: [[OP:%.*]] = call <4 x i32> @llvm.arm.neon.usdot.v4i32.v16i8(<4 x i32> %r, <16 x i8> %3, <16 x i8> %a)
          ^
<stdin>:92:40: note: scanning from here
 %4 = bitcast <4 x i32> %r to <16 x i8>
                                       ^
<stdin>:94:8: note: possible intended match here
 %vusdot1.i = call <4 x i32> @llvm.arm.neon.usdot.v4i32.v16i8(<4 x i32> %vusdot.i, <16 x i8> %3, <16 x i8> %a)
       ^

Input file: <stdin>
Check file: /Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.6a-neon-intrinsics.c

-dump-input=help explains the following input dump.

Input was:
<<<<<<
            1: ; ModuleID = '<stdin>' 
            2: source_filename = "/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.6a-neon-intrinsics.c" 
            3: target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64" 
            4: target triple = "armv8.6a-arm-none-eabi" 
            5:  
            6: ; Function Attrs: noinline nounwind 
            7: define dso_local <4 x i32> @test_vmmlaq_s32(<4 x i32> noundef %r, <16 x i8> noundef %a, <16 x i8> noundef %b) #0 { 
check:11'0                                                X~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
            8: entry: 
check:11'0     ~~~~~~~
            9:  %0 = bitcast <4 x i32> %r to <16 x i8> 
check:11'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           10:  %vmmla.i = bitcast <16 x i8> %0 to <4 x i32> 
check:11'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           11:  %vmmla1.i = call <4 x i32> @llvm.arm.neon.smmla.v4i32.v16i8(<4 x i32> %vmmla.i, <16 x i8> %a, <16 x i8> %b) 
check:11'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:11'1           ?                                                                                                       possible intended match
           12:  ret <4 x i32> %vmmla1.i 
check:11'0     ~~~~~~~~~~~~~~~~~~~~~~~~~
           13: } 
check:11'0     ~~
           14:  
check:11'0     ~
           15: ; Function Attrs: noinline nounwind 
check:11'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           16: define dso_local <4 x i32> @test_vmmlaq_u32(<4 x i32> noundef %r, <16 x i8> noundef %a, <16 x i8> noundef %b) #0 { 
check:11'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:18'0                                                X~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           17: entry: 
check:18'0     ~~~~~~~
           18:  %0 = bitcast <4 x i32> %r to <16 x i8> 
check:18'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           19:  %vmmla.i = bitcast <16 x i8> %0 to <4 x i32> 
check:18'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           20:  %vmmla1.i = call <4 x i32> @llvm.arm.neon.ummla.v4i32.v16i8(<4 x i32> %vmmla.i, <16 x i8> %a, <16 x i8> %b) 
check:18'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:18'1           ?                                                                                                       possible intended match
           21:  ret <4 x i32> %vmmla1.i 
check:18'0     ~~~~~~~~~~~~~~~~~~~~~~~~~
           22: } 
check:18'0     ~~
           23:  
check:18'0     ~
           24: ; Function Attrs: noinline nounwind 
check:18'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           25: define dso_local <4 x i32> @test_vusmmlaq_s32(<4 x i32> noundef %r, <16 x i8> noundef %a, <16 x i8> noundef %b) #0 { 
check:18'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:25'0                                                  X~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           26: entry: 
check:25'0     ~~~~~~~
           27:  %0 = bitcast <4 x i32> %r to <16 x i8> 
check:25'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           28:  %vusmmla.i = bitcast <16 x i8> %0 to <4 x i32> 
check:25'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           29:  %vusmmla1.i = call <4 x i32> @llvm.arm.neon.usmmla.v4i32.v16i8(<4 x i32> %vusmmla.i, <16 x i8> %a, <16 x i8> %b) 
check:25'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:25'1             ?                                                                                                          possible intended match
           30:  ret <4 x i32> %vusmmla1.i 
check:25'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~
           31: } 
check:25'0     ~~
           32:  
check:25'0     ~
           33: ; Function Attrs: noinline nounwind 
check:25'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           34: define dso_local <2 x i32> @test_vusdot_s32(<2 x i32> noundef %r, <8 x i8> noundef %a, <8 x i8> noundef %b) #0 { 
check:25'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:32'0                                                X~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           35: entry: 
check:32'0     ~~~~~~~
           36:  %0 = bitcast <2 x i32> %r to <8 x i8> 
check:32'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           37:  %vusdot.i = bitcast <8 x i8> %0 to <2 x i32> 
check:32'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           38:  %vusdot1.i = call <2 x i32> @llvm.arm.neon.usdot.v2i32.v8i8(<2 x i32> %vusdot.i, <8 x i8> %a, <8 x i8> %b) 
check:32'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:32'1            ?                                                                                                     possible intended match
           39:  ret <2 x i32> %vusdot1.i 
check:32'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~
           40: } 
check:32'0     ~~
           41:  
check:32'0     ~
           42: ; Function Attrs: noinline nounwind 
check:32'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           43: define dso_local <2 x i32> @test_vusdot_lane_s32(<2 x i32> noundef %r, <8 x i8> noundef %a, <8 x i8> noundef %b) #0 { 
check:32'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           44: entry: 
           45:  %0 = bitcast <8 x i8> %b to <2 x i32> 
           46:  %1 = bitcast <2 x i32> %0 to <8 x i8> 
           47:  %2 = bitcast <8 x i8> %1 to <2 x i32> 
           48:  %lane = shufflevector <2 x i32> %2, <2 x i32> %2, <2 x i32> zeroinitializer 
           49:  %3 = bitcast <2 x i32> %lane to <8 x i8> 
           50:  %4 = bitcast <2 x i32> %r to <8 x i8> 
check:45'0                                           X error: no match found
check:45'1                                             with "TMP3" equal to "%3"
           51:  %vusdot.i = bitcast <8 x i8> %4 to <2 x i32> 
check:45'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           52:  %vusdot1.i = call <2 x i32> @llvm.arm.neon.usdot.v2i32.v8i8(<2 x i32> %vusdot.i, <8 x i8> %a, <8 x i8> %3) 
check:45'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:45'2            ?                                                                                                     possible intended match
           53:  ret <2 x i32> %vusdot1.i 
check:45'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~
           54: } 
check:45'0     ~~
           55:  
check:45'0     ~
           56: ; Function Attrs: noinline nounwind 
check:45'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           57: define dso_local <2 x i32> @test_vsudot_lane_s32(<2 x i32> noundef %r, <8 x i8> noundef %a, <8 x i8> noundef %b) #0 { 
check:45'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           58: entry: 
           59:  %0 = bitcast <8 x i8> %b to <2 x i32> 
           60:  %1 = bitcast <2 x i32> %0 to <8 x i8> 
           61:  %2 = bitcast <8 x i8> %1 to <2 x i32> 
           62:  %lane = shufflevector <2 x i32> %2, <2 x i32> %2, <2 x i32> zeroinitializer 
           63:  %3 = bitcast <2 x i32> %lane to <8 x i8> 
           64:  %4 = bitcast <2 x i32> %r to <8 x i8> 
check:58'0                                           X error: no match found
check:58'1                                             with "TMP3" equal to "%3"
           65:  %vusdot.i = bitcast <8 x i8> %4 to <2 x i32> 
check:58'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           66:  %vusdot1.i = call <2 x i32> @llvm.arm.neon.usdot.v2i32.v8i8(<2 x i32> %vusdot.i, <8 x i8> %3, <8 x i8> %a) 
check:58'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:58'2             ?                                                                                                    possible intended match
           67:  ret <2 x i32> %vusdot1.i 
check:58'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~
           68: } 
check:58'0     ~~
           69:  
check:58'0     ~
           70: ; Function Attrs: noinline nounwind 
check:58'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           71: define dso_local <4 x i32> @test_vusdotq_lane_s32(<4 x i32> noundef %r, <16 x i8> noundef %a, <8 x i8> noundef %b) #0 { 
check:58'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           72: entry: 
           73:  %0 = bitcast <8 x i8> %b to <2 x i32> 
           74:  %1 = bitcast <2 x i32> %0 to <8 x i8> 
           75:  %2 = bitcast <8 x i8> %1 to <2 x i32> 
           76:  %lane = shufflevector <2 x i32> %2, <2 x i32> %2, <4 x i32> zeroinitializer 
           77:  %3 = bitcast <4 x i32> %lane to <16 x i8> 
           78:  %4 = bitcast <4 x i32> %r to <16 x i8> 
check:71'0                                            X error: no match found
check:71'1                                              with "TMP4" equal to "%3"
           79:  %vusdot.i = bitcast <16 x i8> %4 to <4 x i32> 
check:71'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           80:  %vusdot1.i = call <4 x i32> @llvm.arm.neon.usdot.v4i32.v16i8(<4 x i32> %vusdot.i, <16 x i8> %a, <16 x i8> %3) 
check:71'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:71'2            ?                                                                                                        possible intended match
           81:  ret <4 x i32> %vusdot1.i 
check:71'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~
           82: } 
check:71'0     ~~
           83:  
check:71'0     ~
           84: ; Function Attrs: noinline nounwind 
check:71'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           85: define dso_local <4 x i32> @test_vsudotq_lane_s32(<4 x i32> noundef %r, <16 x i8> noundef %a, <8 x i8> noundef %b) #0 { 
check:71'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           86: entry: 
           87:  %0 = bitcast <8 x i8> %b to <2 x i32> 
           88:  %1 = bitcast <2 x i32> %0 to <8 x i8> 
           89:  %2 = bitcast <8 x i8> %1 to <2 x i32> 
           90:  %lane = shufflevector <2 x i32> %2, <2 x i32> %2, <4 x i32> zeroinitializer 
           91:  %3 = bitcast <4 x i32> %lane to <16 x i8> 
           92:  %4 = bitcast <4 x i32> %r to <16 x i8> 
check:83'0                                            X error: no match found
           93:  %vusdot.i = bitcast <16 x i8> %4 to <4 x i32> 
check:83'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           94:  %vusdot1.i = call <4 x i32> @llvm.arm.neon.usdot.v4i32.v16i8(<4 x i32> %vusdot.i, <16 x i8> %3, <16 x i8> %a) 
check:83'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:83'1            ?                                                                                                        possible intended match
           95:  ret <4 x i32> %vusdot1.i 
check:83'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~
           96: } 
check:83'0     ~~
           97:  
check:83'0     ~
           98: ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none) 
check:83'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           99: declare <4 x i32> @llvm.arm.neon.smmla.v4i32.v16i8(<4 x i32>, <16 x i8>, <16 x i8>) #1 
check:83'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            .
            .
            .
>>>>>>

--

********************
Testing: 
FAIL: Clang :: CodeGen/arm-v8.2a-neon-intrinsics.c (7 of 21153)
******************** TEST 'Clang :: CodeGen/arm-v8.2a-neon-intrinsics.c' FAILED ********************
Exit Code: 1

Command Output (stderr):
--
/Users/thakis/src/llvm-project/out/gn/bin/clang -cc1 -internal-isystem /Users/thakis/src/llvm-project/out/gn/lib/clang/21/include -nostdsysteminc -triple armv8.2a-linux-gnu -target-abi apcs-gnu -target-feature +neon -target-feature +fullfp16  -disable-O0-optnone -emit-llvm -o - /Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c  | /Users/thakis/src/llvm-project/out/gn/bin/opt -S -passes=mem2reg  | /Users/thakis/src/llvm-project/out/gn/bin/FileCheck /Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c # RUN: at line 1
+ /Users/thakis/src/llvm-project/out/gn/bin/clang -cc1 -internal-isystem /Users/thakis/src/llvm-project/out/gn/lib/clang/21/include -nostdsysteminc -triple armv8.2a-linux-gnu -target-abi apcs-gnu -target-feature +neon -target-feature +fullfp16 -disable-O0-optnone -emit-llvm -o - /Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c
+ /Users/thakis/src/llvm-project/out/gn/bin/opt -S -passes=mem2reg
+ /Users/thakis/src/llvm-project/out/gn/bin/FileCheck /Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:11:11: error: CHECK: expected string not found in input
// CHECK: [[ABS:%.*]] = call <4 x half> @llvm.fabs.v4f16(<4 x half> %a)
          ^
<stdin>:7:43: note: scanning from here
define dso_local <4 x half> @test_vabs_f16(<4 x half> noundef %a) #0 {
                                          ^
<stdin>:14:6: note: possible intended match here
 %vabs1.i = call <4 x half> @llvm.fabs.v4f16(<4 x half> %vabs.i)
     ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:18:11: error: CHECK: expected string not found in input
// CHECK: [[ABS:%.*]] = call <8 x half> @llvm.fabs.v8f16(<8 x half> %a)
          ^
<stdin>:21:44: note: scanning from here
define dso_local <8 x half> @test_vabsq_f16(<8 x half> noundef %a) #0 {
                                           ^
<stdin>:28:6: note: possible intended match here
 %vabs1.i = call <8 x half> @llvm.fabs.v8f16(<8 x half> %vabs.i)
     ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:25:11: error: CHECK: expected string not found in input
// CHECK: [[TMP1:%.*]] = fcmp oeq <4 x half> %a, zeroinitializer
          ^
<stdin>:35:43: note: scanning from here
define dso_local <4 x i16> @test_vceqz_f16(<4 x half> noundef %a) #0 {
                                          ^
<stdin>:42:2: note: possible intended match here
 %2 = fcmp oeq <4 x half> %1, zeroinitializer
 ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:33:11: error: CHECK: expected string not found in input
// CHECK: [[TMP1:%.*]] = fcmp oeq <8 x half> %a, zeroinitializer
          ^
<stdin>:50:44: note: scanning from here
define dso_local <8 x i16> @test_vceqzq_f16(<8 x half> noundef %a) #0 {
                                           ^
<stdin>:57:2: note: possible intended match here
 %2 = fcmp oeq <8 x half> %1, zeroinitializer
 ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:41:11: error: CHECK: expected string not found in input
// CHECK: [[TMP1:%.*]] = fcmp oge <4 x half> %a, zeroinitializer
          ^
<stdin>:65:43: note: scanning from here
define dso_local <4 x i16> @test_vcgez_f16(<4 x half> noundef %a) #0 {
                                          ^
<stdin>:72:2: note: possible intended match here
 %2 = fcmp oge <4 x half> %1, zeroinitializer
 ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:49:11: error: CHECK: expected string not found in input
// CHECK: [[TMP1:%.*]] = fcmp oge <8 x half> %a, zeroinitializer
          ^
<stdin>:80:44: note: scanning from here
define dso_local <8 x i16> @test_vcgezq_f16(<8 x half> noundef %a) #0 {
                                           ^
<stdin>:87:2: note: possible intended match here
 %2 = fcmp oge <8 x half> %1, zeroinitializer
 ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:57:11: error: CHECK: expected string not found in input
// CHECK: [[TMP1:%.*]] = fcmp ogt <4 x half> %a, zeroinitializer
          ^
<stdin>:95:43: note: scanning from here
define dso_local <4 x i16> @test_vcgtz_f16(<4 x half> noundef %a) #0 {
                                          ^
<stdin>:102:2: note: possible intended match here
 %2 = fcmp ogt <4 x half> %1, zeroinitializer
 ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:65:11: error: CHECK: expected string not found in input
// CHECK: [[TMP1:%.*]] = fcmp ogt <8 x half> %a, zeroinitializer
          ^
<stdin>:110:44: note: scanning from here
define dso_local <8 x i16> @test_vcgtzq_f16(<8 x half> noundef %a) #0 {
                                           ^
<stdin>:117:2: note: possible intended match here
 %2 = fcmp ogt <8 x half> %1, zeroinitializer
 ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:73:11: error: CHECK: expected string not found in input
// CHECK: [[TMP1:%.*]] = fcmp ole <4 x half> %a, zeroinitializer
          ^
<stdin>:125:43: note: scanning from here
define dso_local <4 x i16> @test_vclez_f16(<4 x half> noundef %a) #0 {
                                          ^
<stdin>:132:2: note: possible intended match here
 %2 = fcmp ole <4 x half> %1, zeroinitializer
 ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:81:11: error: CHECK: expected string not found in input
// CHECK: [[TMP1:%.*]] = fcmp ole <8 x half> %a, zeroinitializer
          ^
<stdin>:140:44: note: scanning from here
define dso_local <8 x i16> @test_vclezq_f16(<8 x half> noundef %a) #0 {
                                           ^
<stdin>:147:2: note: possible intended match here
 %2 = fcmp ole <8 x half> %1, zeroinitializer
 ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:89:11: error: CHECK: expected string not found in input
// CHECK: [[TMP1:%.*]] = fcmp olt <4 x half> %a, zeroinitializer
          ^
<stdin>:155:43: note: scanning from here
define dso_local <4 x i16> @test_vcltz_f16(<4 x half> noundef %a) #0 {
                                          ^
<stdin>:162:2: note: possible intended match here
 %2 = fcmp olt <4 x half> %1, zeroinitializer
 ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:97:11: error: CHECK: expected string not found in input
// CHECK: [[TMP1:%.*]] = fcmp olt <8 x half> %a, zeroinitializer
          ^
<stdin>:170:44: note: scanning from here
define dso_local <8 x i16> @test_vcltzq_f16(<8 x half> noundef %a) #0 {
                                           ^
<stdin>:177:2: note: possible intended match here
 %2 = fcmp olt <8 x half> %1, zeroinitializer
 ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:105:11: error: CHECK: expected string not found in input
// CHECK: [[VCVT:%.*]] = sitofp <4 x i16> %a to <4 x half>
          ^
<stdin>:185:47: note: scanning from here
define dso_local <4 x half> @test_vcvt_f16_s16(<4 x i16> noundef %a) #0 {
                                              ^
<stdin>:192:5: note: possible intended match here
 %vcvt.i = sitofp <4 x i16> %1 to <4 x half>
    ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:112:11: error: CHECK: expected string not found in input
// CHECK: [[VCVT:%.*]] = sitofp <8 x i16> %a to <8 x half>
          ^
<stdin>:199:48: note: scanning from here
define dso_local <8 x half> @test_vcvtq_f16_s16(<8 x i16> noundef %a) #0 {
                                               ^
<stdin>:206:5: note: possible intended match here
 %vcvt.i = sitofp <8 x i16> %1 to <8 x half>
    ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:119:11: error: CHECK: expected string not found in input
// CHECK: [[VCVT:%.*]] = uitofp <4 x i16> %a to <4 x half>
          ^
<stdin>:213:47: note: scanning from here
define dso_local <4 x half> @test_vcvt_f16_u16(<4 x i16> noundef %a) #0 {
                                              ^
<stdin>:220:5: note: possible intended match here
 %vcvt.i = uitofp <4 x i16> %1 to <4 x half>
    ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:126:11: error: CHECK: expected string not found in input
// CHECK: [[VCVT:%.*]] = uitofp <8 x i16> %a to <8 x half>
          ^
<stdin>:227:48: note: scanning from here
define dso_local <8 x half> @test_vcvtq_f16_u16(<8 x i16> noundef %a) #0 {
                                               ^
<stdin>:234:5: note: possible intended match here
 %vcvt.i = uitofp <8 x i16> %1 to <8 x half>
    ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:133:11: error: CHECK: expected string not found in input
// CHECK: [[VCVT:%.*]] = fptosi <4 x half> %a to <4 x i16>
          ^
<stdin>:241:46: note: scanning from here
define dso_local <4 x i16> @test_vcvt_s16_f16(<4 x half> noundef %a) #0 {
                                             ^
<stdin>:248:5: note: possible intended match here
 %vcvt.i = fptosi <4 x half> %1 to <4 x i16>
    ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:140:11: error: CHECK: expected string not found in input
// CHECK: [[VCVT:%.*]] = fptosi <8 x half> %a to <8 x i16>
          ^
<stdin>:255:47: note: scanning from here
define dso_local <8 x i16> @test_vcvtq_s16_f16(<8 x half> noundef %a) #0 {
                                              ^
<stdin>:262:5: note: possible intended match here
 %vcvt.i = fptosi <8 x half> %1 to <8 x i16>
    ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:147:11: error: CHECK: expected string not found in input
// CHECK: [[VCVT:%.*]] = fptoui <4 x half> %a to <4 x i16>
          ^
<stdin>:269:46: note: scanning from here
define dso_local <4 x i16> @test_vcvt_u16_f16(<4 x half> noundef %a) #0 {
                                             ^
<stdin>:276:5: note: possible intended match here
 %vcvt.i = fptoui <4 x half> %1 to <4 x i16>
    ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:154:11: error: CHECK: expected string not found in input
// CHECK: [[VCVT:%.*]] = fptoui <8 x half> %a to <8 x i16>
          ^
<stdin>:283:47: note: scanning from here
define dso_local <8 x i16> @test_vcvtq_u16_f16(<8 x half> noundef %a) #0 {
                                              ^
<stdin>:290:5: note: possible intended match here
 %vcvt.i = fptoui <8 x half> %1 to <8 x i16>
    ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:161:11: error: CHECK: expected string not found in input
// CHECK: [[VCVT:%.*]] = call <4 x i16> @llvm.arm.neon.vcvtas.v4i16.v4f16(<4 x half> %a)
          ^
<stdin>:297:47: note: scanning from here
define dso_local <4 x i16> @test_vcvta_s16_f16(<4 x half> noundef %a) #0 {
                                              ^
<stdin>:304:12: note: possible intended match here
 %vcvta_s16_f161.i = call <4 x i16> @llvm.arm.neon.vcvtas.v4i16.v4f16(<4 x half> %vcvta_s16_f16.i)
           ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:168:11: error: CHECK: expected string not found in input
// CHECK: [[VCVT:%.*]] = call <4 x i16> @llvm.arm.neon.vcvtau.v4i16.v4f16(<4 x half> %a)
          ^
<stdin>:311:47: note: scanning from here
define dso_local <4 x i16> @test_vcvta_u16_f16(<4 x half> noundef %a) #0 {
                                              ^
<stdin>:318:12: note: possible intended match here
 %vcvta_u16_f161.i = call <4 x i16> @llvm.arm.neon.vcvtau.v4i16.v4f16(<4 x half> %vcvta_u16_f16.i)
           ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:175:11: error: CHECK: expected string not found in input
// CHECK: [[VCVT:%.*]] = call <8 x i16> @llvm.arm.neon.vcvtas.v8i16.v8f16(<8 x half> %a)
          ^
<stdin>:325:48: note: scanning from here
define dso_local <8 x i16> @test_vcvtaq_s16_f16(<8 x half> noundef %a) #0 {
                                               ^
<stdin>:332:13: note: possible intended match here
 %vcvtaq_s16_f161.i = call <8 x i16> @llvm.arm.neon.vcvtas.v8i16.v8f16(<8 x half> %vcvtaq_s16_f16.i)
            ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:182:11: error: CHECK: expected string not found in input
// CHECK: [[VCVT:%.*]] = call <4 x i16> @llvm.arm.neon.vcvtms.v4i16.v4f16(<4 x half> %a)
          ^
<stdin>:339:47: note: scanning from here
define dso_local <4 x i16> @test_vcvtm_s16_f16(<4 x half> noundef %a) #0 {
                                              ^
<stdin>:346:8: note: possible intended match here
 %vcvtm_s16_f161.i = call <4 x i16> @llvm.arm.neon.vcvtms.v4i16.v4f16(<4 x half> %vcvtm_s16_f16.i)
       ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:189:11: error: CHECK: expected string not found in input
// CHECK: [[VCVT:%.*]] = call <8 x i16> @llvm.arm.neon.vcvtms.v8i16.v8f16(<8 x half> %a)
          ^
<stdin>:353:48: note: scanning from here
define dso_local <8 x i16> @test_vcvtmq_s16_f16(<8 x half> noundef %a) #0 {
                                               ^
<stdin>:360:9: note: possible intended match here
 %vcvtmq_s16_f161.i = call <8 x i16> @llvm.arm.neon.vcvtms.v8i16.v8f16(<8 x half> %vcvtmq_s16_f16.i)
        ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:196:11: error: CHECK: expected string not found in input
// CHECK: [[VCVT:%.*]] = call <4 x i16> @llvm.arm.neon.vcvtmu.v4i16.v4f16(<4 x half> %a)
          ^
<stdin>:367:47: note: scanning from here
define dso_local <4 x i16> @test_vcvtm_u16_f16(<4 x half> noundef %a) #0 {
                                              ^
<stdin>:374:8: note: possible intended match here
 %vcvtm_u16_f161.i = call <4 x i16> @llvm.arm.neon.vcvtmu.v4i16.v4f16(<4 x half> %vcvtm_u16_f16.i)
       ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:203:11: error: CHECK: expected string not found in input
// CHECK: [[VCVT:%.*]] = call <8 x i16> @llvm.arm.neon.vcvtmu.v8i16.v8f16(<8 x half> %a)
          ^
<stdin>:381:48: note: scanning from here
define dso_local <8 x i16> @test_vcvtmq_u16_f16(<8 x half> noundef %a) #0 {
                                               ^
<stdin>:388:9: note: possible intended match here
 %vcvtmq_u16_f161.i = call <8 x i16> @llvm.arm.neon.vcvtmu.v8i16.v8f16(<8 x half> %vcvtmq_u16_f16.i)
        ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:210:11: error: CHECK: expected string not found in input
// CHECK: [[VCVT:%.*]] = call <4 x i16> @llvm.arm.neon.vcvtns.v4i16.v4f16(<4 x half> %a)
          ^
<stdin>:395:47: note: scanning from here
define dso_local <4 x i16> @test_vcvtn_s16_f16(<4 x half> noundef %a) #0 {
                                              ^
<stdin>:402:8: note: possible intended match here
 %vcvtn_s16_f161.i = call <4 x i16> @llvm.arm.neon.vcvtns.v4i16.v4f16(<4 x half> %vcvtn_s16_f16.i)
       ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:217:11: error: CHECK: expected string not found in input
// CHECK: [[VCVT:%.*]] = call <8 x i16> @llvm.arm.neon.vcvtns.v8i16.v8f16(<8 x half> %a)
          ^
<stdin>:409:48: note: scanning from here
define dso_local <8 x i16> @test_vcvtnq_s16_f16(<8 x half> noundef %a) #0 {
                                               ^
<stdin>:416:9: note: possible intended match here
 %vcvtnq_s16_f161.i = call <8 x i16> @llvm.arm.neon.vcvtns.v8i16.v8f16(<8 x half> %vcvtnq_s16_f16.i)
        ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:224:11: error: CHECK: expected string not found in input
// CHECK: [[VCVT:%.*]] = call <4 x i16> @llvm.arm.neon.vcvtnu.v4i16.v4f16(<4 x half> %a)
          ^
<stdin>:423:47: note: scanning from here
define dso_local <4 x i16> @test_vcvtn_u16_f16(<4 x half> noundef %a) #0 {
                                              ^
<stdin>:430:8: note: possible intended match here
 %vcvtn_u16_f161.i = call <4 x i16> @llvm.arm.neon.vcvtnu.v4i16.v4f16(<4 x half> %vcvtn_u16_f16.i)
       ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:231:11: error: CHECK: expected string not found in input
// CHECK: [[VCVT:%.*]] = call <8 x i16> @llvm.arm.neon.vcvtnu.v8i16.v8f16(<8 x half> %a)
          ^
<stdin>:437:48: note: scanning from here
define dso_local <8 x i16> @test_vcvtnq_u16_f16(<8 x half> noundef %a) #0 {
                                               ^
<stdin>:444:9: note: possible intended match here
 %vcvtnq_u16_f161.i = call <8 x i16> @llvm.arm.neon.vcvtnu.v8i16.v8f16(<8 x half> %vcvtnq_u16_f16.i)
        ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:238:11: error: CHECK: expected string not found in input
// CHECK: [[VCVT:%.*]] = call <4 x i16> @llvm.arm.neon.vcvtps.v4i16.v4f16(<4 x half> %a)
          ^
<stdin>:451:47: note: scanning from here
define dso_local <4 x i16> @test_vcvtp_s16_f16(<4 x half> noundef %a) #0 {
                                              ^
<stdin>:458:8: note: possible intended match here
 %vcvtp_s16_f161.i = call <4 x i16> @llvm.arm.neon.vcvtps.v4i16.v4f16(<4 x half> %vcvtp_s16_f16.i)
       ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:245:11: error: CHECK: expected string not found in input
// CHECK: [[VCVT:%.*]] = call <8 x i16> @llvm.arm.neon.vcvtps.v8i16.v8f16(<8 x half> %a)
          ^
<stdin>:465:48: note: scanning from here
define dso_local <8 x i16> @test_vcvtpq_s16_f16(<8 x half> noundef %a) #0 {
                                               ^
<stdin>:472:9: note: possible intended match here
 %vcvtpq_s16_f161.i = call <8 x i16> @llvm.arm.neon.vcvtps.v8i16.v8f16(<8 x half> %vcvtpq_s16_f16.i)
        ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:252:11: error: CHECK: expected string not found in input
// CHECK: [[VCVT:%.*]] = call <4 x i16> @llvm.arm.neon.vcvtpu.v4i16.v4f16(<4 x half> %a)
          ^
<stdin>:479:47: note: scanning from here
define dso_local <4 x i16> @test_vcvtp_u16_f16(<4 x half> noundef %a) #0 {
                                              ^
<stdin>:486:8: note: possible intended match here
 %vcvtp_u16_f161.i = call <4 x i16> @llvm.arm.neon.vcvtpu.v4i16.v4f16(<4 x half> %vcvtp_u16_f16.i)
       ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:259:11: error: CHECK: expected string not found in input
// CHECK: [[VCVT:%.*]] = call <8 x i16> @llvm.arm.neon.vcvtpu.v8i16.v8f16(<8 x half> %a)
          ^
<stdin>:493:48: note: scanning from here
define dso_local <8 x i16> @test_vcvtpq_u16_f16(<8 x half> noundef %a) #0 {
                                               ^
<stdin>:500:9: note: possible intended match here
 %vcvtpq_u16_f161.i = call <8 x i16> @llvm.arm.neon.vcvtpu.v8i16.v8f16(<8 x half> %vcvtpq_u16_f16.i)
        ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:281:11: error: CHECK: expected string not found in input
// CHECK: [[RCP:%.*]] = call <4 x half> @llvm.arm.neon.vrecpe.v4f16(<4 x half> %a)
          ^
<stdin>:521:45: note: scanning from here
define dso_local <4 x half> @test_vrecpe_f16(<4 x half> noundef %a) #0 {
                                            ^
<stdin>:528:4: note: possible intended match here
 %vrecpe_v1.i = call <4 x half> @llvm.arm.neon.vrecpe.v4f16(<4 x half> %vrecpe_v.i)
   ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:288:11: error: CHECK: expected string not found in input
// CHECK: [[RCP:%.*]] = call <8 x half> @llvm.arm.neon.vrecpe.v8f16(<8 x half> %a)
          ^
<stdin>:535:46: note: scanning from here
define dso_local <8 x half> @test_vrecpeq_f16(<8 x half> noundef %a) #0 {
                                             ^
<stdin>:542:5: note: possible intended match here
 %vrecpeq_v1.i = call <8 x half> @llvm.arm.neon.vrecpe.v8f16(<8 x half> %vrecpeq_v.i)
    ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:295:11: error: CHECK: expected string not found in input
// CHECK: [[RND:%.*]] = call <4 x half> @llvm.arm.neon.vrintz.v4f16(<4 x half> %a)
          ^
<stdin>:549:43: note: scanning from here
define dso_local <4 x half> @test_vrnd_f16(<4 x half> noundef %a) #0 {
                                          ^
<stdin>:556:8: note: possible intended match here
 %vrnd_v1.i = call <4 x half> @llvm.arm.neon.vrintz.v4f16(<4 x half> %vrnd_v.i)
       ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:302:11: error: CHECK: expected string not found in input
// CHECK: [[RND:%.*]] = call <8 x half> @llvm.arm.neon.vrintz.v8f16(<8 x half> %a)
          ^
<stdin>:564:44: note: scanning from here
define dso_local <8 x half> @test_vrndq_f16(<8 x half> noundef %a) #0 {
                                           ^
<stdin>:571:3: note: possible intended match here
 %vrndq_v1.i = call <8 x half> @llvm.arm.neon.vrintz.v8f16(<8 x half> %vrndq_v.i)
  ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:309:11: error: CHECK: expected string not found in input
// CHECK: [[RND:%.*]] = call <4 x half> @llvm.arm.neon.vrinta.v4f16(<4 x half> %a)
          ^
<stdin>:579:44: note: scanning from here
define dso_local <4 x half> @test_vrnda_f16(<4 x half> noundef %a) #0 {
                                           ^
<stdin>:586:7: note: possible intended match here
 %vrnda_v1.i = call <4 x half> @llvm.arm.neon.vrinta.v4f16(<4 x half> %vrnda_v.i)
      ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:316:11: error: CHECK: expected string not found in input
// CHECK: [[RND:%.*]] = call <8 x half> @llvm.arm.neon.vrinta.v8f16(<8 x half> %a)
          ^
<stdin>:594:45: note: scanning from here
define dso_local <8 x half> @test_vrndaq_f16(<8 x half> noundef %a) #0 {
                                            ^
<stdin>:601:8: note: possible intended match here
 %vrndaq_v1.i = call <8 x half> @llvm.arm.neon.vrinta.v8f16(<8 x half> %vrndaq_v.i)
       ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:323:11: error: CHECK: expected string not found in input
// CHECK: [[RND:%.*]] = call <4 x half> @llvm.arm.neon.vrintm.v4f16(<4 x half> %a)
          ^
<stdin>:609:44: note: scanning from here
define dso_local <4 x half> @test_vrndm_f16(<4 x half> noundef %a) #0 {
                                           ^
<stdin>:616:3: note: possible intended match here
 %vrndm_v1.i = call <4 x half> @llvm.arm.neon.vrintm.v4f16(<4 x half> %vrndm_v.i)
  ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:330:11: error: CHECK: expected string not found in input
// CHECK: [[RND:%.*]] = call <8 x half> @llvm.arm.neon.vrintm.v8f16(<8 x half> %a)
          ^
<stdin>:624:45: note: scanning from here
define dso_local <8 x half> @test_vrndmq_f16(<8 x half> noundef %a) #0 {
                                            ^
<stdin>:631:4: note: possible intended match here
 %vrndmq_v1.i = call <8 x half> @llvm.arm.neon.vrintm.v8f16(<8 x half> %vrndmq_v.i)
   ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:337:11: error: CHECK: expected string not found in input
// CHECK: [[RND:%.*]] = call <4 x half> @llvm.arm.neon.vrintn.v4f16(<4 x half> %a)
          ^
<stdin>:639:44: note: scanning from here
define dso_local <4 x half> @test_vrndn_f16(<4 x half> noundef %a) #0 {
                                           ^
<stdin>:646:3: note: possible intended match here
 %vrndn_v1.i = call <4 x half> @llvm.arm.neon.vrintn.v4f16(<4 x half> %vrndn_v.i)
  ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:344:11: error: CHECK: expected string not found in input
// CHECK: [[RND:%.*]] = call <8 x half> @llvm.arm.neon.vrintn.v8f16(<8 x half> %a)
          ^
<stdin>:654:45: note: scanning from here
define dso_local <8 x half> @test_vrndnq_f16(<8 x half> noundef %a) #0 {
                                            ^
<stdin>:661:4: note: possible intended match here
 %vrndnq_v1.i = call <8 x half> @llvm.arm.neon.vrintn.v8f16(<8 x half> %vrndnq_v.i)
   ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:351:11: error: CHECK: expected string not found in input
// CHECK: [[RND:%.*]] = call <4 x half> @llvm.arm.neon.vrintp.v4f16(<4 x half> %a)
          ^
<stdin>:669:44: note: scanning from here
define dso_local <4 x half> @test_vrndp_f16(<4 x half> noundef %a) #0 {
                                           ^
<stdin>:676:3: note: possible intended match here
 %vrndp_v1.i = call <4 x half> @llvm.arm.neon.vrintp.v4f16(<4 x half> %vrndp_v.i)
  ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:358:11: error: CHECK: expected string not found in input
// CHECK: [[RND:%.*]] = call <8 x half> @llvm.arm.neon.vrintp.v8f16(<8 x half> %a)
          ^
<stdin>:684:45: note: scanning from here
define dso_local <8 x half> @test_vrndpq_f16(<8 x half> noundef %a) #0 {
                                            ^
<stdin>:691:4: note: possible intended match here
 %vrndpq_v1.i = call <8 x half> @llvm.arm.neon.vrintp.v8f16(<8 x half> %vrndpq_v.i)
   ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:365:11: error: CHECK: expected string not found in input
// CHECK: [[RND:%.*]] = call <4 x half> @llvm.arm.neon.vrintx.v4f16(<4 x half> %a)
          ^
<stdin>:699:44: note: scanning from here
define dso_local <4 x half> @test_vrndx_f16(<4 x half> noundef %a) #0 {
                                           ^
<stdin>:706:3: note: possible intended match here
 %vrndx_v1.i = call <4 x half> @llvm.arm.neon.vrintx.v4f16(<4 x half> %vrndx_v.i)
  ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:372:11: error: CHECK: expected string not found in input
// CHECK: [[RND:%.*]] = call <8 x half> @llvm.arm.neon.vrintx.v8f16(<8 x half> %a)
          ^
<stdin>:714:45: note: scanning from here
define dso_local <8 x half> @test_vrndxq_f16(<8 x half> noundef %a) #0 {
                                            ^
<stdin>:721:4: note: possible intended match here
 %vrndxq_v1.i = call <8 x half> @llvm.arm.neon.vrintx.v8f16(<8 x half> %vrndxq_v.i)
   ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:379:11: error: CHECK: expected string not found in input
// CHECK: [[RND:%.*]] = call <4 x half> @llvm.arm.neon.vrsqrte.v4f16(<4 x half> %a)
          ^
<stdin>:729:46: note: scanning from here
define dso_local <4 x half> @test_vrsqrte_f16(<4 x half> noundef %a) #0 {
                                             ^
<stdin>:736:5: note: possible intended match here
 %vrsqrte_v1.i = call <4 x half> @llvm.arm.neon.vrsqrte.v4f16(<4 x half> %vrsqrte_v.i)
    ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:386:11: error: CHECK: expected string not found in input
// CHECK: [[RND:%.*]] = call <8 x half> @llvm.arm.neon.vrsqrte.v8f16(<8 x half> %a)
          ^
<stdin>:743:47: note: scanning from here
define dso_local <8 x half> @test_vrsqrteq_f16(<8 x half> noundef %a) #0 {
                                              ^
<stdin>:750:6: note: possible intended match here
 %vrsqrteq_v1.i = call <8 x half> @llvm.arm.neon.vrsqrte.v8f16(<8 x half> %vrsqrteq_v.i)
     ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:407:11: error: CHECK: expected string not found in input
// CHECK: [[ABD:%.*]] = call <4 x half> @llvm.arm.neon.vabds.v4f16(<4 x half> %a, <4 x half> %b)
          ^
<stdin>:771:43: note: scanning from here
define dso_local <4 x half> @test_vabd_f16(<4 x half> noundef %a, <4 x half> noundef %b) #0 {
                                          ^
<stdin>:782:8: note: possible intended match here
 %vabd_v2.i = call <4 x half> @llvm.arm.neon.vabds.v4f16(<4 x half> %vabd_v.i, <4 x half> %vabd_v1.i)
       ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:414:11: error: CHECK: expected string not found in input
// CHECK: [[ABD:%.*]] = call <8 x half> @llvm.arm.neon.vabds.v8f16(<8 x half> %a, <8 x half> %b)
          ^
<stdin>:790:44: note: scanning from here
define dso_local <8 x half> @test_vabdq_f16(<8 x half> noundef %a, <8 x half> noundef %b) #0 {
                                           ^
<stdin>:801:9: note: possible intended match here
 %vabdq_v2.i = call <8 x half> @llvm.arm.neon.vabds.v8f16(<8 x half> %vabdq_v.i, <8 x half> %vabdq_v1.i)
        ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:421:11: error: CHECK: expected string not found in input
// CHECK: [[ABS:%.*]] = call <4 x i16> @llvm.arm.neon.vacge.v4i16.v4f16(<4 x half> %a, <4 x half> %b)
          ^
<stdin>:809:43: note: scanning from here
define dso_local <4 x i16> @test_vcage_f16(<4 x half> noundef %a, <4 x half> noundef %b) #0 {
                                          ^
<stdin>:820:9: note: possible intended match here
 %vcage_v2.i = call <4 x i16> @llvm.arm.neon.vacge.v4i16.v4f16(<4 x half> %vcage_v.i, <4 x half> %vcage_v1.i)
        ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:428:11: error: CHECK: expected string not found in input
// CHECK: [[ABS:%.*]] = call <8 x i16> @llvm.arm.neon.vacge.v8i16.v8f16(<8 x half> %a, <8 x half> %b)
          ^
<stdin>:827:44: note: scanning from here
define dso_local <8 x i16> @test_vcageq_f16(<8 x half> noundef %a, <8 x half> noundef %b) #0 {
                                           ^
<stdin>:838:10: note: possible intended match here
 %vcageq_v2.i = call <8 x i16> @llvm.arm.neon.vacge.v8i16.v8f16(<8 x half> %vcageq_v.i, <8 x half> %vcageq_v1.i)
         ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:435:11: error: CHECK: expected string not found in input
// CHECK: [[ABS:%.*]] = call <4 x i16> @llvm.arm.neon.vacgt.v4i16.v4f16(<4 x half> %a, <4 x half> %b)
          ^
<stdin>:845:43: note: scanning from here
define dso_local <4 x i16> @test_vcagt_f16(<4 x half> noundef %a, <4 x half> noundef %b) #0 {
                                          ^
<stdin>:856:9: note: possible intended match here
 %vcagt_v2.i = call <4 x i16> @llvm.arm.neon.vacgt.v4i16.v4f16(<4 x half> %vcagt_v.i, <4 x half> %vcagt_v1.i)
        ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:442:11: error: CHECK: expected string not found in input
// CHECK: [[ABS:%.*]] = call <8 x i16> @llvm.arm.neon.vacgt.v8i16.v8f16(<8 x half> %a, <8 x half> %b)
          ^
<stdin>:863:44: note: scanning from here
define dso_local <8 x i16> @test_vcagtq_f16(<8 x half> noundef %a, <8 x half> noundef %b) #0 {
                                           ^
<stdin>:874:10: note: possible intended match here
 %vcagtq_v2.i = call <8 x i16> @llvm.arm.neon.vacgt.v8i16.v8f16(<8 x half> %vcagtq_v.i, <8 x half> %vcagtq_v1.i)
         ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:449:11: error: CHECK: expected string not found in input
// CHECK: [[ABS:%.*]] = call <4 x i16> @llvm.arm.neon.vacge.v4i16.v4f16(<4 x half> %b, <4 x half> %a)
          ^
<stdin>:881:43: note: scanning from here
define dso_local <4 x i16> @test_vcale_f16(<4 x half> noundef %a, <4 x half> noundef %b) #0 {
                                          ^
<stdin>:892:9: note: possible intended match here
 %vcale_v2.i = call <4 x i16> @llvm.arm.neon.vacge.v4i16.v4f16(<4 x half> %vcale_v.i, <4 x half> %vcale_v1.i)
        ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:456:11: error: CHECK: expected string not found in input
// CHECK: [[ABS:%.*]] = call <8 x i16> @llvm.arm.neon.vacge.v8i16.v8f16(<8 x half> %b, <8 x half> %a)
          ^
<stdin>:899:44: note: scanning from here
define dso_local <8 x i16> @test_vcaleq_f16(<8 x half> noundef %a, <8 x half> noundef %b) #0 {
                                           ^
<stdin>:910:10: note: possible intended match here
 %vcaleq_v2.i = call <8 x i16> @llvm.arm.neon.vacge.v8i16.v8f16(<8 x half> %vcaleq_v.i, <8 x half> %vcaleq_v1.i)
         ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:463:11: error: CHECK: expected string not found in input
// CHECK: [[ABS:%.*]] = call <4 x i16> @llvm.arm.neon.vacgt.v4i16.v4f16(<4 x half> %b, <4 x half> %a)
          ^
<stdin>:917:43: note: scanning from here
define dso_local <4 x i16> @test_vcalt_f16(<4 x half> noundef %a, <4 x half> noundef %b) #0 {
                                          ^
<stdin>:928:9: note: possible intended match here
 %vcalt_v2.i = call <4 x i16> @llvm.arm.neon.vacgt.v4i16.v4f16(<4 x half> %vcalt_v.i, <4 x half> %vcalt_v1.i)
        ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:470:11: error: CHECK: expected string not found in input
// CHECK: [[ABS:%.*]] = call <8 x i16> @llvm.arm.neon.vacgt.v8i16.v8f16(<8 x half> %b, <8 x half> %a)
          ^
<stdin>:935:44: note: scanning from here
define dso_local <8 x i16> @test_vcaltq_f16(<8 x half> noundef %a, <8 x half> noundef %b) #0 {
                                           ^
<stdin>:946:10: note: possible intended match here
 %vcaltq_v2.i = call <8 x i16> @llvm.arm.neon.vacgt.v8i16.v8f16(<8 x half> %vcaltq_v.i, <8 x half> %vcaltq_v1.i)
         ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:558:11: error: CHECK: expected string not found in input
// CHECK: ret <4 x half> [[CVT]]
          ^
<stdin>:1040:92: note: scanning from here
 %vcvt_n1 = call <4 x half> @llvm.arm.neon.vcvtfxs2fp.v4f16.v4i16(<4 x i16> %vcvt_n, i32 2)
                                                                                           ^
<stdin>:1040:92: note: with "CVT" equal to "%vcvt_n1"
 %vcvt_n1 = call <4 x half> @llvm.arm.neon.vcvtfxs2fp.v4f16.v4i16(<4 x i16> %vcvt_n, i32 2)
                                                                                           ^
<stdin>:1043:2: note: possible intended match here
 ret <4 x half> %1
 ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:565:11: error: CHECK: expected string not found in input
// CHECK: ret <8 x half> [[CVT]]
          ^
<stdin>:1057:92: note: scanning from here
 %vcvt_n1 = call <8 x half> @llvm.arm.neon.vcvtfxs2fp.v8f16.v8i16(<8 x i16> %vcvt_n, i32 2)
                                                                                           ^
<stdin>:1057:92: note: with "CVT" equal to "%vcvt_n1"
 %vcvt_n1 = call <8 x half> @llvm.arm.neon.vcvtfxs2fp.v8f16.v8i16(<8 x i16> %vcvt_n, i32 2)
                                                                                           ^
<stdin>:1060:2: note: possible intended match here
 ret <8 x half> %1
 ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:572:11: error: CHECK: expected string not found in input
// CHECK: ret <4 x half> [[CVT]]
          ^
<stdin>:1074:92: note: scanning from here
 %vcvt_n1 = call <4 x half> @llvm.arm.neon.vcvtfxu2fp.v4f16.v4i16(<4 x i16> %vcvt_n, i32 2)
                                                                                           ^
<stdin>:1074:92: note: with "CVT" equal to "%vcvt_n1"
 %vcvt_n1 = call <4 x half> @llvm.arm.neon.vcvtfxu2fp.v4f16.v4i16(<4 x i16> %vcvt_n, i32 2)
                                                                                           ^
<stdin>:1077:2: note: possible intended match here
 ret <4 x half> %1
 ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:579:11: error: CHECK: expected string not found in input
// CHECK: ret <8 x half> [[CVT]]
          ^
<stdin>:1091:92: note: scanning from here
 %vcvt_n1 = call <8 x half> @llvm.arm.neon.vcvtfxu2fp.v8f16.v8i16(<8 x i16> %vcvt_n, i32 2)
                                                                                           ^
<stdin>:1091:92: note: with "CVT" equal to "%vcvt_n1"
 %vcvt_n1 = call <8 x half> @llvm.arm.neon.vcvtfxu2fp.v8f16.v8i16(<8 x i16> %vcvt_n, i32 2)
                                                                                           ^
<stdin>:1094:2: note: possible intended match here
 ret <8 x half> %1
 ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:586:11: error: CHECK: expected string not found in input
// CHECK: ret <4 x i16> [[CVT]]
          ^
<stdin>:1108:92: note: scanning from here
 %vcvt_n1 = call <4 x i16> @llvm.arm.neon.vcvtfp2fxs.v4i16.v4f16(<4 x half> %vcvt_n, i32 2)
                                                                                           ^
<stdin>:1108:92: note: with "CVT" equal to "%vcvt_n1"
 %vcvt_n1 = call <4 x i16> @llvm.arm.neon.vcvtfp2fxs.v4i16.v4f16(<4 x half> %vcvt_n, i32 2)
                                                                                           ^
<stdin>:1111:2: note: possible intended match here
 ret <4 x i16> %1
 ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:593:11: error: CHECK: expected string not found in input
// CHECK: ret <8 x i16> [[CVT]]
          ^
<stdin>:1125:92: note: scanning from here
 %vcvt_n1 = call <8 x i16> @llvm.arm.neon.vcvtfp2fxs.v8i16.v8f16(<8 x half> %vcvt_n, i32 2)
                                                                                           ^
<stdin>:1125:92: note: with "CVT" equal to "%vcvt_n1"
 %vcvt_n1 = call <8 x i16> @llvm.arm.neon.vcvtfp2fxs.v8i16.v8f16(<8 x half> %vcvt_n, i32 2)
                                                                                           ^
<stdin>:1128:2: note: possible intended match here
 ret <8 x i16> %1
 ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:600:11: error: CHECK: expected string not found in input
// CHECK: ret <4 x i16> [[CVT]]
          ^
<stdin>:1142:92: note: scanning from here
 %vcvt_n1 = call <4 x i16> @llvm.arm.neon.vcvtfp2fxu.v4i16.v4f16(<4 x half> %vcvt_n, i32 2)
                                                                                           ^
<stdin>:1142:92: note: with "CVT" equal to "%vcvt_n1"
 %vcvt_n1 = call <4 x i16> @llvm.arm.neon.vcvtfp2fxu.v4i16.v4f16(<4 x half> %vcvt_n, i32 2)
                                                                                           ^
<stdin>:1145:2: note: possible intended match here
 ret <4 x i16> %1
 ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:607:11: error: CHECK: expected string not found in input
// CHECK: ret <8 x i16> [[CVT]]
          ^
<stdin>:1159:92: note: scanning from here
 %vcvt_n1 = call <8 x i16> @llvm.arm.neon.vcvtfp2fxu.v8i16.v8f16(<8 x half> %vcvt_n, i32 2)
                                                                                           ^
<stdin>:1159:92: note: with "CVT" equal to "%vcvt_n1"
 %vcvt_n1 = call <8 x i16> @llvm.arm.neon.vcvtfp2fxu.v8i16.v8f16(<8 x half> %vcvt_n, i32 2)
                                                                                           ^
<stdin>:1162:2: note: possible intended match here
 ret <8 x i16> %1
 ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:613:11: error: CHECK: expected string not found in input
// CHECK: [[MAX:%.*]] = call <4 x half> @llvm.arm.neon.vmaxs.v4f16(<4 x half> %a, <4 x half> %b)
          ^
<stdin>:1169:43: note: scanning from here
define dso_local <4 x half> @test_vmax_f16(<4 x half> noundef %a, <4 x half> noundef %b) #0 {
                                          ^
<stdin>:1180:8: note: possible intended match here
 %vmax_v2.i = call <4 x half> @llvm.arm.neon.vmaxs.v4f16(<4 x half> %vmax_v.i, <4 x half> %vmax_v1.i)
       ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:620:11: error: CHECK: expected string not found in input
// CHECK: [[MAX:%.*]] = call <8 x half> @llvm.arm.neon.vmaxs.v8f16(<8 x half> %a, <8 x half> %b)
          ^
<stdin>:1188:44: note: scanning from here
define dso_local <8 x half> @test_vmaxq_f16(<8 x half> noundef %a, <8 x half> noundef %b) #0 {
                                           ^
<stdin>:1199:9: note: possible intended match here
 %vmaxq_v2.i = call <8 x half> @llvm.arm.neon.vmaxs.v8f16(<8 x half> %vmaxq_v.i, <8 x half> %vmaxq_v1.i)
        ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:627:11: error: CHECK: expected string not found in input
// CHECK: [[MAX:%.*]] = call <4 x half> @llvm.arm.neon.vmaxnm.v4f16(<4 x half> %a, <4 x half> %b)
          ^
<stdin>:1207:45: note: scanning from here
define dso_local <4 x half> @test_vmaxnm_f16(<4 x half> noundef %a, <4 x half> noundef %b) #0 {
                                            ^
<stdin>:1218:10: note: possible intended match here
 %vmaxnm_v2.i = call <4 x half> @llvm.arm.neon.vmaxnm.v4f16(<4 x half> %vmaxnm_v.i, <4 x half> %vmaxnm_v1.i)
         ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:634:11: error: CHECK: expected string not found in input
// CHECK: [[MAX:%.*]] = call <8 x half> @llvm.arm.neon.vmaxnm.v8f16(<8 x half> %a, <8 x half> %b)
          ^
<stdin>:1226:46: note: scanning from here
define dso_local <8 x half> @test_vmaxnmq_f16(<8 x half> noundef %a, <8 x half> noundef %b) #0 {
                                             ^
<stdin>:1237:12: note: possible intended match here
 %vmaxnmq_v2.i = call <8 x half> @llvm.arm.neon.vmaxnm.v8f16(<8 x half> %vmaxnmq_v.i, <8 x half> %vmaxnmq_v1.i)
           ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:641:11: error: CHECK: expected string not found in input
// CHECK: [[MIN:%.*]] = call <4 x half> @llvm.arm.neon.vmins.v4f16(<4 x half> %a, <4 x half> %b)
          ^
<stdin>:1245:43: note: scanning from here
define dso_local <4 x half> @test_vmin_f16(<4 x half> noundef %a, <4 x half> noundef %b) #0 {
                                          ^
<stdin>:1256:8: note: possible intended match here
 %vmin_v2.i = call <4 x half> @llvm.arm.neon.vmins.v4f16(<4 x half> %vmin_v.i, <4 x half> %vmin_v1.i)
       ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:648:11: error: CHECK: expected string not found in input
// CHECK: [[MIN:%.*]] = call <8 x half> @llvm.arm.neon.vmins.v8f16(<8 x half> %a, <8 x half> %b)
          ^
<stdin>:1264:44: note: scanning from here
define dso_local <8 x half> @test_vminq_f16(<8 x half> noundef %a, <8 x half> noundef %b) #0 {
                                           ^
<stdin>:1275:9: note: possible intended match here
 %vminq_v2.i = call <8 x half> @llvm.arm.neon.vmins.v8f16(<8 x half> %vminq_v.i, <8 x half> %vminq_v1.i)
        ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:655:11: error: CHECK: expected string not found in input
// CHECK: [[MIN:%.*]] = call <4 x half> @llvm.arm.neon.vminnm.v4f16(<4 x half> %a, <4 x half> %b)
          ^
<stdin>:1283:45: note: scanning from here
define dso_local <4 x half> @test_vminnm_f16(<4 x half> noundef %a, <4 x half> noundef %b) #0 {
                                            ^
<stdin>:1294:10: note: possible intended match here
 %vminnm_v2.i = call <4 x half> @llvm.arm.neon.vminnm.v4f16(<4 x half> %vminnm_v.i, <4 x half> %vminnm_v1.i)
         ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:662:11: error: CHECK: expected string not found in input
// CHECK: [[MIN:%.*]] = call <8 x half> @llvm.arm.neon.vminnm.v8f16(<8 x half> %a, <8 x half> %b)
          ^
<stdin>:1302:46: note: scanning from here
define dso_local <8 x half> @test_vminnmq_f16(<8 x half> noundef %a, <8 x half> noundef %b) #0 {
                                             ^
<stdin>:1313:12: note: possible intended match here
 %vminnmq_v2.i = call <8 x half> @llvm.arm.neon.vminnm.v8f16(<8 x half> %vminnmq_v.i, <8 x half> %vminnmq_v1.i)
           ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:683:11: error: CHECK: expected string not found in input
// CHECK: [[ADD:%.*]] = call <4 x half> @llvm.arm.neon.vpadd.v4f16(<4 x half> %a, <4 x half> %b)
          ^
<stdin>:1335:44: note: scanning from here
define dso_local <4 x half> @test_vpadd_f16(<4 x half> noundef %a, <4 x half> noundef %b) #0 {
                                           ^
<stdin>:1346:9: note: possible intended match here
 %vpadd_v2.i = call <4 x half> @llvm.arm.neon.vpadd.v4f16(<4 x half> %vpadd_v.i, <4 x half> %vpadd_v1.i)
        ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:690:11: error: CHECK: expected string not found in input
// CHECK: [[MAX:%.*]] = call <4 x half> @llvm.arm.neon.vpmaxs.v4f16(<4 x half> %a, <4 x half> %b)
          ^
<stdin>:1354:44: note: scanning from here
define dso_local <4 x half> @test_vpmax_f16(<4 x half> noundef %a, <4 x half> noundef %b) #0 {
                                           ^
<stdin>:1365:9: note: possible intended match here
 %vpmax_v2.i = call <4 x half> @llvm.arm.neon.vpmaxs.v4f16(<4 x half> %vpmax_v.i, <4 x half> %vpmax_v1.i)
        ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:697:11: error: CHECK: expected string not found in input
// CHECK: [[MIN:%.*]] = call <4 x half> @llvm.arm.neon.vpmins.v4f16(<4 x half> %a, <4 x half> %b)
          ^
<stdin>:1373:44: note: scanning from here
define dso_local <4 x half> @test_vpmin_f16(<4 x half> noundef %a, <4 x half> noundef %b) #0 {
                                           ^
<stdin>:1384:9: note: possible intended match here
 %vpmin_v2.i = call <4 x half> @llvm.arm.neon.vpmins.v4f16(<4 x half> %vpmin_v.i, <4 x half> %vpmin_v1.i)
        ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:704:11: error: CHECK: expected string not found in input
// CHECK: [[MIN:%.*]] = call <4 x half> @llvm.arm.neon.vrecps.v4f16(<4 x half> %a, <4 x half> %b)
          ^
<stdin>:1392:45: note: scanning from here
define dso_local <4 x half> @test_vrecps_f16(<4 x half> noundef %a, <4 x half> noundef %b) #0 {
                                            ^
<stdin>:1403:10: note: possible intended match here
 %vrecps_v2.i = call <4 x half> @llvm.arm.neon.vrecps.v4f16(<4 x half> %vrecps_v.i, <4 x half> %vrecps_v1.i)
         ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:711:11: error: CHECK: expected string not found in input
// CHECK: [[MIN:%.*]] = call <8 x half> @llvm.arm.neon.vrecps.v8f16(<8 x half> %a, <8 x half> %b)
          ^
<stdin>:1411:46: note: scanning from here
define dso_local <8 x half> @test_vrecpsq_f16(<8 x half> noundef %a, <8 x half> noundef %b) #0 {
                                             ^
<stdin>:1422:12: note: possible intended match here
 %vrecpsq_v2.i = call <8 x half> @llvm.arm.neon.vrecps.v8f16(<8 x half> %vrecpsq_v.i, <8 x half> %vrecpsq_v1.i)
           ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:718:11: error: CHECK: expected string not found in input
// CHECK: [[MIN:%.*]] = call <4 x half> @llvm.arm.neon.vrsqrts.v4f16(<4 x half> %a, <4 x half> %b)
          ^
<stdin>:1430:46: note: scanning from here
define dso_local <4 x half> @test_vrsqrts_f16(<4 x half> noundef %a, <4 x half> noundef %b) #0 {
                                             ^
<stdin>:1441:12: note: possible intended match here
 %vrsqrts_v2.i = call <4 x half> @llvm.arm.neon.vrsqrts.v4f16(<4 x half> %vrsqrts_v.i, <4 x half> %vrsqrts_v1.i)
           ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:725:11: error: CHECK: expected string not found in input
// CHECK: [[MIN:%.*]] = call <8 x half> @llvm.arm.neon.vrsqrts.v8f16(<8 x half> %a, <8 x half> %b)
          ^
<stdin>:1449:47: note: scanning from here
define dso_local <8 x half> @test_vrsqrtsq_f16(<8 x half> noundef %a, <8 x half> noundef %b) #0 {
                                              ^
<stdin>:1460:14: note: possible intended match here
 %vrsqrtsq_v2.i = call <8 x half> @llvm.arm.neon.vrsqrts.v8f16(<8 x half> %vrsqrtsq_v.i, <8 x half> %vrsqrtsq_v1.i)
             ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:746:11: error: CHECK: expected string not found in input
// CHECK: [[ADD:%.*]] = call <4 x half> @llvm.fma.v4f16(<4 x half> %b, <4 x half> %c, <4 x half> %a)
          ^
<stdin>:1482:43: note: scanning from here
define dso_local <4 x half> @test_vfma_f16(<4 x half> noundef %a, <4 x half> noundef %b, <4 x half> noundef %c) #0 {
                                          ^
<stdin>:1497:2: note: possible intended match here
 %6 = call <4 x half> @llvm.fma.v4f16(<4 x half> %4, <4 x half> %5, <4 x half> %3)
 ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:753:11: error: CHECK: expected string not found in input
// CHECK: [[ADD:%.*]] = call <8 x half> @llvm.fma.v8f16(<8 x half> %b, <8 x half> %c, <8 x half> %a)
          ^
<stdin>:1504:44: note: scanning from here
define dso_local <8 x half> @test_vfmaq_f16(<8 x half> noundef %a, <8 x half> noundef %b, <8 x half> noundef %c) #0 {
                                           ^
<stdin>:1519:2: note: possible intended match here
 %6 = call <8 x half> @llvm.fma.v8f16(<8 x half> %4, <8 x half> %5, <8 x half> %3)
 ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:761:11: error: CHECK: expected string not found in input
// CHECK: [[ADD:%.*]] = call <4 x half> @llvm.fma.v4f16(<4 x half> [[SUB]], <4 x half> %c, <4 x half> %a)
          ^
<stdin>:1532:30: note: scanning from here
 %fneg.i = fneg <4 x half> %b
                             ^
<stdin>:1532:30: note: with "SUB" equal to "%fneg\\.i"
 %fneg.i = fneg <4 x half> %b
                             ^
<stdin>:1542:2: note: possible intended match here
 %6 = call <4 x half> @llvm.fma.v4f16(<4 x half> %4, <4 x half> %5, <4 x half> %3)
 ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:769:11: error: CHECK: expected string not found in input
// CHECK: [[ADD:%.*]] = call <8 x half> @llvm.fma.v8f16(<8 x half> [[SUB]], <8 x half> %c, <8 x half> %a)
          ^
<stdin>:1555:30: note: scanning from here
 %fneg.i = fneg <8 x half> %b
                             ^
<stdin>:1555:30: note: with "SUB" equal to "%fneg\\.i"
 %fneg.i = fneg <8 x half> %b
                             ^
<stdin>:1565:2: note: possible intended match here
 %6 = call <8 x half> @llvm.fma.v8f16(<8 x half> %4, <8 x half> %5, <8 x half> %3)
 ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:776:11: error: CHECK: expected string not found in input
// CHECK: [[TMP0:%.*]] = bitcast <4 x half> [[B:%.*]] to <8 x i8>
          ^
<stdin>:1572:48: note: scanning from here
define dso_local <4 x half> @test_vmul_lane_f16(<4 x half> noundef %a, <4 x half> noundef %b) #0 {
                                               ^
<stdin>:1578:2: note: possible intended match here
 %1 = bitcast <8 x i8> %0 to <4 x half>
 ^
/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c:786:11: error: CHECK: expected string not found in input
// CHECK: [[TMP0:%.*]] = bitcast <4 x half> [[B:%.*]] to <8 x i8>
          ^
<stdin>:1587:49: note: scanning from here
define dso_local <8 x half> @test_vmulq_lane_f16(<8 x half> noundef %a, <4 x half> noundef %b) #0 {
                                                ^
<stdin>:1593:2: note: possible intended match here
 %1 = bitcast <8 x i8> %0 to <4 x half>
 ^

Input file: <stdin>
Check file: /Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c

-dump-input=help explains the following input dump.

Input was:
<<<<<<
             1: ; ModuleID = '<stdin>' 
             2: source_filename = "/Users/thakis/src/llvm-project/clang/test/CodeGen/arm-v8.2a-neon-intrinsics.c" 
             3: target datalayout = "e-m:e-p:32:32-Fi8-f64:32:64-v64:32:64-v128:32:128-a:0:32-n32-S32" 
             4: target triple = "armv8.2a-unknown-linux-gnu" 
             5:  
             6: ; Function Attrs: noinline nounwind 
             7: define dso_local <4 x half> @test_vabs_f16(<4 x half> noundef %a) #0 { 
check:11'0                                                X~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
             8: entry: 
check:11'0      ~~~~~~~
             9:  %__p0.addr.i = alloca <4 x half>, align 8 
check:11'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            10:  %ref.tmp.i = alloca <8 x i8>, align 8 
check:11'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            11:  store <4 x half> %a, ptr %__p0.addr.i, align 8 
check:11'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            12:  %0 = load <8 x i8>, ptr %__p0.addr.i, align 8 
check:11'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            13:  %vabs.i = bitcast <8 x i8> %0 to <4 x half> 
check:11'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            14:  %vabs1.i = call <4 x half> @llvm.fabs.v4f16(<4 x half> %vabs.i) 
check:11'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:11'1           ?                                                            possible intended match
            15:  store <4 x half> %vabs1.i, ptr %ref.tmp.i, align 8 
check:11'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            16:  %1 = load <4 x half>, ptr %ref.tmp.i, align 8 
check:11'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            17:  ret <4 x half> %1 
check:11'0      ~~~~~~~~~~~~~~~~~~~
            18: } 
check:11'0      ~~
            19:  
check:11'0      ~
            20: ; Function Attrs: noinline nounwind 
check:11'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            21: define dso_local <8 x half> @test_vabsq_f16(<8 x half> noundef %a) #0 { 
check:11'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:18'0                                                 X~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
            22: entry: 
check:18'0      ~~~~~~~
            23:  %__p0.addr.i = alloca <8 x half>, align 16 
check:18'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            24:  %ref.tmp.i = alloca <16 x i8>, align 16 
check:18'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            25:  store <8 x half> %a, ptr %__p0.addr.i, align 16 
check:18'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            26:  %0 = load <16 x i8>, ptr %__p0.addr.i, align 16 
check:18'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            27:  %vabs.i = bitcast <16 x i8> %0 to <8 x half> 
check:18'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            28:  %vabs1.i = call <8 x half> @llvm.fabs.v8f16(<8 x half> %vabs.i) 
check:18'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:18'1           ?                                                            possible intended match
            29:  store <8 x half> %vabs1.i, ptr %ref.tmp.i, align 16 
check:18'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            30:  %1 = load <8 x half>, ptr %ref.tmp.i, align 16 
check:18'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            31:  ret <8 x half> %1 
check:18'0      ~~~~~~~~~~~~~~~~~~~
            32: } 
check:18'0      ~~
            33:  
check:18'0      ~
            34: ; Function Attrs: noinline nounwind 
check:18'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            35: define dso_local <4 x i16> @test_vceqz_f16(<4 x half> noundef %a) #0 { 
check:18'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:25'0                                                X~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
            36: entry: 
check:25'0      ~~~~~~~
            37:  %__p0.addr.i = alloca <4 x half>, align 8 
check:25'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            38:  %ref.tmp.i = alloca <8 x i8>, align 8 
check:25'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            39:  store <4 x half> %a, ptr %__p0.addr.i, align 8 
check:25'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            40:  %0 = load <8 x i8>, ptr %__p0.addr.i, align 8 
check:25'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            41:  %1 = bitcast <8 x i8> %0 to <4 x half> 
check:25'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            42:  %2 = fcmp oeq <4 x half> %1, zeroinitializer 
check:25'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:25'1       ?                                             possible intended match
            43:  %vceqz.i = sext <4 x i1> %2 to <4 x i16> 
check:25'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            44:  store <4 x i16> %vceqz.i, ptr %ref.tmp.i, align 8 
check:25'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            45:  %3 = load <4 x i16>, ptr %ref.tmp.i, align 8 
check:25'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            46:  ret <4 x i16> %3 
check:25'0      ~~~~~~~~~~~~~~~~~~
            47: } 
check:25'0      ~~
            48:  
check:25'0      ~
            49: ; Function Attrs: noinline nounwind 
check:25'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            50: define dso_local <8 x i16> @test_vceqzq_f16(<8 x half> noundef %a) #0 { 
check:25'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:33'0                                                 X~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
            51: entry: 
check:33'0      ~~~~~~~
            52:  %__p0.addr.i = alloca <8 x half>, align 16 
check:33'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            53:  %ref.tmp.i = alloca <16 x i8>, align 16 
check:33'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            54:  store <8 x half> %a, ptr %__p0.addr.i, align 16 
check:33'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            55:  %0 = load <16 x i8>, ptr %__p0.addr.i, align 16 
check:33'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            56:  %1 = bitcast <16 x i8> %0 to <8 x half> 
check:33'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            57:  %2 = fcmp oeq <8 x half> %1, zeroinitializer 
check:33'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:33'1       ?                                             possible intended match
            58:  %vceqz.i = sext <8 x i1> %2 to <8 x i16> 
check:33'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            59:  store <8 x i16> %vceqz.i, ptr %ref.tmp.i, align 16 
check:33'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            60:  %3 = load <8 x i16>, ptr %ref.tmp.i, align 16 
check:33'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            61:  ret <8 x i16> %3 
check:33'0      ~~~~~~~~~~~~~~~~~~
            62: } 
check:33'0      ~~
            63:  
check:33'0      ~
            64: ; Function Attrs: noinline nounwind 
check:33'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            65: define dso_local <4 x i16> @test_vcgez_f16(<4 x half> noundef %a) #0 { 
check:33'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:41'0                                                X~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
            66: entry: 
check:41'0      ~~~~~~~
            67:  %__p0.addr.i = alloca <4 x half>, align 8 
check:41'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            68:  %ref.tmp.i = alloca <8 x i8>, align 8 
check:41'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            69:  store <4 x half> %a, ptr %__p0.addr.i, align 8 
check:41'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            70:  %0 = load <8 x i8>, ptr %__p0.addr.i, align 8 
check:41'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            71:  %1 = bitcast <8 x i8> %0 to <4 x half> 
check:41'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            72:  %2 = fcmp oge <4 x half> %1, zeroinitializer 
check:41'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:41'1       ?                                             possible intended match
            73:  %vcgez.i = sext <4 x i1> %2 to <4 x i16> 
check:41'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            74:  store <4 x i16> %vcgez.i, ptr %ref.tmp.i, align 8 
check:41'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            75:  %3 = load <4 x i16>, ptr %ref.tmp.i, align 8 
check:41'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            76:  ret <4 x i16> %3 
check:41'0      ~~~~~~~~~~~~~~~~~~
            77: } 
check:41'0      ~~
            78:  
check:41'0      ~
            79: ; Function Attrs: noinline nounwind 
check:41'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            80: define dso_local <8 x i16> @test_vcgezq_f16(<8 x half> noundef %a) #0 { 
check:41'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:49'0                                                 X~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
            81: entry: 
check:49'0      ~~~~~~~
            82:  %__p0.addr.i = alloca <8 x half>, align 16 
check:49'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            83:  %ref.tmp.i = alloca <16 x i8>, align 16 
check:49'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            84:  store <8 x half> %a, ptr %__p0.addr.i, align 16 
check:49'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            85:  %0 = load <16 x i8>, ptr %__p0.addr.i, align 16 
check:49'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            86:  %1 = bitcast <16 x i8> %0 to <8 x half> 
check:49'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            87:  %2 = fcmp oge <8 x half> %1, zeroinitializer 
check:49'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:49'1       ?                                             possible intended match
            88:  %vcgez.i = sext <8 x i1> %2 to <8 x i16> 
check:49'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            89:  store <8 x i16> %vcgez.i, ptr %ref.tmp.i, align 16 
check:49'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            90:  %3 = load <8 x i16>, ptr %ref.tmp.i, align 16 
check:49'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            91:  ret <8 x i16> %3 
check:49'0      ~~~~~~~~~~~~~~~~~~
            92: } 
check:49'0      ~~
            93:  
check:49'0      ~
            94: ; Function Attrs: noinline nounwind 
check:49'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            95: define dso_local <4 x i16> @test_vcgtz_f16(<4 x half> noundef %a) #0 { 
check:49'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:57'0                                                X~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
            96: entry: 
check:57'0      ~~~~~~~
            97:  %__p0.addr.i = alloca <4 x half>, align 8 
check:57'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            98:  %ref.tmp.i = alloca <8 x i8>, align 8 
check:57'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
            99:  store <4 x half> %a, ptr %__p0.addr.i, align 8 
check:57'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           100:  %0 = load <8 x i8>, ptr %__p0.addr.i, align 8 
check:57'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           101:  %1 = bitcast <8 x i8> %0 to <4 x half> 
check:57'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           102:  %2 = fcmp ogt <4 x half> %1, zeroinitializer 
check:57'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:57'1       ?                                             possible intended match
           103:  %vcgtz.i = sext <4 x i1> %2 to <4 x i16> 
check:57'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           104:  store <4 x i16> %vcgtz.i, ptr %ref.tmp.i, align 8 
check:57'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           105:  %3 = load <4 x i16>, ptr %ref.tmp.i, align 8 
check:57'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           106:  ret <4 x i16> %3 
check:57'0      ~~~~~~~~~~~~~~~~~~
           107: } 
check:57'0      ~~
           108:  
check:57'0      ~
           109: ; Function Attrs: noinline nounwind 
check:57'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           110: define dso_local <8 x i16> @test_vcgtzq_f16(<8 x half> noundef %a) #0 { 
check:57'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:65'0                                                 X~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           111: entry: 
check:65'0      ~~~~~~~
           112:  %__p0.addr.i = alloca <8 x half>, align 16 
check:65'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           113:  %ref.tmp.i = alloca <16 x i8>, align 16 
check:65'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           114:  store <8 x half> %a, ptr %__p0.addr.i, align 16 
check:65'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           115:  %0 = load <16 x i8>, ptr %__p0.addr.i, align 16 
check:65'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           116:  %1 = bitcast <16 x i8> %0 to <8 x half> 
check:65'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           117:  %2 = fcmp ogt <8 x half> %1, zeroinitializer 
check:65'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:65'1       ?                                             possible intended match
           118:  %vcgtz.i = sext <8 x i1> %2 to <8 x i16> 
check:65'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           119:  store <8 x i16> %vcgtz.i, ptr %ref.tmp.i, align 16 
check:65'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           120:  %3 = load <8 x i16>, ptr %ref.tmp.i, align 16 
check:65'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           121:  ret <8 x i16> %3 
check:65'0      ~~~~~~~~~~~~~~~~~~
           122: } 
check:65'0      ~~
           123:  
check:65'0      ~
           124: ; Function Attrs: noinline nounwind 
check:65'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           125: define dso_local <4 x i16> @test_vclez_f16(<4 x half> noundef %a) #0 { 
check:65'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:73'0                                                X~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           126: entry: 
check:73'0      ~~~~~~~
           127:  %__p0.addr.i = alloca <4 x half>, align 8 
check:73'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           128:  %ref.tmp.i = alloca <8 x i8>, align 8 
check:73'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           129:  store <4 x half> %a, ptr %__p0.addr.i, align 8 
check:73'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           130:  %0 = load <8 x i8>, ptr %__p0.addr.i, align 8 
check:73'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           131:  %1 = bitcast <8 x i8> %0 to <4 x half> 
check:73'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           132:  %2 = fcmp ole <4 x half> %1, zeroinitializer 
check:73'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:73'1       ?                                             possible intended match
           133:  %vclez.i = sext <4 x i1> %2 to <4 x i16> 
check:73'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           134:  store <4 x i16> %vclez.i, ptr %ref.tmp.i, align 8 
check:73'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           135:  %3 = load <4 x i16>, ptr %ref.tmp.i, align 8 
check:73'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           136:  ret <4 x i16> %3 
check:73'0      ~~~~~~~~~~~~~~~~~~
           137: } 
check:73'0      ~~
           138:  
check:73'0      ~
           139: ; Function Attrs: noinline nounwind 
check:73'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           140: define dso_local <8 x i16> @test_vclezq_f16(<8 x half> noundef %a) #0 { 
check:73'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:81'0                                                 X~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           141: entry: 
check:81'0      ~~~~~~~
           142:  %__p0.addr.i = alloca <8 x half>, align 16 
check:81'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           143:  %ref.tmp.i = alloca <16 x i8>, align 16 
check:81'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           144:  store <8 x half> %a, ptr %__p0.addr.i, align 16 
check:81'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           145:  %0 = load <16 x i8>, ptr %__p0.addr.i, align 16 
check:81'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           146:  %1 = bitcast <16 x i8> %0 to <8 x half> 
check:81'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           147:  %2 = fcmp ole <8 x half> %1, zeroinitializer 
check:81'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:81'1       ?                                             possible intended match
           148:  %vclez.i = sext <8 x i1> %2 to <8 x i16> 
check:81'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           149:  store <8 x i16> %vclez.i, ptr %ref.tmp.i, align 16 
check:81'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           150:  %3 = load <8 x i16>, ptr %ref.tmp.i, align 16 
check:81'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           151:  ret <8 x i16> %3 
check:81'0      ~~~~~~~~~~~~~~~~~~
           152: } 
check:81'0      ~~
           153:  
check:81'0      ~
           154: ; Function Attrs: noinline nounwind 
check:81'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           155: define dso_local <4 x i16> @test_vcltz_f16(<4 x half> noundef %a) #0 { 
check:81'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:89'0                                                X~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           156: entry: 
check:89'0      ~~~~~~~
           157:  %__p0.addr.i = alloca <4 x half>, align 8 
check:89'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           158:  %ref.tmp.i = alloca <8 x i8>, align 8 
check:89'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           159:  store <4 x half> %a, ptr %__p0.addr.i, align 8 
check:89'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           160:  %0 = load <8 x i8>, ptr %__p0.addr.i, align 8 
check:89'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           161:  %1 = bitcast <8 x i8> %0 to <4 x half> 
check:89'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           162:  %2 = fcmp olt <4 x half> %1, zeroinitializer 
check:89'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:89'1       ?                                             possible intended match
           163:  %vcltz.i = sext <4 x i1> %2 to <4 x i16> 
check:89'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           164:  store <4 x i16> %vcltz.i, ptr %ref.tmp.i, align 8 
check:89'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           165:  %3 = load <4 x i16>, ptr %ref.tmp.i, align 8 
check:89'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           166:  ret <4 x i16> %3 
check:89'0      ~~~~~~~~~~~~~~~~~~
           167: } 
check:89'0      ~~
           168:  
check:89'0      ~
           169: ; Function Attrs: noinline nounwind 
check:89'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           170: define dso_local <8 x i16> @test_vcltzq_f16(<8 x half> noundef %a) #0 { 
check:89'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:97'0                                                 X~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           171: entry: 
check:97'0      ~~~~~~~
           172:  %__p0.addr.i = alloca <8 x half>, align 16 
check:97'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           173:  %ref.tmp.i = alloca <16 x i8>, align 16 
check:97'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           174:  store <8 x half> %a, ptr %__p0.addr.i, align 16 
check:97'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           175:  %0 = load <16 x i8>, ptr %__p0.addr.i, align 16 
check:97'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           176:  %1 = bitcast <16 x i8> %0 to <8 x half> 
check:97'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           177:  %2 = fcmp olt <8 x half> %1, zeroinitializer 
check:97'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:97'1       ?                                             possible intended match
           178:  %vcltz.i = sext <8 x i1> %2 to <8 x i16> 
check:97'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           179:  store <8 x i16> %vcltz.i, ptr %ref.tmp.i, align 16 
check:97'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           180:  %3 = load <8 x i16>, ptr %ref.tmp.i, align 16 
check:97'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           181:  ret <8 x i16> %3 
check:97'0      ~~~~~~~~~~~~~~~~~~
           182: } 
check:97'0      ~~
           183:  
check:97'0      ~
           184: ; Function Attrs: noinline nounwind 
check:97'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           185: define dso_local <4 x half> @test_vcvt_f16_s16(<4 x i16> noundef %a) #0 { 
check:97'0      ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:105'0                                                   X~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           186: entry: 
check:105'0     ~~~~~~~
           187:  %__p0.addr.i = alloca <4 x i16>, align 8 
check:105'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           188:  %ref.tmp.i = alloca <8 x i8>, align 8 
check:105'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           189:  store <4 x i16> %a, ptr %__p0.addr.i, align 8 
check:105'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           190:  %0 = load <8 x i8>, ptr %__p0.addr.i, align 8 
check:105'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           191:  %1 = bitcast <8 x i8> %0 to <4 x i16> 
check:105'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           192:  %vcvt.i = sitofp <4 x i16> %1 to <4 x half> 
check:105'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:105'1         ?                                         possible intended match
           193:  store <4 x half> %vcvt.i, ptr %ref.tmp.i, align 8 
check:105'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           194:  %2 = load <4 x half>, ptr %ref.tmp.i, align 8 
check:105'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           195:  ret <4 x half> %2 
check:105'0     ~~~~~~~~~~~~~~~~~~~
           196: } 
check:105'0     ~~
           197:  
check:105'0     ~
           198: ; Function Attrs: noinline nounwind 
check:105'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           199: define dso_local <8 x half> @test_vcvtq_f16_s16(<8 x i16> noundef %a) #0 { 
check:105'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:112'0                                                    X~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           200: entry: 
check:112'0     ~~~~~~~
           201:  %__p0.addr.i = alloca <8 x i16>, align 16 
check:112'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           202:  %ref.tmp.i = alloca <16 x i8>, align 16 
check:112'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           203:  store <8 x i16> %a, ptr %__p0.addr.i, align 16 
check:112'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           204:  %0 = load <16 x i8>, ptr %__p0.addr.i, align 16 
check:112'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           205:  %1 = bitcast <16 x i8> %0 to <8 x i16> 
check:112'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           206:  %vcvt.i = sitofp <8 x i16> %1 to <8 x half> 
check:112'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:112'1         ?                                         possible intended match
           207:  store <8 x half> %vcvt.i, ptr %ref.tmp.i, align 16 
check:112'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           208:  %2 = load <8 x half>, ptr %ref.tmp.i, align 16 
check:112'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           209:  ret <8 x half> %2 
check:112'0     ~~~~~~~~~~~~~~~~~~~
           210: } 
check:112'0     ~~
           211:  
check:112'0     ~
           212: ; Function Attrs: noinline nounwind 
check:112'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           213: define dso_local <4 x half> @test_vcvt_f16_u16(<4 x i16> noundef %a) #0 { 
check:112'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:119'0                                                   X~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           214: entry: 
check:119'0     ~~~~~~~
           215:  %__p0.addr.i = alloca <4 x i16>, align 8 
check:119'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           216:  %ref.tmp.i = alloca <8 x i8>, align 8 
check:119'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           217:  store <4 x i16> %a, ptr %__p0.addr.i, align 8 
check:119'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           218:  %0 = load <8 x i8>, ptr %__p0.addr.i, align 8 
check:119'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           219:  %1 = bitcast <8 x i8> %0 to <4 x i16> 
check:119'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           220:  %vcvt.i = uitofp <4 x i16> %1 to <4 x half> 
check:119'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:119'1         ?                                         possible intended match
           221:  store <4 x half> %vcvt.i, ptr %ref.tmp.i, align 8 
check:119'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           222:  %2 = load <4 x half>, ptr %ref.tmp.i, align 8 
check:119'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           223:  ret <4 x half> %2 
check:119'0     ~~~~~~~~~~~~~~~~~~~
           224: } 
check:119'0     ~~
           225:  
check:119'0     ~
           226: ; Function Attrs: noinline nounwind 
check:119'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           227: define dso_local <8 x half> @test_vcvtq_f16_u16(<8 x i16> noundef %a) #0 { 
check:119'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:126'0                                                    X~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           228: entry: 
check:126'0     ~~~~~~~
           229:  %__p0.addr.i = alloca <8 x i16>, align 16 
check:126'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           230:  %ref.tmp.i = alloca <16 x i8>, align 16 
check:126'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           231:  store <8 x i16> %a, ptr %__p0.addr.i, align 16 
check:126'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           232:  %0 = load <16 x i8>, ptr %__p0.addr.i, align 16 
check:126'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           233:  %1 = bitcast <16 x i8> %0 to <8 x i16> 
check:126'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           234:  %vcvt.i = uitofp <8 x i16> %1 to <8 x half> 
check:126'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:126'1         ?                                         possible intended match
           235:  store <8 x half> %vcvt.i, ptr %ref.tmp.i, align 16 
check:126'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           236:  %2 = load <8 x half>, ptr %ref.tmp.i, align 16 
check:126'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           237:  ret <8 x half> %2 
check:126'0     ~~~~~~~~~~~~~~~~~~~
           238: } 
check:126'0     ~~
           239:  
check:126'0     ~
           240: ; Function Attrs: noinline nounwind 
check:126'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           241: define dso_local <4 x i16> @test_vcvt_s16_f16(<4 x half> noundef %a) #0 { 
check:126'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:133'0                                                  X~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           242: entry: 
check:133'0     ~~~~~~~
           243:  %__p0.addr.i = alloca <4 x half>, align 8 
check:133'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           244:  %ref.tmp.i = alloca <8 x i8>, align 8 
check:133'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           245:  store <4 x half> %a, ptr %__p0.addr.i, align 8 
check:133'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           246:  %0 = load <8 x i8>, ptr %__p0.addr.i, align 8 
check:133'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           247:  %1 = bitcast <8 x i8> %0 to <4 x half> 
check:133'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           248:  %vcvt.i = fptosi <4 x half> %1 to <4 x i16> 
check:133'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:133'1         ?                                         possible intended match
           249:  store <4 x i16> %vcvt.i, ptr %ref.tmp.i, align 8 
check:133'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           250:  %2 = load <4 x i16>, ptr %ref.tmp.i, align 8 
check:133'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           251:  ret <4 x i16> %2 
check:133'0     ~~~~~~~~~~~~~~~~~~
           252: } 
check:133'0     ~~
           253:  
check:133'0     ~
           254: ; Function Attrs: noinline nounwind 
check:133'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           255: define dso_local <8 x i16> @test_vcvtq_s16_f16(<8 x half> noundef %a) #0 { 
check:133'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:140'0                                                   X~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           256: entry: 
check:140'0     ~~~~~~~
           257:  %__p0.addr.i = alloca <8 x half>, align 16 
check:140'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           258:  %ref.tmp.i = alloca <16 x i8>, align 16 
check:140'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           259:  store <8 x half> %a, ptr %__p0.addr.i, align 16 
check:140'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           260:  %0 = load <16 x i8>, ptr %__p0.addr.i, align 16 
check:140'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           261:  %1 = bitcast <16 x i8> %0 to <8 x half> 
check:140'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           262:  %vcvt.i = fptosi <8 x half> %1 to <8 x i16> 
check:140'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:140'1         ?                                         possible intended match
           263:  store <8 x i16> %vcvt.i, ptr %ref.tmp.i, align 16 
check:140'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           264:  %2 = load <8 x i16>, ptr %ref.tmp.i, align 16 
check:140'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           265:  ret <8 x i16> %2 
check:140'0     ~~~~~~~~~~~~~~~~~~
           266: } 
check:140'0     ~~
           267:  
check:140'0     ~
           268: ; Function Attrs: noinline nounwind 
check:140'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           269: define dso_local <4 x i16> @test_vcvt_u16_f16(<4 x half> noundef %a) #0 { 
check:140'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:147'0                                                  X~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           270: entry: 
check:147'0     ~~~~~~~
           271:  %__p0.addr.i = alloca <4 x half>, align 8 
check:147'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           272:  %ref.tmp.i = alloca <8 x i8>, align 8 
check:147'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           273:  store <4 x half> %a, ptr %__p0.addr.i, align 8 
check:147'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           274:  %0 = load <8 x i8>, ptr %__p0.addr.i, align 8 
check:147'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           275:  %1 = bitcast <8 x i8> %0 to <4 x half> 
check:147'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           276:  %vcvt.i = fptoui <4 x half> %1 to <4 x i16> 
check:147'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:147'1         ?                                         possible intended match
           277:  store <4 x i16> %vcvt.i, ptr %ref.tmp.i, align 8 
check:147'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           278:  %2 = load <4 x i16>, ptr %ref.tmp.i, align 8 
check:147'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           279:  ret <4 x i16> %2 
check:147'0     ~~~~~~~~~~~~~~~~~~
           280: } 
check:147'0     ~~
           281:  
check:147'0     ~
           282: ; Function Attrs: noinline nounwind 
check:147'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           283: define dso_local <8 x i16> @test_vcvtq_u16_f16(<8 x half> noundef %a) #0 { 
check:147'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:154'0                                                   X~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           284: entry: 
check:154'0     ~~~~~~~
           285:  %__p0.addr.i = alloca <8 x half>, align 16 
check:154'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           286:  %ref.tmp.i = alloca <16 x i8>, align 16 
check:154'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           287:  store <8 x half> %a, ptr %__p0.addr.i, align 16 
check:154'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           288:  %0 = load <16 x i8>, ptr %__p0.addr.i, align 16 
check:154'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           289:  %1 = bitcast <16 x i8> %0 to <8 x half> 
check:154'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           290:  %vcvt.i = fptoui <8 x half> %1 to <8 x i16> 
check:154'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:154'1         ?                                         possible intended match
           291:  store <8 x i16> %vcvt.i, ptr %ref.tmp.i, align 16 
check:154'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           292:  %2 = load <8 x i16>, ptr %ref.tmp.i, align 16 
check:154'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           293:  ret <8 x i16> %2 
check:154'0     ~~~~~~~~~~~~~~~~~~
           294: } 
check:154'0     ~~
           295:  
check:154'0     ~
           296: ; Function Attrs: noinline nounwind 
check:154'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           297: define dso_local <4 x i16> @test_vcvta_s16_f16(<4 x half> noundef %a) #0 { 
check:154'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:161'0                                                   X~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           298: entry: 
check:161'0     ~~~~~~~
           299:  %__p0.addr.i = alloca <4 x half>, align 8 
check:161'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           300:  %ref.tmp.i = alloca <8 x i8>, align 8 
check:161'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           301:  store <4 x half> %a, ptr %__p0.addr.i, align 8 
check:161'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           302:  %0 = load <8 x i8>, ptr %__p0.addr.i, align 8 
check:161'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           303:  %vcvta_s16_f16.i = bitcast <8 x i8> %0 to <4 x half> 
check:161'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           304:  %vcvta_s16_f161.i = call <4 x i16> @llvm.arm.neon.vcvtas.v4i16.v4f16(<4 x half> %vcvta_s16_f16.i) 
check:161'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:161'1                ?                                                                                        possible intended match
           305:  store <4 x i16> %vcvta_s16_f161.i, ptr %ref.tmp.i, align 8 
check:161'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           306:  %1 = load <4 x i16>, ptr %ref.tmp.i, align 8 
check:161'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           307:  ret <4 x i16> %1 
check:161'0     ~~~~~~~~~~~~~~~~~~
           308: } 
check:161'0     ~~
           309:  
check:161'0     ~
           310: ; Function Attrs: noinline nounwind 
check:161'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           311: define dso_local <4 x i16> @test_vcvta_u16_f16(<4 x half> noundef %a) #0 { 
check:161'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:168'0                                                   X~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           312: entry: 
check:168'0     ~~~~~~~
           313:  %__p0.addr.i = alloca <4 x half>, align 8 
check:168'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           314:  %ref.tmp.i = alloca <8 x i8>, align 8 
check:168'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           315:  store <4 x half> %a, ptr %__p0.addr.i, align 8 
check:168'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           316:  %0 = load <8 x i8>, ptr %__p0.addr.i, align 8 
check:168'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           317:  %vcvta_u16_f16.i = bitcast <8 x i8> %0 to <4 x half> 
check:168'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           318:  %vcvta_u16_f161.i = call <4 x i16> @llvm.arm.neon.vcvtau.v4i16.v4f16(<4 x half> %vcvta_u16_f16.i) 
check:168'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:168'1                ?                                                                                        possible intended match
           319:  store <4 x i16> %vcvta_u16_f161.i, ptr %ref.tmp.i, align 8 
check:168'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           320:  %1 = load <4 x i16>, ptr %ref.tmp.i, align 8 
check:168'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           321:  ret <4 x i16> %1 
check:168'0     ~~~~~~~~~~~~~~~~~~
           322: } 
check:168'0     ~~
           323:  
check:168'0     ~
           324: ; Function Attrs: noinline nounwind 
check:168'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           325: define dso_local <8 x i16> @test_vcvtaq_s16_f16(<8 x half> noundef %a) #0 { 
check:168'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:175'0                                                    X~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           326: entry: 
check:175'0     ~~~~~~~
           327:  %__p0.addr.i = alloca <8 x half>, align 16 
check:175'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           328:  %ref.tmp.i = alloca <16 x i8>, align 16 
check:175'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           329:  store <8 x half> %a, ptr %__p0.addr.i, align 16 
check:175'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           330:  %0 = load <16 x i8>, ptr %__p0.addr.i, align 16 
check:175'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           331:  %vcvtaq_s16_f16.i = bitcast <16 x i8> %0 to <8 x half> 
check:175'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           332:  %vcvtaq_s16_f161.i = call <8 x i16> @llvm.arm.neon.vcvtas.v8i16.v8f16(<8 x half> %vcvtaq_s16_f16.i) 
check:175'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:175'1                 ?                                                                                         possible intended match
           333:  store <8 x i16> %vcvtaq_s16_f161.i, ptr %ref.tmp.i, align 16 
check:175'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           334:  %1 = load <8 x i16>, ptr %ref.tmp.i, align 16 
check:175'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           335:  ret <8 x i16> %1 
check:175'0     ~~~~~~~~~~~~~~~~~~
           336: } 
check:175'0     ~~
           337:  
check:175'0     ~
           338: ; Function Attrs: noinline nounwind 
check:175'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           339: define dso_local <4 x i16> @test_vcvtm_s16_f16(<4 x half> noundef %a) #0 { 
check:175'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:182'0                                                   X~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           340: entry: 
check:182'0     ~~~~~~~
           341:  %__p0.addr.i = alloca <4 x half>, align 8 
check:182'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           342:  %ref.tmp.i = alloca <8 x i8>, align 8 
check:182'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           343:  store <4 x half> %a, ptr %__p0.addr.i, align 8 
check:182'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           344:  %0 = load <8 x i8>, ptr %__p0.addr.i, align 8 
check:182'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           345:  %vcvtm_s16_f16.i = bitcast <8 x i8> %0 to <4 x half> 
check:182'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           346:  %vcvtm_s16_f161.i = call <4 x i16> @llvm.arm.neon.vcvtms.v4i16.v4f16(<4 x half> %vcvtm_s16_f16.i) 
check:182'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:182'1            ?                                                                                            possible intended match
           347:  store <4 x i16> %vcvtm_s16_f161.i, ptr %ref.tmp.i, align 8 
check:182'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           348:  %1 = load <4 x i16>, ptr %ref.tmp.i, align 8 
check:182'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           349:  ret <4 x i16> %1 
check:182'0     ~~~~~~~~~~~~~~~~~~
           350: } 
check:182'0     ~~
           351:  
check:182'0     ~
           352: ; Function Attrs: noinline nounwind 
check:182'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           353: define dso_local <8 x i16> @test_vcvtmq_s16_f16(<8 x half> noundef %a) #0 { 
check:182'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:189'0                                                    X~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           354: entry: 
check:189'0     ~~~~~~~
           355:  %__p0.addr.i = alloca <8 x half>, align 16 
check:189'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           356:  %ref.tmp.i = alloca <16 x i8>, align 16 
check:189'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           357:  store <8 x half> %a, ptr %__p0.addr.i, align 16 
check:189'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           358:  %0 = load <16 x i8>, ptr %__p0.addr.i, align 16 
check:189'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           359:  %vcvtmq_s16_f16.i = bitcast <16 x i8> %0 to <8 x half> 
check:189'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           360:  %vcvtmq_s16_f161.i = call <8 x i16> @llvm.arm.neon.vcvtms.v8i16.v8f16(<8 x half> %vcvtmq_s16_f16.i) 
check:189'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:189'1             ?                                                                                             possible intended match
           361:  store <8 x i16> %vcvtmq_s16_f161.i, ptr %ref.tmp.i, align 16 
check:189'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           362:  %1 = load <8 x i16>, ptr %ref.tmp.i, align 16 
check:189'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           363:  ret <8 x i16> %1 
check:189'0     ~~~~~~~~~~~~~~~~~~
           364: } 
check:189'0     ~~
           365:  
check:189'0     ~
           366: ; Function Attrs: noinline nounwind 
check:189'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           367: define dso_local <4 x i16> @test_vcvtm_u16_f16(<4 x half> noundef %a) #0 { 
check:189'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:196'0                                                   X~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           368: entry: 
check:196'0     ~~~~~~~
           369:  %__p0.addr.i = alloca <4 x half>, align 8 
check:196'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           370:  %ref.tmp.i = alloca <8 x i8>, align 8 
check:196'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           371:  store <4 x half> %a, ptr %__p0.addr.i, align 8 
check:196'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           372:  %0 = load <8 x i8>, ptr %__p0.addr.i, align 8 
check:196'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           373:  %vcvtm_u16_f16.i = bitcast <8 x i8> %0 to <4 x half> 
check:196'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           374:  %vcvtm_u16_f161.i = call <4 x i16> @llvm.arm.neon.vcvtmu.v4i16.v4f16(<4 x half> %vcvtm_u16_f16.i) 
check:196'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:196'1            ?                                                                                            possible intended match
           375:  store <4 x i16> %vcvtm_u16_f161.i, ptr %ref.tmp.i, align 8 
check:196'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           376:  %1 = load <4 x i16>, ptr %ref.tmp.i, align 8 
check:196'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           377:  ret <4 x i16> %1 
check:196'0     ~~~~~~~~~~~~~~~~~~
           378: } 
check:196'0     ~~
           379:  
check:196'0     ~
           380: ; Function Attrs: noinline nounwind 
check:196'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           381: define dso_local <8 x i16> @test_vcvtmq_u16_f16(<8 x half> noundef %a) #0 { 
check:196'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:203'0                                                    X~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           382: entry: 
check:203'0     ~~~~~~~
           383:  %__p0.addr.i = alloca <8 x half>, align 16 
check:203'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           384:  %ref.tmp.i = alloca <16 x i8>, align 16 
check:203'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           385:  store <8 x half> %a, ptr %__p0.addr.i, align 16 
check:203'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           386:  %0 = load <16 x i8>, ptr %__p0.addr.i, align 16 
check:203'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           387:  %vcvtmq_u16_f16.i = bitcast <16 x i8> %0 to <8 x half> 
check:203'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           388:  %vcvtmq_u16_f161.i = call <8 x i16> @llvm.arm.neon.vcvtmu.v8i16.v8f16(<8 x half> %vcvtmq_u16_f16.i) 
check:203'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:203'1             ?                                                                                             possible intended match
           389:  store <8 x i16> %vcvtmq_u16_f161.i, ptr %ref.tmp.i, align 16 
check:203'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           390:  %1 = load <8 x i16>, ptr %ref.tmp.i, align 16 
check:203'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           391:  ret <8 x i16> %1 
check:203'0     ~~~~~~~~~~~~~~~~~~
           392: } 
check:203'0     ~~
           393:  
check:203'0     ~
           394: ; Function Attrs: noinline nounwind 
check:203'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           395: define dso_local <4 x i16> @test_vcvtn_s16_f16(<4 x half> noundef %a) #0 { 
check:203'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:210'0                                                   X~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           396: entry: 
check:210'0     ~~~~~~~
           397:  %__p0.addr.i = alloca <4 x half>, align 8 
check:210'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           398:  %ref.tmp.i = alloca <8 x i8>, align 8 
check:210'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           399:  store <4 x half> %a, ptr %__p0.addr.i, align 8 
check:210'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           400:  %0 = load <8 x i8>, ptr %__p0.addr.i, align 8 
check:210'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           401:  %vcvtn_s16_f16.i = bitcast <8 x i8> %0 to <4 x half> 
check:210'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           402:  %vcvtn_s16_f161.i = call <4 x i16> @llvm.arm.neon.vcvtns.v4i16.v4f16(<4 x half> %vcvtn_s16_f16.i) 
check:210'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:210'1            ?                                                                                            possible intended match
           403:  store <4 x i16> %vcvtn_s16_f161.i, ptr %ref.tmp.i, align 8 
check:210'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           404:  %1 = load <4 x i16>, ptr %ref.tmp.i, align 8 
check:210'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           405:  ret <4 x i16> %1 
check:210'0     ~~~~~~~~~~~~~~~~~~
           406: } 
check:210'0     ~~
           407:  
check:210'0     ~
           408: ; Function Attrs: noinline nounwind 
check:210'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           409: define dso_local <8 x i16> @test_vcvtnq_s16_f16(<8 x half> noundef %a) #0 { 
check:210'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:217'0                                                    X~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           410: entry: 
check:217'0     ~~~~~~~
           411:  %__p0.addr.i = alloca <8 x half>, align 16 
check:217'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           412:  %ref.tmp.i = alloca <16 x i8>, align 16 
check:217'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           413:  store <8 x half> %a, ptr %__p0.addr.i, align 16 
check:217'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           414:  %0 = load <16 x i8>, ptr %__p0.addr.i, align 16 
check:217'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           415:  %vcvtnq_s16_f16.i = bitcast <16 x i8> %0 to <8 x half> 
check:217'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           416:  %vcvtnq_s16_f161.i = call <8 x i16> @llvm.arm.neon.vcvtns.v8i16.v8f16(<8 x half> %vcvtnq_s16_f16.i) 
check:217'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:217'1             ?                                                                                             possible intended match
           417:  store <8 x i16> %vcvtnq_s16_f161.i, ptr %ref.tmp.i, align 16 
check:217'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           418:  %1 = load <8 x i16>, ptr %ref.tmp.i, align 16 
check:217'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           419:  ret <8 x i16> %1 
check:217'0     ~~~~~~~~~~~~~~~~~~
           420: } 
check:217'0     ~~
           421:  
check:217'0     ~
           422: ; Function Attrs: noinline nounwind 
check:217'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           423: define dso_local <4 x i16> @test_vcvtn_u16_f16(<4 x half> noundef %a) #0 { 
check:217'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:224'0                                                   X~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           424: entry: 
check:224'0     ~~~~~~~
           425:  %__p0.addr.i = alloca <4 x half>, align 8 
check:224'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           426:  %ref.tmp.i = alloca <8 x i8>, align 8 
check:224'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           427:  store <4 x half> %a, ptr %__p0.addr.i, align 8 
check:224'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           428:  %0 = load <8 x i8>, ptr %__p0.addr.i, align 8 
check:224'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           429:  %vcvtn_u16_f16.i = bitcast <8 x i8> %0 to <4 x half> 
check:224'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           430:  %vcvtn_u16_f161.i = call <4 x i16> @llvm.arm.neon.vcvtnu.v4i16.v4f16(<4 x half> %vcvtn_u16_f16.i) 
check:224'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:224'1            ?                                                                                            possible intended match
           431:  store <4 x i16> %vcvtn_u16_f161.i, ptr %ref.tmp.i, align 8 
check:224'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           432:  %1 = load <4 x i16>, ptr %ref.tmp.i, align 8 
check:224'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           433:  ret <4 x i16> %1 
check:224'0     ~~~~~~~~~~~~~~~~~~
           434: } 
check:224'0     ~~
           435:  
check:224'0     ~
           436: ; Function Attrs: noinline nounwind 
check:224'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           437: define dso_local <8 x i16> @test_vcvtnq_u16_f16(<8 x half> noundef %a) #0 { 
check:224'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:231'0                                                    X~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           438: entry: 
check:231'0     ~~~~~~~
           439:  %__p0.addr.i = alloca <8 x half>, align 16 
check:231'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           440:  %ref.tmp.i = alloca <16 x i8>, align 16 
check:231'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           441:  store <8 x half> %a, ptr %__p0.addr.i, align 16 
check:231'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           442:  %0 = load <16 x i8>, ptr %__p0.addr.i, align 16 
check:231'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           443:  %vcvtnq_u16_f16.i = bitcast <16 x i8> %0 to <8 x half> 
check:231'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           444:  %vcvtnq_u16_f161.i = call <8 x i16> @llvm.arm.neon.vcvtnu.v8i16.v8f16(<8 x half> %vcvtnq_u16_f16.i) 
check:231'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:231'1             ?                                                                                             possible intended match
           445:  store <8 x i16> %vcvtnq_u16_f161.i, ptr %ref.tmp.i, align 16 
check:231'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           446:  %1 = load <8 x i16>, ptr %ref.tmp.i, align 16 
check:231'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           447:  ret <8 x i16> %1 
check:231'0     ~~~~~~~~~~~~~~~~~~
           448: } 
check:231'0     ~~
           449:  
check:231'0     ~
           450: ; Function Attrs: noinline nounwind 
check:231'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           451: define dso_local <4 x i16> @test_vcvtp_s16_f16(<4 x half> noundef %a) #0 { 
check:231'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:238'0                                                   X~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           452: entry: 
check:238'0     ~~~~~~~
           453:  %__p0.addr.i = alloca <4 x half>, align 8 
check:238'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           454:  %ref.tmp.i = alloca <8 x i8>, align 8 
check:238'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           455:  store <4 x half> %a, ptr %__p0.addr.i, align 8 
check:238'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           456:  %0 = load <8 x i8>, ptr %__p0.addr.i, align 8 
check:238'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           457:  %vcvtp_s16_f16.i = bitcast <8 x i8> %0 to <4 x half> 
check:238'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           458:  %vcvtp_s16_f161.i = call <4 x i16> @llvm.arm.neon.vcvtps.v4i16.v4f16(<4 x half> %vcvtp_s16_f16.i) 
check:238'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:238'1            ?                                                                                            possible intended match
           459:  store <4 x i16> %vcvtp_s16_f161.i, ptr %ref.tmp.i, align 8 
check:238'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           460:  %1 = load <4 x i16>, ptr %ref.tmp.i, align 8 
check:238'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           461:  ret <4 x i16> %1 
check:238'0     ~~~~~~~~~~~~~~~~~~
           462: } 
check:238'0     ~~
           463:  
check:238'0     ~
           464: ; Function Attrs: noinline nounwind 
check:238'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           465: define dso_local <8 x i16> @test_vcvtpq_s16_f16(<8 x half> noundef %a) #0 { 
check:238'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:245'0                                                    X~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           466: entry: 
check:245'0     ~~~~~~~
           467:  %__p0.addr.i = alloca <8 x half>, align 16 
check:245'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           468:  %ref.tmp.i = alloca <16 x i8>, align 16 
check:245'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           469:  store <8 x half> %a, ptr %__p0.addr.i, align 16 
check:245'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           470:  %0 = load <16 x i8>, ptr %__p0.addr.i, align 16 
check:245'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           471:  %vcvtpq_s16_f16.i = bitcast <16 x i8> %0 to <8 x half> 
check:245'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           472:  %vcvtpq_s16_f161.i = call <8 x i16> @llvm.arm.neon.vcvtps.v8i16.v8f16(<8 x half> %vcvtpq_s16_f16.i) 
check:245'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:245'1             ?                                                                                             possible intended match
           473:  store <8 x i16> %vcvtpq_s16_f161.i, ptr %ref.tmp.i, align 16 
check:245'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           474:  %1 = load <8 x i16>, ptr %ref.tmp.i, align 16 
check:245'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           475:  ret <8 x i16> %1 
check:245'0     ~~~~~~~~~~~~~~~~~~
           476: } 
check:245'0     ~~
           477:  
check:245'0     ~
           478: ; Function Attrs: noinline nounwind 
check:245'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           479: define dso_local <4 x i16> @test_vcvtp_u16_f16(<4 x half> noundef %a) #0 { 
check:245'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:252'0                                                   X~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           480: entry: 
check:252'0     ~~~~~~~
           481:  %__p0.addr.i = alloca <4 x half>, align 8 
check:252'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           482:  %ref.tmp.i = alloca <8 x i8>, align 8 
check:252'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           483:  store <4 x half> %a, ptr %__p0.addr.i, align 8 
check:252'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           484:  %0 = load <8 x i8>, ptr %__p0.addr.i, align 8 
check:252'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           485:  %vcvtp_u16_f16.i = bitcast <8 x i8> %0 to <4 x half> 
check:252'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           486:  %vcvtp_u16_f161.i = call <4 x i16> @llvm.arm.neon.vcvtpu.v4i16.v4f16(<4 x half> %vcvtp_u16_f16.i) 
check:252'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:252'1            ?                                                                                            possible intended match
           487:  store <4 x i16> %vcvtp_u16_f161.i, ptr %ref.tmp.i, align 8 
check:252'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           488:  %1 = load <4 x i16>, ptr %ref.tmp.i, align 8 
check:252'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           489:  ret <4 x i16> %1 
check:252'0     ~~~~~~~~~~~~~~~~~~
           490: } 
check:252'0     ~~
           491:  
check:252'0     ~
           492: ; Function Attrs: noinline nounwind 
check:252'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           493: define dso_local <8 x i16> @test_vcvtpq_u16_f16(<8 x half> noundef %a) #0 { 
check:252'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:259'0                                                    X~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           494: entry: 
check:259'0     ~~~~~~~
           495:  %__p0.addr.i = alloca <8 x half>, align 16 
check:259'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           496:  %ref.tmp.i = alloca <16 x i8>, align 16 
check:259'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           497:  store <8 x half> %a, ptr %__p0.addr.i, align 16 
check:259'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           498:  %0 = load <16 x i8>, ptr %__p0.addr.i, align 16 
check:259'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           499:  %vcvtpq_u16_f16.i = bitcast <16 x i8> %0 to <8 x half> 
check:259'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           500:  %vcvtpq_u16_f161.i = call <8 x i16> @llvm.arm.neon.vcvtpu.v8i16.v8f16(<8 x half> %vcvtpq_u16_f16.i) 
check:259'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:259'1             ?                                                                                             possible intended match
           501:  store <8 x i16> %vcvtpq_u16_f161.i, ptr %ref.tmp.i, align 16 
check:259'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           502:  %1 = load <8 x i16>, ptr %ref.tmp.i, align 16 
check:259'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           503:  ret <8 x i16> %1 
check:259'0     ~~~~~~~~~~~~~~~~~~
           504: } 
check:259'0     ~~
           505:  
check:259'0     ~
             .
             .
             .
           516:  %fneg.i = fneg <8 x half> %a 
           517:  ret <8 x half> %fneg.i 
           518: } 
           519:  
           520: ; Function Attrs: noinline nounwind 
           521: define dso_local <4 x half> @test_vrecpe_f16(<4 x half> noundef %a) #0 { 
check:281'0                                                 X~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           522: entry: 
check:281'0     ~~~~~~~
           523:  %__p0.addr.i = alloca <4 x half>, align 8 
check:281'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           524:  %ref.tmp.i = alloca <8 x i8>, align 8 
check:281'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           525:  store <4 x half> %a, ptr %__p0.addr.i, align 8 
check:281'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           526:  %0 = load <8 x i8>, ptr %__p0.addr.i, align 8 
check:281'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           527:  %vrecpe_v.i = bitcast <8 x i8> %0 to <4 x half> 
check:281'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           528:  %vrecpe_v1.i = call <4 x half> @llvm.arm.neon.vrecpe.v4f16(<4 x half> %vrecpe_v.i) 
check:281'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:281'1        ?                                                                                 possible intended match
           529:  store <4 x half> %vrecpe_v1.i, ptr %ref.tmp.i, align 8 
check:281'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           530:  %1 = load <4 x half>, ptr %ref.tmp.i, align 8 
check:281'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           531:  ret <4 x half> %1 
check:281'0     ~~~~~~~~~~~~~~~~~~~
           532: } 
check:281'0     ~~
           533:  
check:281'0     ~
           534: ; Function Attrs: noinline nounwind 
check:281'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           535: define dso_local <8 x half> @test_vrecpeq_f16(<8 x half> noundef %a) #0 { 
check:281'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:288'0                                                  X~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           536: entry: 
check:288'0     ~~~~~~~
           537:  %__p0.addr.i = alloca <8 x half>, align 16 
check:288'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           538:  %ref.tmp.i = alloca <16 x i8>, align 16 
check:288'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           539:  store <8 x half> %a, ptr %__p0.addr.i, align 16 
check:288'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           540:  %0 = load <16 x i8>, ptr %__p0.addr.i, align 16 
check:288'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           541:  %vrecpeq_v.i = bitcast <16 x i8> %0 to <8 x half> 
check:288'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           542:  %vrecpeq_v1.i = call <8 x half> @llvm.arm.neon.vrecpe.v8f16(<8 x half> %vrecpeq_v.i) 
check:288'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:288'1         ?                                                                                  possible intended match
           543:  store <8 x half> %vrecpeq_v1.i, ptr %ref.tmp.i, align 16 
check:288'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           544:  %1 = load <8 x half>, ptr %ref.tmp.i, align 16 
check:288'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           545:  ret <8 x half> %1 
check:288'0     ~~~~~~~~~~~~~~~~~~~
           546: } 
check:288'0     ~~
           547:  
check:288'0     ~
           548: ; Function Attrs: noinline nounwind 
check:288'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           549: define dso_local <4 x half> @test_vrnd_f16(<4 x half> noundef %a) #0 { 
check:288'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:295'0                                               X~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           550: entry: 
check:295'0     ~~~~~~~
           551:  %__p0.addr.i = alloca <4 x half>, align 8 
check:295'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           552:  %ref.tmp.i = alloca <8 x i8>, align 8 
check:295'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           553:  store <4 x half> %a, ptr %__p0.addr.i, align 8 
check:295'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           554:  %0 = load <8 x i8>, ptr %__p0.addr.i, align 8 
check:295'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           555:  %vrnd_v.i = bitcast <8 x i8> %0 to <4 x half> 
check:295'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           556:  %vrnd_v1.i = call <4 x half> @llvm.arm.neon.vrintz.v4f16(<4 x half> %vrnd_v.i) 
check:295'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:295'1            ?                                                                         possible intended match
           557:  %vrnd_v2.i = bitcast <4 x half> %vrnd_v1.i to <8 x i8> 
check:295'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           558:  store <8 x i8> %vrnd_v2.i, ptr %ref.tmp.i, align 8 
check:295'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           559:  %1 = load <4 x half>, ptr %ref.tmp.i, align 8 
check:295'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           560:  ret <4 x half> %1 
check:295'0     ~~~~~~~~~~~~~~~~~~~
           561: } 
check:295'0     ~~
           562:  
check:295'0     ~
           563: ; Function Attrs: noinline nounwind 
check:295'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           564: define dso_local <8 x half> @test_vrndq_f16(<8 x half> noundef %a) #0 { 
check:295'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:302'0                                                X~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           565: entry: 
check:302'0     ~~~~~~~
           566:  %__p0.addr.i = alloca <8 x half>, align 16 
check:302'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           567:  %ref.tmp.i = alloca <16 x i8>, align 16 
check:302'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           568:  store <8 x half> %a, ptr %__p0.addr.i, align 16 
check:302'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           569:  %0 = load <16 x i8>, ptr %__p0.addr.i, align 16 
check:302'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           570:  %vrndq_v.i = bitcast <16 x i8> %0 to <8 x half> 
check:302'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           571:  %vrndq_v1.i = call <8 x half> @llvm.arm.neon.vrintz.v8f16(<8 x half> %vrndq_v.i) 
check:302'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:302'1       ?                                                                                possible intended match
           572:  %vrndq_v2.i = bitcast <8 x half> %vrndq_v1.i to <16 x i8> 
check:302'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           573:  store <16 x i8> %vrndq_v2.i, ptr %ref.tmp.i, align 16 
check:302'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           574:  %1 = load <8 x half>, ptr %ref.tmp.i, align 16 
check:302'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           575:  ret <8 x half> %1 
check:302'0     ~~~~~~~~~~~~~~~~~~~
           576: } 
check:302'0     ~~
           577:  
check:302'0     ~
           578: ; Function Attrs: noinline nounwind 
check:302'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           579: define dso_local <4 x half> @test_vrnda_f16(<4 x half> noundef %a) #0 { 
check:302'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:309'0                                                X~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           580: entry: 
check:309'0     ~~~~~~~
           581:  %__p0.addr.i = alloca <4 x half>, align 8 
check:309'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           582:  %ref.tmp.i = alloca <8 x i8>, align 8 
check:309'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           583:  store <4 x half> %a, ptr %__p0.addr.i, align 8 
check:309'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           584:  %0 = load <8 x i8>, ptr %__p0.addr.i, align 8 
check:309'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           585:  %vrnda_v.i = bitcast <8 x i8> %0 to <4 x half> 
check:309'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           586:  %vrnda_v1.i = call <4 x half> @llvm.arm.neon.vrinta.v4f16(<4 x half> %vrnda_v.i) 
check:309'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:309'1           ?                                                                            possible intended match
           587:  %vrnda_v2.i = bitcast <4 x half> %vrnda_v1.i to <8 x i8> 
check:309'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           588:  store <8 x i8> %vrnda_v2.i, ptr %ref.tmp.i, align 8 
check:309'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           589:  %1 = load <4 x half>, ptr %ref.tmp.i, align 8 
check:309'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           590:  ret <4 x half> %1 
check:309'0     ~~~~~~~~~~~~~~~~~~~
           591: } 
check:309'0     ~~
           592:  
check:309'0     ~
           593: ; Function Attrs: noinline nounwind 
check:309'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           594: define dso_local <8 x half> @test_vrndaq_f16(<8 x half> noundef %a) #0 { 
check:309'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:316'0                                                 X~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           595: entry: 
check:316'0     ~~~~~~~
           596:  %__p0.addr.i = alloca <8 x half>, align 16 
check:316'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           597:  %ref.tmp.i = alloca <16 x i8>, align 16 
check:316'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           598:  store <8 x half> %a, ptr %__p0.addr.i, align 16 
check:316'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           599:  %0 = load <16 x i8>, ptr %__p0.addr.i, align 16 
check:316'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           600:  %vrndaq_v.i = bitcast <16 x i8> %0 to <8 x half> 
check:316'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           601:  %vrndaq_v1.i = call <8 x half> @llvm.arm.neon.vrinta.v8f16(<8 x half> %vrndaq_v.i) 
check:316'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:316'1            ?                                                                             possible intended match
           602:  %vrndaq_v2.i = bitcast <8 x half> %vrndaq_v1.i to <16 x i8> 
check:316'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           603:  store <16 x i8> %vrndaq_v2.i, ptr %ref.tmp.i, align 16 
check:316'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           604:  %1 = load <8 x half>, ptr %ref.tmp.i, align 16 
check:316'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           605:  ret <8 x half> %1 
check:316'0     ~~~~~~~~~~~~~~~~~~~
           606: } 
check:316'0     ~~
           607:  
check:316'0     ~
           608: ; Function Attrs: noinline nounwind 
check:316'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           609: define dso_local <4 x half> @test_vrndm_f16(<4 x half> noundef %a) #0 { 
check:316'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:323'0                                                X~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           610: entry: 
check:323'0     ~~~~~~~
           611:  %__p0.addr.i = alloca <4 x half>, align 8 
check:323'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           612:  %ref.tmp.i = alloca <8 x i8>, align 8 
check:323'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           613:  store <4 x half> %a, ptr %__p0.addr.i, align 8 
check:323'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           614:  %0 = load <8 x i8>, ptr %__p0.addr.i, align 8 
check:323'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           615:  %vrndm_v.i = bitcast <8 x i8> %0 to <4 x half> 
check:323'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           616:  %vrndm_v1.i = call <4 x half> @llvm.arm.neon.vrintm.v4f16(<4 x half> %vrndm_v.i) 
check:323'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:323'1       ?                                                                                possible intended match
           617:  %vrndm_v2.i = bitcast <4 x half> %vrndm_v1.i to <8 x i8> 
check:323'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           618:  store <8 x i8> %vrndm_v2.i, ptr %ref.tmp.i, align 8 
check:323'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           619:  %1 = load <4 x half>, ptr %ref.tmp.i, align 8 
check:323'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           620:  ret <4 x half> %1 
check:323'0     ~~~~~~~~~~~~~~~~~~~
           621: } 
check:323'0     ~~
           622:  
check:323'0     ~
           623: ; Function Attrs: noinline nounwind 
check:323'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           624: define dso_local <8 x half> @test_vrndmq_f16(<8 x half> noundef %a) #0 { 
check:323'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:330'0                                                 X~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           625: entry: 
check:330'0     ~~~~~~~
           626:  %__p0.addr.i = alloca <8 x half>, align 16 
check:330'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           627:  %ref.tmp.i = alloca <16 x i8>, align 16 
check:330'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           628:  store <8 x half> %a, ptr %__p0.addr.i, align 16 
check:330'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           629:  %0 = load <16 x i8>, ptr %__p0.addr.i, align 16 
check:330'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           630:  %vrndmq_v.i = bitcast <16 x i8> %0 to <8 x half> 
check:330'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           631:  %vrndmq_v1.i = call <8 x half> @llvm.arm.neon.vrintm.v8f16(<8 x half> %vrndmq_v.i) 
check:330'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:330'1        ?                                                                                 possible intended match
           632:  %vrndmq_v2.i = bitcast <8 x half> %vrndmq_v1.i to <16 x i8> 
check:330'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           633:  store <16 x i8> %vrndmq_v2.i, ptr %ref.tmp.i, align 16 
check:330'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           634:  %1 = load <8 x half>, ptr %ref.tmp.i, align 16 
check:330'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           635:  ret <8 x half> %1 
check:330'0     ~~~~~~~~~~~~~~~~~~~
           636: } 
check:330'0     ~~
           637:  
check:330'0     ~
           638: ; Function Attrs: noinline nounwind 
check:330'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           639: define dso_local <4 x half> @test_vrndn_f16(<4 x half> noundef %a) #0 { 
check:330'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:337'0                                                X~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           640: entry: 
check:337'0     ~~~~~~~
           641:  %__p0.addr.i = alloca <4 x half>, align 8 
check:337'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           642:  %ref.tmp.i = alloca <8 x i8>, align 8 
check:337'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           643:  store <4 x half> %a, ptr %__p0.addr.i, align 8 
check:337'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           644:  %0 = load <8 x i8>, ptr %__p0.addr.i, align 8 
check:337'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           645:  %vrndn_v.i = bitcast <8 x i8> %0 to <4 x half> 
check:337'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           646:  %vrndn_v1.i = call <4 x half> @llvm.arm.neon.vrintn.v4f16(<4 x half> %vrndn_v.i) 
check:337'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:337'1       ?                                                                                possible intended match
           647:  %vrndn_v2.i = bitcast <4 x half> %vrndn_v1.i to <8 x i8> 
check:337'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           648:  store <8 x i8> %vrndn_v2.i, ptr %ref.tmp.i, align 8 
check:337'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           649:  %1 = load <4 x half>, ptr %ref.tmp.i, align 8 
check:337'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           650:  ret <4 x half> %1 
check:337'0     ~~~~~~~~~~~~~~~~~~~
           651: } 
check:337'0     ~~
           652:  
check:337'0     ~
           653: ; Function Attrs: noinline nounwind 
check:337'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           654: define dso_local <8 x half> @test_vrndnq_f16(<8 x half> noundef %a) #0 { 
check:337'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:344'0                                                 X~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           655: entry: 
check:344'0     ~~~~~~~
           656:  %__p0.addr.i = alloca <8 x half>, align 16 
check:344'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           657:  %ref.tmp.i = alloca <16 x i8>, align 16 
check:344'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           658:  store <8 x half> %a, ptr %__p0.addr.i, align 16 
check:344'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           659:  %0 = load <16 x i8>, ptr %__p0.addr.i, align 16 
check:344'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           660:  %vrndnq_v.i = bitcast <16 x i8> %0 to <8 x half> 
check:344'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           661:  %vrndnq_v1.i = call <8 x half> @llvm.arm.neon.vrintn.v8f16(<8 x half> %vrndnq_v.i) 
check:344'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:344'1        ?                                                                                 possible intended match
           662:  %vrndnq_v2.i = bitcast <8 x half> %vrndnq_v1.i to <16 x i8> 
check:344'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           663:  store <16 x i8> %vrndnq_v2.i, ptr %ref.tmp.i, align 16 
check:344'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           664:  %1 = load <8 x half>, ptr %ref.tmp.i, align 16 
check:344'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           665:  ret <8 x half> %1 
check:344'0     ~~~~~~~~~~~~~~~~~~~
           666: } 
check:344'0     ~~
           667:  
check:344'0     ~
           668: ; Function Attrs: noinline nounwind 
check:344'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           669: define dso_local <4 x half> @test_vrndp_f16(<4 x half> noundef %a) #0 { 
check:344'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:351'0                                                X~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           670: entry: 
check:351'0     ~~~~~~~
           671:  %__p0.addr.i = alloca <4 x half>, align 8 
check:351'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           672:  %ref.tmp.i = alloca <8 x i8>, align 8 
check:351'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           673:  store <4 x half> %a, ptr %__p0.addr.i, align 8 
check:351'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           674:  %0 = load <8 x i8>, ptr %__p0.addr.i, align 8 
check:351'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           675:  %vrndp_v.i = bitcast <8 x i8> %0 to <4 x half> 
check:351'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           676:  %vrndp_v1.i = call <4 x half> @llvm.arm.neon.vrintp.v4f16(<4 x half> %vrndp_v.i) 
check:351'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:351'1       ?                                                                                possible intended match
           677:  %vrndp_v2.i = bitcast <4 x half> %vrndp_v1.i to <8 x i8> 
check:351'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           678:  store <8 x i8> %vrndp_v2.i, ptr %ref.tmp.i, align 8 
check:351'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           679:  %1 = load <4 x half>, ptr %ref.tmp.i, align 8 
check:351'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           680:  ret <4 x half> %1 
check:351'0     ~~~~~~~~~~~~~~~~~~~
           681: } 
check:351'0     ~~
           682:  
check:351'0     ~
           683: ; Function Attrs: noinline nounwind 
check:351'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           684: define dso_local <8 x half> @test_vrndpq_f16(<8 x half> noundef %a) #0 { 
check:351'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:358'0                                                 X~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           685: entry: 
check:358'0     ~~~~~~~
           686:  %__p0.addr.i = alloca <8 x half>, align 16 
check:358'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           687:  %ref.tmp.i = alloca <16 x i8>, align 16 
check:358'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           688:  store <8 x half> %a, ptr %__p0.addr.i, align 16 
check:358'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           689:  %0 = load <16 x i8>, ptr %__p0.addr.i, align 16 
check:358'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           690:  %vrndpq_v.i = bitcast <16 x i8> %0 to <8 x half> 
check:358'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           691:  %vrndpq_v1.i = call <8 x half> @llvm.arm.neon.vrintp.v8f16(<8 x half> %vrndpq_v.i) 
check:358'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:358'1        ?                                                                                 possible intended match
           692:  %vrndpq_v2.i = bitcast <8 x half> %vrndpq_v1.i to <16 x i8> 
check:358'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           693:  store <16 x i8> %vrndpq_v2.i, ptr %ref.tmp.i, align 16 
check:358'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           694:  %1 = load <8 x half>, ptr %ref.tmp.i, align 16 
check:358'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           695:  ret <8 x half> %1 
check:358'0     ~~~~~~~~~~~~~~~~~~~
           696: } 
check:358'0     ~~
           697:  
check:358'0     ~
           698: ; Function Attrs: noinline nounwind 
check:358'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           699: define dso_local <4 x half> @test_vrndx_f16(<4 x half> noundef %a) #0 { 
check:358'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:365'0                                                X~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           700: entry: 
check:365'0     ~~~~~~~
           701:  %__p0.addr.i = alloca <4 x half>, align 8 
check:365'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           702:  %ref.tmp.i = alloca <8 x i8>, align 8 
check:365'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           703:  store <4 x half> %a, ptr %__p0.addr.i, align 8 
check:365'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           704:  %0 = load <8 x i8>, ptr %__p0.addr.i, align 8 
check:365'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           705:  %vrndx_v.i = bitcast <8 x i8> %0 to <4 x half> 
check:365'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           706:  %vrndx_v1.i = call <4 x half> @llvm.arm.neon.vrintx.v4f16(<4 x half> %vrndx_v.i) 
check:365'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:365'1       ?                                                                                possible intended match
           707:  %vrndx_v2.i = bitcast <4 x half> %vrndx_v1.i to <8 x i8> 
check:365'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           708:  store <8 x i8> %vrndx_v2.i, ptr %ref.tmp.i, align 8 
check:365'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           709:  %1 = load <4 x half>, ptr %ref.tmp.i, align 8 
check:365'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           710:  ret <4 x half> %1 
check:365'0     ~~~~~~~~~~~~~~~~~~~
           711: } 
check:365'0     ~~
           712:  
check:365'0     ~
           713: ; Function Attrs: noinline nounwind 
check:365'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           714: define dso_local <8 x half> @test_vrndxq_f16(<8 x half> noundef %a) #0 { 
check:365'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:372'0                                                 X~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           715: entry: 
check:372'0     ~~~~~~~
           716:  %__p0.addr.i = alloca <8 x half>, align 16 
check:372'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           717:  %ref.tmp.i = alloca <16 x i8>, align 16 
check:372'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           718:  store <8 x half> %a, ptr %__p0.addr.i, align 16 
check:372'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           719:  %0 = load <16 x i8>, ptr %__p0.addr.i, align 16 
check:372'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           720:  %vrndxq_v.i = bitcast <16 x i8> %0 to <8 x half> 
check:372'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           721:  %vrndxq_v1.i = call <8 x half> @llvm.arm.neon.vrintx.v8f16(<8 x half> %vrndxq_v.i) 
check:372'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:372'1        ?                                                                                 possible intended match
           722:  %vrndxq_v2.i = bitcast <8 x half> %vrndxq_v1.i to <16 x i8> 
check:372'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           723:  store <16 x i8> %vrndxq_v2.i, ptr %ref.tmp.i, align 16 
check:372'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           724:  %1 = load <8 x half>, ptr %ref.tmp.i, align 16 
check:372'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           725:  ret <8 x half> %1 
check:372'0     ~~~~~~~~~~~~~~~~~~~
           726: } 
check:372'0     ~~
           727:  
check:372'0     ~
           728: ; Function Attrs: noinline nounwind 
check:372'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           729: define dso_local <4 x half> @test_vrsqrte_f16(<4 x half> noundef %a) #0 { 
check:372'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:379'0                                                  X~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           730: entry: 
check:379'0     ~~~~~~~
           731:  %__p0.addr.i = alloca <4 x half>, align 8 
check:379'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           732:  %ref.tmp.i = alloca <8 x i8>, align 8 
check:379'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           733:  store <4 x half> %a, ptr %__p0.addr.i, align 8 
check:379'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           734:  %0 = load <8 x i8>, ptr %__p0.addr.i, align 8 
check:379'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           735:  %vrsqrte_v.i = bitcast <8 x i8> %0 to <4 x half> 
check:379'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           736:  %vrsqrte_v1.i = call <4 x half> @llvm.arm.neon.vrsqrte.v4f16(<4 x half> %vrsqrte_v.i) 
check:379'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:379'1         ?                                                                                   possible intended match
           737:  store <4 x half> %vrsqrte_v1.i, ptr %ref.tmp.i, align 8 
check:379'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           738:  %1 = load <4 x half>, ptr %ref.tmp.i, align 8 
check:379'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           739:  ret <4 x half> %1 
check:379'0     ~~~~~~~~~~~~~~~~~~~
           740: } 
check:379'0     ~~
           741:  
check:379'0     ~
           742: ; Function Attrs: noinline nounwind 
check:379'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           743: define dso_local <8 x half> @test_vrsqrteq_f16(<8 x half> noundef %a) #0 { 
check:379'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:386'0                                                   X~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           744: entry: 
check:386'0     ~~~~~~~
           745:  %__p0.addr.i = alloca <8 x half>, align 16 
check:386'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           746:  %ref.tmp.i = alloca <16 x i8>, align 16 
check:386'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           747:  store <8 x half> %a, ptr %__p0.addr.i, align 16 
check:386'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           748:  %0 = load <16 x i8>, ptr %__p0.addr.i, align 16 
check:386'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           749:  %vrsqrteq_v.i = bitcast <16 x i8> %0 to <8 x half> 
check:386'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           750:  %vrsqrteq_v1.i = call <8 x half> @llvm.arm.neon.vrsqrte.v8f16(<8 x half> %vrsqrteq_v.i) 
check:386'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:386'1          ?                                                                                    possible intended match
           751:  store <8 x half> %vrsqrteq_v1.i, ptr %ref.tmp.i, align 16 
check:386'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           752:  %1 = load <8 x half>, ptr %ref.tmp.i, align 16 
check:386'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           753:  ret <8 x half> %1 
check:386'0     ~~~~~~~~~~~~~~~~~~~
           754: } 
check:386'0     ~~
           755:  
check:386'0     ~
             .
             .
             .
           766:  %add.i = fadd <8 x half> %a, %b 
           767:  ret <8 x half> %add.i 
           768: } 
           769:  
           770: ; Function Attrs: noinline nounwind 
           771: define dso_local <4 x half> @test_vabd_f16(<4 x half> noundef %a, <4 x half> noundef %b) #0 { 
check:407'0                                               X~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           772: entry: 
check:407'0     ~~~~~~~
           773:  %__p0.addr.i = alloca <4 x half>, align 8 
check:407'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           774:  %__p1.addr.i = alloca <4 x half>, align 8 
check:407'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           775:  %ref.tmp.i = alloca <8 x i8>, align 8 
check:407'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           776:  store <4 x half> %a, ptr %__p0.addr.i, align 8 
check:407'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           777:  store <4 x half> %b, ptr %__p1.addr.i, align 8 
check:407'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           778:  %0 = load <8 x i8>, ptr %__p0.addr.i, align 8 
check:407'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           779:  %1 = load <8 x i8>, ptr %__p1.addr.i, align 8 
check:407'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           780:  %vabd_v.i = bitcast <8 x i8> %0 to <4 x half> 
check:407'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           781:  %vabd_v1.i = bitcast <8 x i8> %1 to <4 x half> 
check:407'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           782:  %vabd_v2.i = call <4 x half> @llvm.arm.neon.vabds.v4f16(<4 x half> %vabd_v.i, <4 x half> %vabd_v1.i) 
check:407'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:407'1            ?                                                                                               possible intended match
           783:  %vabd_v3.i = bitcast <4 x half> %vabd_v2.i to <8 x i8> 
check:407'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           784:  store <8 x i8> %vabd_v3.i, ptr %ref.tmp.i, align 8 
check:407'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           785:  %2 = load <4 x half>, ptr %ref.tmp.i, align 8 
check:407'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           786:  ret <4 x half> %2 
check:407'0     ~~~~~~~~~~~~~~~~~~~
           787: } 
check:407'0     ~~
           788:  
check:407'0     ~
           789: ; Function Attrs: noinline nounwind 
check:407'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           790: define dso_local <8 x half> @test_vabdq_f16(<8 x half> noundef %a, <8 x half> noundef %b) #0 { 
check:407'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:414'0                                                X~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           791: entry: 
check:414'0     ~~~~~~~
           792:  %__p0.addr.i = alloca <8 x half>, align 16 
check:414'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           793:  %__p1.addr.i = alloca <8 x half>, align 16 
check:414'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           794:  %ref.tmp.i = alloca <16 x i8>, align 16 
check:414'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           795:  store <8 x half> %a, ptr %__p0.addr.i, align 16 
check:414'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           796:  store <8 x half> %b, ptr %__p1.addr.i, align 16 
check:414'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           797:  %0 = load <16 x i8>, ptr %__p0.addr.i, align 16 
check:414'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           798:  %1 = load <16 x i8>, ptr %__p1.addr.i, align 16 
check:414'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           799:  %vabdq_v.i = bitcast <16 x i8> %0 to <8 x half> 
check:414'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           800:  %vabdq_v1.i = bitcast <16 x i8> %1 to <8 x half> 
check:414'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           801:  %vabdq_v2.i = call <8 x half> @llvm.arm.neon.vabds.v8f16(<8 x half> %vabdq_v.i, <8 x half> %vabdq_v1.i) 
check:414'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:414'1             ?                                                                                                 possible intended match
           802:  %vabdq_v3.i = bitcast <8 x half> %vabdq_v2.i to <16 x i8> 
check:414'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           803:  store <16 x i8> %vabdq_v3.i, ptr %ref.tmp.i, align 16 
check:414'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           804:  %2 = load <8 x half>, ptr %ref.tmp.i, align 16 
check:414'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           805:  ret <8 x half> %2 
check:414'0     ~~~~~~~~~~~~~~~~~~~
           806: } 
check:414'0     ~~
           807:  
check:414'0     ~
           808: ; Function Attrs: noinline nounwind 
check:414'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           809: define dso_local <4 x i16> @test_vcage_f16(<4 x half> noundef %a, <4 x half> noundef %b) #0 { 
check:414'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:421'0                                               X~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           810: entry: 
check:421'0     ~~~~~~~
           811:  %__p0.addr.i = alloca <4 x half>, align 8 
check:421'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           812:  %__p1.addr.i = alloca <4 x half>, align 8 
check:421'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           813:  %ref.tmp.i = alloca <8 x i8>, align 8 
check:421'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           814:  store <4 x half> %a, ptr %__p0.addr.i, align 8 
check:421'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           815:  store <4 x half> %b, ptr %__p1.addr.i, align 8 
check:421'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           816:  %0 = load <8 x i8>, ptr %__p0.addr.i, align 8 
check:421'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           817:  %1 = load <8 x i8>, ptr %__p1.addr.i, align 8 
check:421'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           818:  %vcage_v.i = bitcast <8 x i8> %0 to <4 x half> 
check:421'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           819:  %vcage_v1.i = bitcast <8 x i8> %1 to <4 x half> 
check:421'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           820:  %vcage_v2.i = call <4 x i16> @llvm.arm.neon.vacge.v4i16.v4f16(<4 x half> %vcage_v.i, <4 x half> %vcage_v1.i) 
check:421'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:421'1             ?                                                                                                      possible intended match
           821:  store <4 x i16> %vcage_v2.i, ptr %ref.tmp.i, align 8 
check:421'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           822:  %2 = load <4 x i16>, ptr %ref.tmp.i, align 8 
check:421'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           823:  ret <4 x i16> %2 
check:421'0     ~~~~~~~~~~~~~~~~~~
           824: } 
check:421'0     ~~
           825:  
check:421'0     ~
           826: ; Function Attrs: noinline nounwind 
check:421'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           827: define dso_local <8 x i16> @test_vcageq_f16(<8 x half> noundef %a, <8 x half> noundef %b) #0 { 
check:421'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:428'0                                                X~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           828: entry: 
check:428'0     ~~~~~~~
           829:  %__p0.addr.i = alloca <8 x half>, align 16 
check:428'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           830:  %__p1.addr.i = alloca <8 x half>, align 16 
check:428'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           831:  %ref.tmp.i = alloca <16 x i8>, align 16 
check:428'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           832:  store <8 x half> %a, ptr %__p0.addr.i, align 16 
check:428'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           833:  store <8 x half> %b, ptr %__p1.addr.i, align 16 
check:428'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           834:  %0 = load <16 x i8>, ptr %__p0.addr.i, align 16 
check:428'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           835:  %1 = load <16 x i8>, ptr %__p1.addr.i, align 16 
check:428'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           836:  %vcageq_v.i = bitcast <16 x i8> %0 to <8 x half> 
check:428'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           837:  %vcageq_v1.i = bitcast <16 x i8> %1 to <8 x half> 
check:428'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           838:  %vcageq_v2.i = call <8 x i16> @llvm.arm.neon.vacge.v8i16.v8f16(<8 x half> %vcageq_v.i, <8 x half> %vcageq_v1.i) 
check:428'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:428'1              ?                                                                                                        possible intended match
           839:  store <8 x i16> %vcageq_v2.i, ptr %ref.tmp.i, align 16 
check:428'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           840:  %2 = load <8 x i16>, ptr %ref.tmp.i, align 16 
check:428'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           841:  ret <8 x i16> %2 
check:428'0     ~~~~~~~~~~~~~~~~~~
           842: } 
check:428'0     ~~
           843:  
check:428'0     ~
           844: ; Function Attrs: noinline nounwind 
check:428'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           845: define dso_local <4 x i16> @test_vcagt_f16(<4 x half> noundef %a, <4 x half> noundef %b) #0 { 
check:428'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:435'0                                               X~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           846: entry: 
check:435'0     ~~~~~~~
           847:  %__p0.addr.i = alloca <4 x half>, align 8 
check:435'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           848:  %__p1.addr.i = alloca <4 x half>, align 8 
check:435'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           849:  %ref.tmp.i = alloca <8 x i8>, align 8 
check:435'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           850:  store <4 x half> %a, ptr %__p0.addr.i, align 8 
check:435'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           851:  store <4 x half> %b, ptr %__p1.addr.i, align 8 
check:435'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           852:  %0 = load <8 x i8>, ptr %__p0.addr.i, align 8 
check:435'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           853:  %1 = load <8 x i8>, ptr %__p1.addr.i, align 8 
check:435'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           854:  %vcagt_v.i = bitcast <8 x i8> %0 to <4 x half> 
check:435'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           855:  %vcagt_v1.i = bitcast <8 x i8> %1 to <4 x half> 
check:435'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           856:  %vcagt_v2.i = call <4 x i16> @llvm.arm.neon.vacgt.v4i16.v4f16(<4 x half> %vcagt_v.i, <4 x half> %vcagt_v1.i) 
check:435'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:435'1             ?                                                                                                      possible intended match
           857:  store <4 x i16> %vcagt_v2.i, ptr %ref.tmp.i, align 8 
check:435'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           858:  %2 = load <4 x i16>, ptr %ref.tmp.i, align 8 
check:435'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           859:  ret <4 x i16> %2 
check:435'0     ~~~~~~~~~~~~~~~~~~
           860: } 
check:435'0     ~~
           861:  
check:435'0     ~
           862: ; Function Attrs: noinline nounwind 
check:435'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           863: define dso_local <8 x i16> @test_vcagtq_f16(<8 x half> noundef %a, <8 x half> noundef %b) #0 { 
check:435'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:442'0                                                X~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           864: entry: 
check:442'0     ~~~~~~~
           865:  %__p0.addr.i = alloca <8 x half>, align 16 
check:442'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           866:  %__p1.addr.i = alloca <8 x half>, align 16 
check:442'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           867:  %ref.tmp.i = alloca <16 x i8>, align 16 
check:442'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           868:  store <8 x half> %a, ptr %__p0.addr.i, align 16 
check:442'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           869:  store <8 x half> %b, ptr %__p1.addr.i, align 16 
check:442'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           870:  %0 = load <16 x i8>, ptr %__p0.addr.i, align 16 
check:442'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           871:  %1 = load <16 x i8>, ptr %__p1.addr.i, align 16 
check:442'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           872:  %vcagtq_v.i = bitcast <16 x i8> %0 to <8 x half> 
check:442'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           873:  %vcagtq_v1.i = bitcast <16 x i8> %1 to <8 x half> 
check:442'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           874:  %vcagtq_v2.i = call <8 x i16> @llvm.arm.neon.vacgt.v8i16.v8f16(<8 x half> %vcagtq_v.i, <8 x half> %vcagtq_v1.i) 
check:442'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:442'1              ?                                                                                                        possible intended match
           875:  store <8 x i16> %vcagtq_v2.i, ptr %ref.tmp.i, align 16 
check:442'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           876:  %2 = load <8 x i16>, ptr %ref.tmp.i, align 16 
check:442'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           877:  ret <8 x i16> %2 
check:442'0     ~~~~~~~~~~~~~~~~~~
           878: } 
check:442'0     ~~
           879:  
check:442'0     ~
           880: ; Function Attrs: noinline nounwind 
check:442'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           881: define dso_local <4 x i16> @test_vcale_f16(<4 x half> noundef %a, <4 x half> noundef %b) #0 { 
check:442'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:449'0                                               X~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           882: entry: 
check:449'0     ~~~~~~~
           883:  %__p0.addr.i = alloca <4 x half>, align 8 
check:449'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           884:  %__p1.addr.i = alloca <4 x half>, align 8 
check:449'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           885:  %ref.tmp.i = alloca <8 x i8>, align 8 
check:449'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           886:  store <4 x half> %a, ptr %__p0.addr.i, align 8 
check:449'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           887:  store <4 x half> %b, ptr %__p1.addr.i, align 8 
check:449'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           888:  %0 = load <8 x i8>, ptr %__p0.addr.i, align 8 
check:449'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           889:  %1 = load <8 x i8>, ptr %__p1.addr.i, align 8 
check:449'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           890:  %vcale_v.i = bitcast <8 x i8> %1 to <4 x half> 
check:449'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           891:  %vcale_v1.i = bitcast <8 x i8> %0 to <4 x half> 
check:449'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           892:  %vcale_v2.i = call <4 x i16> @llvm.arm.neon.vacge.v4i16.v4f16(<4 x half> %vcale_v.i, <4 x half> %vcale_v1.i) 
check:449'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:449'1             ?                                                                                                      possible intended match
           893:  store <4 x i16> %vcale_v2.i, ptr %ref.tmp.i, align 8 
check:449'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           894:  %2 = load <4 x i16>, ptr %ref.tmp.i, align 8 
check:449'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           895:  ret <4 x i16> %2 
check:449'0     ~~~~~~~~~~~~~~~~~~
           896: } 
check:449'0     ~~
           897:  
check:449'0     ~
           898: ; Function Attrs: noinline nounwind 
check:449'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           899: define dso_local <8 x i16> @test_vcaleq_f16(<8 x half> noundef %a, <8 x half> noundef %b) #0 { 
check:449'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:456'0                                                X~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           900: entry: 
check:456'0     ~~~~~~~
           901:  %__p0.addr.i = alloca <8 x half>, align 16 
check:456'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           902:  %__p1.addr.i = alloca <8 x half>, align 16 
check:456'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           903:  %ref.tmp.i = alloca <16 x i8>, align 16 
check:456'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           904:  store <8 x half> %a, ptr %__p0.addr.i, align 16 
check:456'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           905:  store <8 x half> %b, ptr %__p1.addr.i, align 16 
check:456'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           906:  %0 = load <16 x i8>, ptr %__p0.addr.i, align 16 
check:456'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           907:  %1 = load <16 x i8>, ptr %__p1.addr.i, align 16 
check:456'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           908:  %vcaleq_v.i = bitcast <16 x i8> %1 to <8 x half> 
check:456'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           909:  %vcaleq_v1.i = bitcast <16 x i8> %0 to <8 x half> 
check:456'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           910:  %vcaleq_v2.i = call <8 x i16> @llvm.arm.neon.vacge.v8i16.v8f16(<8 x half> %vcaleq_v.i, <8 x half> %vcaleq_v1.i) 
check:456'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:456'1              ?                                                                                                        possible intended match
           911:  store <8 x i16> %vcaleq_v2.i, ptr %ref.tmp.i, align 16 
check:456'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           912:  %2 = load <8 x i16>, ptr %ref.tmp.i, align 16 
check:456'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           913:  ret <8 x i16> %2 
check:456'0     ~~~~~~~~~~~~~~~~~~
           914: } 
check:456'0     ~~
           915:  
check:456'0     ~
           916: ; Function Attrs: noinline nounwind 
check:456'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           917: define dso_local <4 x i16> @test_vcalt_f16(<4 x half> noundef %a, <4 x half> noundef %b) #0 { 
check:456'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:463'0                                               X~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           918: entry: 
check:463'0     ~~~~~~~
           919:  %__p0.addr.i = alloca <4 x half>, align 8 
check:463'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           920:  %__p1.addr.i = alloca <4 x half>, align 8 
check:463'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           921:  %ref.tmp.i = alloca <8 x i8>, align 8 
check:463'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           922:  store <4 x half> %a, ptr %__p0.addr.i, align 8 
check:463'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           923:  store <4 x half> %b, ptr %__p1.addr.i, align 8 
check:463'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           924:  %0 = load <8 x i8>, ptr %__p0.addr.i, align 8 
check:463'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           925:  %1 = load <8 x i8>, ptr %__p1.addr.i, align 8 
check:463'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           926:  %vcalt_v.i = bitcast <8 x i8> %1 to <4 x half> 
check:463'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           927:  %vcalt_v1.i = bitcast <8 x i8> %0 to <4 x half> 
check:463'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           928:  %vcalt_v2.i = call <4 x i16> @llvm.arm.neon.vacgt.v4i16.v4f16(<4 x half> %vcalt_v.i, <4 x half> %vcalt_v1.i) 
check:463'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:463'1             ?                                                                                                      possible intended match
           929:  store <4 x i16> %vcalt_v2.i, ptr %ref.tmp.i, align 8 
check:463'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           930:  %2 = load <4 x i16>, ptr %ref.tmp.i, align 8 
check:463'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           931:  ret <4 x i16> %2 
check:463'0     ~~~~~~~~~~~~~~~~~~
           932: } 
check:463'0     ~~
           933:  
check:463'0     ~
           934: ; Function Attrs: noinline nounwind 
check:463'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           935: define dso_local <8 x i16> @test_vcaltq_f16(<8 x half> noundef %a, <8 x half> noundef %b) #0 { 
check:463'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:470'0                                                X~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
           936: entry: 
check:470'0     ~~~~~~~
           937:  %__p0.addr.i = alloca <8 x half>, align 16 
check:470'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           938:  %__p1.addr.i = alloca <8 x half>, align 16 
check:470'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           939:  %ref.tmp.i = alloca <16 x i8>, align 16 
check:470'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           940:  store <8 x half> %a, ptr %__p0.addr.i, align 16 
check:470'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           941:  store <8 x half> %b, ptr %__p1.addr.i, align 16 
check:470'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           942:  %0 = load <16 x i8>, ptr %__p0.addr.i, align 16 
check:470'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           943:  %1 = load <16 x i8>, ptr %__p1.addr.i, align 16 
check:470'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           944:  %vcaltq_v.i = bitcast <16 x i8> %1 to <8 x half> 
check:470'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           945:  %vcaltq_v1.i = bitcast <16 x i8> %0 to <8 x half> 
check:470'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           946:  %vcaltq_v2.i = call <8 x i16> @llvm.arm.neon.vacgt.v8i16.v8f16(<8 x half> %vcaltq_v.i, <8 x half> %vcaltq_v1.i) 
check:470'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:470'1              ?                                                                                                        possible intended match
           947:  store <8 x i16> %vcaltq_v2.i, ptr %ref.tmp.i, align 16 
check:470'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           948:  %2 = load <8 x i16>, ptr %ref.tmp.i, align 16 
check:470'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
           949:  ret <8 x i16> %2 
check:470'0     ~~~~~~~~~~~~~~~~~~
           950: } 
check:470'0     ~~
           951:  
check:470'0     ~
             .
             .
             .
          1035:  %__s0 = alloca <4 x i16>, align 8 
          1036:  %ref.tmp = alloca <8 x i8>, align 8 
          1037:  store <4 x i16> %a, ptr %__s0, align 8 
          1038:  %0 = load <8 x i8>, ptr %__s0, align 8 
          1039:  %vcvt_n = bitcast <8 x i8> %0 to <4 x i16> 
          1040:  %vcvt_n1 = call <4 x half> @llvm.arm.neon.vcvtfxs2fp.v4f16.v4i16(<4 x i16> %vcvt_n, i32 2) 
check:558'0                                                                                                X error: no match found
check:558'1                                                                                                  with "CVT" equal to "%vcvt_n1"
          1041:  store <4 x half> %vcvt_n1, ptr %ref.tmp, align 8 
check:558'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1042:  %1 = load <4 x half>, ptr %ref.tmp, align 8 
check:558'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1043:  ret <4 x half> %1 
check:558'0     ~~~~~~~~~~~~~~~~~~~
check:558'2      ?                  possible intended match
          1044: } 
check:558'0     ~~
          1045:  
check:558'0     ~
          1046: ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none) 
check:558'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1047: declare <4 x half> @llvm.arm.neon.vcvtfxs2fp.v4f16.v4i16(<4 x i16>, i32) #1 
check:558'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1048:  
check:558'0     ~
             .
             .
             .
          1052:  %__s0 = alloca <8 x i16>, align 16 
          1053:  %ref.tmp = alloca <16 x i8>, align 16 
          1054:  store <8 x i16> %a, ptr %__s0, align 16 
          1055:  %0 = load <16 x i8>, ptr %__s0, align 16 
          1056:  %vcvt_n = bitcast <16 x i8> %0 to <8 x i16> 
          1057:  %vcvt_n1 = call <8 x half> @llvm.arm.neon.vcvtfxs2fp.v8f16.v8i16(<8 x i16> %vcvt_n, i32 2) 
check:565'0                                                                                                X error: no match found
check:565'1                                                                                                  with "CVT" equal to "%vcvt_n1"
          1058:  store <8 x half> %vcvt_n1, ptr %ref.tmp, align 16 
check:565'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1059:  %1 = load <8 x half>, ptr %ref.tmp, align 16 
check:565'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1060:  ret <8 x half> %1 
check:565'0     ~~~~~~~~~~~~~~~~~~~
check:565'2      ?                  possible intended match
          1061: } 
check:565'0     ~~
          1062:  
check:565'0     ~
          1063: ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none) 
check:565'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1064: declare <8 x half> @llvm.arm.neon.vcvtfxs2fp.v8f16.v8i16(<8 x i16>, i32) #1 
check:565'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1065:  
check:565'0     ~
             .
             .
             .
          1069:  %__s0 = alloca <4 x i16>, align 8 
          1070:  %ref.tmp = alloca <8 x i8>, align 8 
          1071:  store <4 x i16> %a, ptr %__s0, align 8 
          1072:  %0 = load <8 x i8>, ptr %__s0, align 8 
          1073:  %vcvt_n = bitcast <8 x i8> %0 to <4 x i16> 
          1074:  %vcvt_n1 = call <4 x half> @llvm.arm.neon.vcvtfxu2fp.v4f16.v4i16(<4 x i16> %vcvt_n, i32 2) 
check:572'0                                                                                                X error: no match found
check:572'1                                                                                                  with "CVT" equal to "%vcvt_n1"
          1075:  store <4 x half> %vcvt_n1, ptr %ref.tmp, align 8 
check:572'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1076:  %1 = load <4 x half>, ptr %ref.tmp, align 8 
check:572'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1077:  ret <4 x half> %1 
check:572'0     ~~~~~~~~~~~~~~~~~~~
check:572'2      ?                  possible intended match
          1078: } 
check:572'0     ~~
          1079:  
check:572'0     ~
          1080: ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none) 
check:572'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1081: declare <4 x half> @llvm.arm.neon.vcvtfxu2fp.v4f16.v4i16(<4 x i16>, i32) #1 
check:572'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1082:  
check:572'0     ~
             .
             .
             .
          1086:  %__s0 = alloca <8 x i16>, align 16 
          1087:  %ref.tmp = alloca <16 x i8>, align 16 
          1088:  store <8 x i16> %a, ptr %__s0, align 16 
          1089:  %0 = load <16 x i8>, ptr %__s0, align 16 
          1090:  %vcvt_n = bitcast <16 x i8> %0 to <8 x i16> 
          1091:  %vcvt_n1 = call <8 x half> @llvm.arm.neon.vcvtfxu2fp.v8f16.v8i16(<8 x i16> %vcvt_n, i32 2) 
check:579'0                                                                                                X error: no match found
check:579'1                                                                                                  with "CVT" equal to "%vcvt_n1"
          1092:  store <8 x half> %vcvt_n1, ptr %ref.tmp, align 16 
check:579'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1093:  %1 = load <8 x half>, ptr %ref.tmp, align 16 
check:579'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1094:  ret <8 x half> %1 
check:579'0     ~~~~~~~~~~~~~~~~~~~
check:579'2      ?                  possible intended match
          1095: } 
check:579'0     ~~
          1096:  
check:579'0     ~
          1097: ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none) 
check:579'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1098: declare <8 x half> @llvm.arm.neon.vcvtfxu2fp.v8f16.v8i16(<8 x i16>, i32) #1 
check:579'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1099:  
check:579'0     ~
             .
             .
             .
          1103:  %__s0 = alloca <4 x half>, align 8 
          1104:  %ref.tmp = alloca <8 x i8>, align 8 
          1105:  store <4 x half> %a, ptr %__s0, align 8 
          1106:  %0 = load <8 x i8>, ptr %__s0, align 8 
          1107:  %vcvt_n = bitcast <8 x i8> %0 to <4 x half> 
          1108:  %vcvt_n1 = call <4 x i16> @llvm.arm.neon.vcvtfp2fxs.v4i16.v4f16(<4 x half> %vcvt_n, i32 2) 
check:586'0                                                                                                X error: no match found
check:586'1                                                                                                  with "CVT" equal to "%vcvt_n1"
          1109:  store <4 x i16> %vcvt_n1, ptr %ref.tmp, align 8 
check:586'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1110:  %1 = load <4 x i16>, ptr %ref.tmp, align 8 
check:586'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1111:  ret <4 x i16> %1 
check:586'0     ~~~~~~~~~~~~~~~~~~
check:586'2      ?                 possible intended match
          1112: } 
check:586'0     ~~
          1113:  
check:586'0     ~
          1114: ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none) 
check:586'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1115: declare <4 x i16> @llvm.arm.neon.vcvtfp2fxs.v4i16.v4f16(<4 x half>, i32) #1 
check:586'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1116:  
check:586'0     ~
             .
             .
             .
          1120:  %__s0 = alloca <8 x half>, align 16 
          1121:  %ref.tmp = alloca <16 x i8>, align 16 
          1122:  store <8 x half> %a, ptr %__s0, align 16 
          1123:  %0 = load <16 x i8>, ptr %__s0, align 16 
          1124:  %vcvt_n = bitcast <16 x i8> %0 to <8 x half> 
          1125:  %vcvt_n1 = call <8 x i16> @llvm.arm.neon.vcvtfp2fxs.v8i16.v8f16(<8 x half> %vcvt_n, i32 2) 
check:593'0                                                                                                X error: no match found
check:593'1                                                                                                  with "CVT" equal to "%vcvt_n1"
          1126:  store <8 x i16> %vcvt_n1, ptr %ref.tmp, align 16 
check:593'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1127:  %1 = load <8 x i16>, ptr %ref.tmp, align 16 
check:593'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1128:  ret <8 x i16> %1 
check:593'0     ~~~~~~~~~~~~~~~~~~
check:593'2      ?                 possible intended match
          1129: } 
check:593'0     ~~
          1130:  
check:593'0     ~
          1131: ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none) 
check:593'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1132: declare <8 x i16> @llvm.arm.neon.vcvtfp2fxs.v8i16.v8f16(<8 x half>, i32) #1 
check:593'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1133:  
check:593'0     ~
             .
             .
             .
          1137:  %__s0 = alloca <4 x half>, align 8 
          1138:  %ref.tmp = alloca <8 x i8>, align 8 
          1139:  store <4 x half> %a, ptr %__s0, align 8 
          1140:  %0 = load <8 x i8>, ptr %__s0, align 8 
          1141:  %vcvt_n = bitcast <8 x i8> %0 to <4 x half> 
          1142:  %vcvt_n1 = call <4 x i16> @llvm.arm.neon.vcvtfp2fxu.v4i16.v4f16(<4 x half> %vcvt_n, i32 2) 
check:600'0                                                                                                X error: no match found
check:600'1                                                                                                  with "CVT" equal to "%vcvt_n1"
          1143:  store <4 x i16> %vcvt_n1, ptr %ref.tmp, align 8 
check:600'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1144:  %1 = load <4 x i16>, ptr %ref.tmp, align 8 
check:600'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1145:  ret <4 x i16> %1 
check:600'0     ~~~~~~~~~~~~~~~~~~
check:600'2      ?                 possible intended match
          1146: } 
check:600'0     ~~
          1147:  
check:600'0     ~
          1148: ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none) 
check:600'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1149: declare <4 x i16> @llvm.arm.neon.vcvtfp2fxu.v4i16.v4f16(<4 x half>, i32) #1 
check:600'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1150:  
check:600'0     ~
             .
             .
             .
          1154:  %__s0 = alloca <8 x half>, align 16 
          1155:  %ref.tmp = alloca <16 x i8>, align 16 
          1156:  store <8 x half> %a, ptr %__s0, align 16 
          1157:  %0 = load <16 x i8>, ptr %__s0, align 16 
          1158:  %vcvt_n = bitcast <16 x i8> %0 to <8 x half> 
          1159:  %vcvt_n1 = call <8 x i16> @llvm.arm.neon.vcvtfp2fxu.v8i16.v8f16(<8 x half> %vcvt_n, i32 2) 
check:607'0                                                                                                X error: no match found
check:607'1                                                                                                  with "CVT" equal to "%vcvt_n1"
          1160:  store <8 x i16> %vcvt_n1, ptr %ref.tmp, align 16 
check:607'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1161:  %1 = load <8 x i16>, ptr %ref.tmp, align 16 
check:607'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1162:  ret <8 x i16> %1 
check:607'0     ~~~~~~~~~~~~~~~~~~
check:607'2      ?                 possible intended match
          1163: } 
check:607'0     ~~
          1164:  
check:607'0     ~
          1165: ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none) 
check:607'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1166: declare <8 x i16> @llvm.arm.neon.vcvtfp2fxu.v8i16.v8f16(<8 x half>, i32) #1 
check:607'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1167:  
check:607'0     ~
          1168: ; Function Attrs: noinline nounwind 
check:607'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1169: define dso_local <4 x half> @test_vmax_f16(<4 x half> noundef %a, <4 x half> noundef %b) #0 { 
check:607'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:613'0                                               X~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
          1170: entry: 
check:613'0     ~~~~~~~
          1171:  %__p0.addr.i = alloca <4 x half>, align 8 
check:613'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1172:  %__p1.addr.i = alloca <4 x half>, align 8 
check:613'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1173:  %ref.tmp.i = alloca <8 x i8>, align 8 
check:613'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1174:  store <4 x half> %a, ptr %__p0.addr.i, align 8 
check:613'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1175:  store <4 x half> %b, ptr %__p1.addr.i, align 8 
check:613'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1176:  %0 = load <8 x i8>, ptr %__p0.addr.i, align 8 
check:613'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1177:  %1 = load <8 x i8>, ptr %__p1.addr.i, align 8 
check:613'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1178:  %vmax_v.i = bitcast <8 x i8> %0 to <4 x half> 
check:613'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1179:  %vmax_v1.i = bitcast <8 x i8> %1 to <4 x half> 
check:613'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1180:  %vmax_v2.i = call <4 x half> @llvm.arm.neon.vmaxs.v4f16(<4 x half> %vmax_v.i, <4 x half> %vmax_v1.i) 
check:613'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:613'1            ?                                                                                               possible intended match
          1181:  %vmax_v3.i = bitcast <4 x half> %vmax_v2.i to <8 x i8> 
check:613'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1182:  store <8 x i8> %vmax_v3.i, ptr %ref.tmp.i, align 8 
check:613'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1183:  %2 = load <4 x half>, ptr %ref.tmp.i, align 8 
check:613'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1184:  ret <4 x half> %2 
check:613'0     ~~~~~~~~~~~~~~~~~~~
          1185: } 
check:613'0     ~~
          1186:  
check:613'0     ~
          1187: ; Function Attrs: noinline nounwind 
check:613'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1188: define dso_local <8 x half> @test_vmaxq_f16(<8 x half> noundef %a, <8 x half> noundef %b) #0 { 
check:613'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:620'0                                                X~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
          1189: entry: 
check:620'0     ~~~~~~~
          1190:  %__p0.addr.i = alloca <8 x half>, align 16 
check:620'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1191:  %__p1.addr.i = alloca <8 x half>, align 16 
check:620'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1192:  %ref.tmp.i = alloca <16 x i8>, align 16 
check:620'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1193:  store <8 x half> %a, ptr %__p0.addr.i, align 16 
check:620'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1194:  store <8 x half> %b, ptr %__p1.addr.i, align 16 
check:620'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1195:  %0 = load <16 x i8>, ptr %__p0.addr.i, align 16 
check:620'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1196:  %1 = load <16 x i8>, ptr %__p1.addr.i, align 16 
check:620'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1197:  %vmaxq_v.i = bitcast <16 x i8> %0 to <8 x half> 
check:620'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1198:  %vmaxq_v1.i = bitcast <16 x i8> %1 to <8 x half> 
check:620'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1199:  %vmaxq_v2.i = call <8 x half> @llvm.arm.neon.vmaxs.v8f16(<8 x half> %vmaxq_v.i, <8 x half> %vmaxq_v1.i) 
check:620'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:620'1             ?                                                                                                 possible intended match
          1200:  %vmaxq_v3.i = bitcast <8 x half> %vmaxq_v2.i to <16 x i8> 
check:620'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1201:  store <16 x i8> %vmaxq_v3.i, ptr %ref.tmp.i, align 16 
check:620'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1202:  %2 = load <8 x half>, ptr %ref.tmp.i, align 16 
check:620'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1203:  ret <8 x half> %2 
check:620'0     ~~~~~~~~~~~~~~~~~~~
          1204: } 
check:620'0     ~~
          1205:  
check:620'0     ~
          1206: ; Function Attrs: noinline nounwind 
check:620'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1207: define dso_local <4 x half> @test_vmaxnm_f16(<4 x half> noundef %a, <4 x half> noundef %b) #0 { 
check:620'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:627'0                                                 X~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
          1208: entry: 
check:627'0     ~~~~~~~
          1209:  %__p0.addr.i = alloca <4 x half>, align 8 
check:627'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1210:  %__p1.addr.i = alloca <4 x half>, align 8 
check:627'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1211:  %ref.tmp.i = alloca <8 x i8>, align 8 
check:627'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1212:  store <4 x half> %a, ptr %__p0.addr.i, align 8 
check:627'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1213:  store <4 x half> %b, ptr %__p1.addr.i, align 8 
check:627'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1214:  %0 = load <8 x i8>, ptr %__p0.addr.i, align 8 
check:627'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1215:  %1 = load <8 x i8>, ptr %__p1.addr.i, align 8 
check:627'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1216:  %vmaxnm_v.i = bitcast <8 x i8> %0 to <4 x half> 
check:627'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1217:  %vmaxnm_v1.i = bitcast <8 x i8> %1 to <4 x half> 
check:627'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1218:  %vmaxnm_v2.i = call <4 x half> @llvm.arm.neon.vmaxnm.v4f16(<4 x half> %vmaxnm_v.i, <4 x half> %vmaxnm_v1.i) 
check:627'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:627'1              ?                                                                                                    possible intended match
          1219:  %vmaxnm_v3.i = bitcast <4 x half> %vmaxnm_v2.i to <8 x i8> 
check:627'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1220:  store <8 x i8> %vmaxnm_v3.i, ptr %ref.tmp.i, align 8 
check:627'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1221:  %2 = load <4 x half>, ptr %ref.tmp.i, align 8 
check:627'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1222:  ret <4 x half> %2 
check:627'0     ~~~~~~~~~~~~~~~~~~~
          1223: } 
check:627'0     ~~
          1224:  
check:627'0     ~
          1225: ; Function Attrs: noinline nounwind 
check:627'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1226: define dso_local <8 x half> @test_vmaxnmq_f16(<8 x half> noundef %a, <8 x half> noundef %b) #0 { 
check:627'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:634'0                                                  X~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
          1227: entry: 
check:634'0     ~~~~~~~
          1228:  %__p0.addr.i = alloca <8 x half>, align 16 
check:634'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1229:  %__p1.addr.i = alloca <8 x half>, align 16 
check:634'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1230:  %ref.tmp.i = alloca <16 x i8>, align 16 
check:634'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1231:  store <8 x half> %a, ptr %__p0.addr.i, align 16 
check:634'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1232:  store <8 x half> %b, ptr %__p1.addr.i, align 16 
check:634'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1233:  %0 = load <16 x i8>, ptr %__p0.addr.i, align 16 
check:634'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1234:  %1 = load <16 x i8>, ptr %__p1.addr.i, align 16 
check:634'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1235:  %vmaxnmq_v.i = bitcast <16 x i8> %0 to <8 x half> 
check:634'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1236:  %vmaxnmq_v1.i = bitcast <16 x i8> %1 to <8 x half> 
check:634'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1237:  %vmaxnmq_v2.i = call <8 x half> @llvm.arm.neon.vmaxnm.v8f16(<8 x half> %vmaxnmq_v.i, <8 x half> %vmaxnmq_v1.i) 
check:634'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:634'1                ?                                                                                                     possible intended match
          1238:  %vmaxnmq_v3.i = bitcast <8 x half> %vmaxnmq_v2.i to <16 x i8> 
check:634'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1239:  store <16 x i8> %vmaxnmq_v3.i, ptr %ref.tmp.i, align 16 
check:634'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1240:  %2 = load <8 x half>, ptr %ref.tmp.i, align 16 
check:634'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1241:  ret <8 x half> %2 
check:634'0     ~~~~~~~~~~~~~~~~~~~
          1242: } 
check:634'0     ~~
          1243:  
check:634'0     ~
          1244: ; Function Attrs: noinline nounwind 
check:634'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1245: define dso_local <4 x half> @test_vmin_f16(<4 x half> noundef %a, <4 x half> noundef %b) #0 { 
check:634'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:641'0                                               X~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
          1246: entry: 
check:641'0     ~~~~~~~
          1247:  %__p0.addr.i = alloca <4 x half>, align 8 
check:641'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1248:  %__p1.addr.i = alloca <4 x half>, align 8 
check:641'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1249:  %ref.tmp.i = alloca <8 x i8>, align 8 
check:641'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1250:  store <4 x half> %a, ptr %__p0.addr.i, align 8 
check:641'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1251:  store <4 x half> %b, ptr %__p1.addr.i, align 8 
check:641'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1252:  %0 = load <8 x i8>, ptr %__p0.addr.i, align 8 
check:641'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1253:  %1 = load <8 x i8>, ptr %__p1.addr.i, align 8 
check:641'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1254:  %vmin_v.i = bitcast <8 x i8> %0 to <4 x half> 
check:641'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1255:  %vmin_v1.i = bitcast <8 x i8> %1 to <4 x half> 
check:641'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1256:  %vmin_v2.i = call <4 x half> @llvm.arm.neon.vmins.v4f16(<4 x half> %vmin_v.i, <4 x half> %vmin_v1.i) 
check:641'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:641'1            ?                                                                                               possible intended match
          1257:  %vmin_v3.i = bitcast <4 x half> %vmin_v2.i to <8 x i8> 
check:641'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1258:  store <8 x i8> %vmin_v3.i, ptr %ref.tmp.i, align 8 
check:641'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1259:  %2 = load <4 x half>, ptr %ref.tmp.i, align 8 
check:641'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1260:  ret <4 x half> %2 
check:641'0     ~~~~~~~~~~~~~~~~~~~
          1261: } 
check:641'0     ~~
          1262:  
check:641'0     ~
          1263: ; Function Attrs: noinline nounwind 
check:641'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1264: define dso_local <8 x half> @test_vminq_f16(<8 x half> noundef %a, <8 x half> noundef %b) #0 { 
check:641'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:648'0                                                X~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
          1265: entry: 
check:648'0     ~~~~~~~
          1266:  %__p0.addr.i = alloca <8 x half>, align 16 
check:648'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1267:  %__p1.addr.i = alloca <8 x half>, align 16 
check:648'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1268:  %ref.tmp.i = alloca <16 x i8>, align 16 
check:648'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1269:  store <8 x half> %a, ptr %__p0.addr.i, align 16 
check:648'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1270:  store <8 x half> %b, ptr %__p1.addr.i, align 16 
check:648'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1271:  %0 = load <16 x i8>, ptr %__p0.addr.i, align 16 
check:648'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1272:  %1 = load <16 x i8>, ptr %__p1.addr.i, align 16 
check:648'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1273:  %vminq_v.i = bitcast <16 x i8> %0 to <8 x half> 
check:648'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1274:  %vminq_v1.i = bitcast <16 x i8> %1 to <8 x half> 
check:648'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1275:  %vminq_v2.i = call <8 x half> @llvm.arm.neon.vmins.v8f16(<8 x half> %vminq_v.i, <8 x half> %vminq_v1.i) 
check:648'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:648'1             ?                                                                                                 possible intended match
          1276:  %vminq_v3.i = bitcast <8 x half> %vminq_v2.i to <16 x i8> 
check:648'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1277:  store <16 x i8> %vminq_v3.i, ptr %ref.tmp.i, align 16 
check:648'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1278:  %2 = load <8 x half>, ptr %ref.tmp.i, align 16 
check:648'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1279:  ret <8 x half> %2 
check:648'0     ~~~~~~~~~~~~~~~~~~~
          1280: } 
check:648'0     ~~
          1281:  
check:648'0     ~
          1282: ; Function Attrs: noinline nounwind 
check:648'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1283: define dso_local <4 x half> @test_vminnm_f16(<4 x half> noundef %a, <4 x half> noundef %b) #0 { 
check:648'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:655'0                                                 X~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
          1284: entry: 
check:655'0     ~~~~~~~
          1285:  %__p0.addr.i = alloca <4 x half>, align 8 
check:655'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1286:  %__p1.addr.i = alloca <4 x half>, align 8 
check:655'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1287:  %ref.tmp.i = alloca <8 x i8>, align 8 
check:655'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1288:  store <4 x half> %a, ptr %__p0.addr.i, align 8 
check:655'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1289:  store <4 x half> %b, ptr %__p1.addr.i, align 8 
check:655'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1290:  %0 = load <8 x i8>, ptr %__p0.addr.i, align 8 
check:655'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1291:  %1 = load <8 x i8>, ptr %__p1.addr.i, align 8 
check:655'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1292:  %vminnm_v.i = bitcast <8 x i8> %0 to <4 x half> 
check:655'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1293:  %vminnm_v1.i = bitcast <8 x i8> %1 to <4 x half> 
check:655'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1294:  %vminnm_v2.i = call <4 x half> @llvm.arm.neon.vminnm.v4f16(<4 x half> %vminnm_v.i, <4 x half> %vminnm_v1.i) 
check:655'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:655'1              ?                                                                                                    possible intended match
          1295:  %vminnm_v3.i = bitcast <4 x half> %vminnm_v2.i to <8 x i8> 
check:655'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1296:  store <8 x i8> %vminnm_v3.i, ptr %ref.tmp.i, align 8 
check:655'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1297:  %2 = load <4 x half>, ptr %ref.tmp.i, align 8 
check:655'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1298:  ret <4 x half> %2 
check:655'0     ~~~~~~~~~~~~~~~~~~~
          1299: } 
check:655'0     ~~
          1300:  
check:655'0     ~
          1301: ; Function Attrs: noinline nounwind 
check:655'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1302: define dso_local <8 x half> @test_vminnmq_f16(<8 x half> noundef %a, <8 x half> noundef %b) #0 { 
check:655'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:662'0                                                  X~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
          1303: entry: 
check:662'0     ~~~~~~~
          1304:  %__p0.addr.i = alloca <8 x half>, align 16 
check:662'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1305:  %__p1.addr.i = alloca <8 x half>, align 16 
check:662'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1306:  %ref.tmp.i = alloca <16 x i8>, align 16 
check:662'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1307:  store <8 x half> %a, ptr %__p0.addr.i, align 16 
check:662'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1308:  store <8 x half> %b, ptr %__p1.addr.i, align 16 
check:662'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1309:  %0 = load <16 x i8>, ptr %__p0.addr.i, align 16 
check:662'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1310:  %1 = load <16 x i8>, ptr %__p1.addr.i, align 16 
check:662'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1311:  %vminnmq_v.i = bitcast <16 x i8> %0 to <8 x half> 
check:662'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1312:  %vminnmq_v1.i = bitcast <16 x i8> %1 to <8 x half> 
check:662'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1313:  %vminnmq_v2.i = call <8 x half> @llvm.arm.neon.vminnm.v8f16(<8 x half> %vminnmq_v.i, <8 x half> %vminnmq_v1.i) 
check:662'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:662'1                ?                                                                                                     possible intended match
          1314:  %vminnmq_v3.i = bitcast <8 x half> %vminnmq_v2.i to <16 x i8> 
check:662'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1315:  store <16 x i8> %vminnmq_v3.i, ptr %ref.tmp.i, align 16 
check:662'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1316:  %2 = load <8 x half>, ptr %ref.tmp.i, align 16 
check:662'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1317:  ret <8 x half> %2 
check:662'0     ~~~~~~~~~~~~~~~~~~~
          1318: } 
check:662'0     ~~
             .
             .
             .
          1330:  %mul.i = fmul <8 x half> %a, %b 
          1331:  ret <8 x half> %mul.i 
          1332: } 
          1333:  
          1334: ; Function Attrs: noinline nounwind 
          1335: define dso_local <4 x half> @test_vpadd_f16(<4 x half> noundef %a, <4 x half> noundef %b) #0 { 
check:683'0                                                X~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
          1336: entry: 
check:683'0     ~~~~~~~
          1337:  %__p0.addr.i = alloca <4 x half>, align 8 
check:683'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1338:  %__p1.addr.i = alloca <4 x half>, align 8 
check:683'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1339:  %ref.tmp.i = alloca <8 x i8>, align 8 
check:683'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1340:  store <4 x half> %a, ptr %__p0.addr.i, align 8 
check:683'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1341:  store <4 x half> %b, ptr %__p1.addr.i, align 8 
check:683'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1342:  %0 = load <8 x i8>, ptr %__p0.addr.i, align 8 
check:683'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1343:  %1 = load <8 x i8>, ptr %__p1.addr.i, align 8 
check:683'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1344:  %vpadd_v.i = bitcast <8 x i8> %0 to <4 x half> 
check:683'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1345:  %vpadd_v1.i = bitcast <8 x i8> %1 to <4 x half> 
check:683'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1346:  %vpadd_v2.i = call <4 x half> @llvm.arm.neon.vpadd.v4f16(<4 x half> %vpadd_v.i, <4 x half> %vpadd_v1.i) 
check:683'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:683'1             ?                                                                                                 possible intended match
          1347:  %vpadd_v3.i = bitcast <4 x half> %vpadd_v2.i to <8 x i8> 
check:683'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1348:  store <8 x i8> %vpadd_v3.i, ptr %ref.tmp.i, align 8 
check:683'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1349:  %2 = load <4 x half>, ptr %ref.tmp.i, align 8 
check:683'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1350:  ret <4 x half> %2 
check:683'0     ~~~~~~~~~~~~~~~~~~~
          1351: } 
check:683'0     ~~
          1352:  
check:683'0     ~
          1353: ; Function Attrs: noinline nounwind 
check:683'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1354: define dso_local <4 x half> @test_vpmax_f16(<4 x half> noundef %a, <4 x half> noundef %b) #0 { 
check:683'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:690'0                                                X~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
          1355: entry: 
check:690'0     ~~~~~~~
          1356:  %__p0.addr.i = alloca <4 x half>, align 8 
check:690'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1357:  %__p1.addr.i = alloca <4 x half>, align 8 
check:690'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1358:  %ref.tmp.i = alloca <8 x i8>, align 8 
check:690'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1359:  store <4 x half> %a, ptr %__p0.addr.i, align 8 
check:690'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1360:  store <4 x half> %b, ptr %__p1.addr.i, align 8 
check:690'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1361:  %0 = load <8 x i8>, ptr %__p0.addr.i, align 8 
check:690'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1362:  %1 = load <8 x i8>, ptr %__p1.addr.i, align 8 
check:690'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1363:  %vpmax_v.i = bitcast <8 x i8> %0 to <4 x half> 
check:690'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1364:  %vpmax_v1.i = bitcast <8 x i8> %1 to <4 x half> 
check:690'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1365:  %vpmax_v2.i = call <4 x half> @llvm.arm.neon.vpmaxs.v4f16(<4 x half> %vpmax_v.i, <4 x half> %vpmax_v1.i) 
check:690'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:690'1             ?                                                                                                  possible intended match
          1366:  %vpmax_v3.i = bitcast <4 x half> %vpmax_v2.i to <8 x i8> 
check:690'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1367:  store <8 x i8> %vpmax_v3.i, ptr %ref.tmp.i, align 8 
check:690'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1368:  %2 = load <4 x half>, ptr %ref.tmp.i, align 8 
check:690'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1369:  ret <4 x half> %2 
check:690'0     ~~~~~~~~~~~~~~~~~~~
          1370: } 
check:690'0     ~~
          1371:  
check:690'0     ~
          1372: ; Function Attrs: noinline nounwind 
check:690'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1373: define dso_local <4 x half> @test_vpmin_f16(<4 x half> noundef %a, <4 x half> noundef %b) #0 { 
check:690'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:697'0                                                X~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
          1374: entry: 
check:697'0     ~~~~~~~
          1375:  %__p0.addr.i = alloca <4 x half>, align 8 
check:697'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1376:  %__p1.addr.i = alloca <4 x half>, align 8 
check:697'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1377:  %ref.tmp.i = alloca <8 x i8>, align 8 
check:697'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1378:  store <4 x half> %a, ptr %__p0.addr.i, align 8 
check:697'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1379:  store <4 x half> %b, ptr %__p1.addr.i, align 8 
check:697'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1380:  %0 = load <8 x i8>, ptr %__p0.addr.i, align 8 
check:697'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1381:  %1 = load <8 x i8>, ptr %__p1.addr.i, align 8 
check:697'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1382:  %vpmin_v.i = bitcast <8 x i8> %0 to <4 x half> 
check:697'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1383:  %vpmin_v1.i = bitcast <8 x i8> %1 to <4 x half> 
check:697'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1384:  %vpmin_v2.i = call <4 x half> @llvm.arm.neon.vpmins.v4f16(<4 x half> %vpmin_v.i, <4 x half> %vpmin_v1.i) 
check:697'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:697'1             ?                                                                                                  possible intended match
          1385:  %vpmin_v3.i = bitcast <4 x half> %vpmin_v2.i to <8 x i8> 
check:697'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1386:  store <8 x i8> %vpmin_v3.i, ptr %ref.tmp.i, align 8 
check:697'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1387:  %2 = load <4 x half>, ptr %ref.tmp.i, align 8 
check:697'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1388:  ret <4 x half> %2 
check:697'0     ~~~~~~~~~~~~~~~~~~~
          1389: } 
check:697'0     ~~
          1390:  
check:697'0     ~
          1391: ; Function Attrs: noinline nounwind 
check:697'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1392: define dso_local <4 x half> @test_vrecps_f16(<4 x half> noundef %a, <4 x half> noundef %b) #0 { 
check:697'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:704'0                                                 X~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
          1393: entry: 
check:704'0     ~~~~~~~
          1394:  %__p0.addr.i = alloca <4 x half>, align 8 
check:704'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1395:  %__p1.addr.i = alloca <4 x half>, align 8 
check:704'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1396:  %ref.tmp.i = alloca <8 x i8>, align 8 
check:704'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1397:  store <4 x half> %a, ptr %__p0.addr.i, align 8 
check:704'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1398:  store <4 x half> %b, ptr %__p1.addr.i, align 8 
check:704'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1399:  %0 = load <8 x i8>, ptr %__p0.addr.i, align 8 
check:704'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1400:  %1 = load <8 x i8>, ptr %__p1.addr.i, align 8 
check:704'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1401:  %vrecps_v.i = bitcast <8 x i8> %0 to <4 x half> 
check:704'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1402:  %vrecps_v1.i = bitcast <8 x i8> %1 to <4 x half> 
check:704'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1403:  %vrecps_v2.i = call <4 x half> @llvm.arm.neon.vrecps.v4f16(<4 x half> %vrecps_v.i, <4 x half> %vrecps_v1.i) 
check:704'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:704'1              ?                                                                                                    possible intended match
          1404:  %vrecps_v3.i = bitcast <4 x half> %vrecps_v2.i to <8 x i8> 
check:704'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1405:  store <8 x i8> %vrecps_v3.i, ptr %ref.tmp.i, align 8 
check:704'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1406:  %2 = load <4 x half>, ptr %ref.tmp.i, align 8 
check:704'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1407:  ret <4 x half> %2 
check:704'0     ~~~~~~~~~~~~~~~~~~~
          1408: } 
check:704'0     ~~
          1409:  
check:704'0     ~
          1410: ; Function Attrs: noinline nounwind 
check:704'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1411: define dso_local <8 x half> @test_vrecpsq_f16(<8 x half> noundef %a, <8 x half> noundef %b) #0 { 
check:704'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:711'0                                                  X~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
          1412: entry: 
check:711'0     ~~~~~~~
          1413:  %__p0.addr.i = alloca <8 x half>, align 16 
check:711'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1414:  %__p1.addr.i = alloca <8 x half>, align 16 
check:711'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1415:  %ref.tmp.i = alloca <16 x i8>, align 16 
check:711'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1416:  store <8 x half> %a, ptr %__p0.addr.i, align 16 
check:711'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1417:  store <8 x half> %b, ptr %__p1.addr.i, align 16 
check:711'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1418:  %0 = load <16 x i8>, ptr %__p0.addr.i, align 16 
check:711'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1419:  %1 = load <16 x i8>, ptr %__p1.addr.i, align 16 
check:711'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1420:  %vrecpsq_v.i = bitcast <16 x i8> %0 to <8 x half> 
check:711'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1421:  %vrecpsq_v1.i = bitcast <16 x i8> %1 to <8 x half> 
check:711'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1422:  %vrecpsq_v2.i = call <8 x half> @llvm.arm.neon.vrecps.v8f16(<8 x half> %vrecpsq_v.i, <8 x half> %vrecpsq_v1.i) 
check:711'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:711'1                ?                                                                                                     possible intended match
          1423:  %vrecpsq_v3.i = bitcast <8 x half> %vrecpsq_v2.i to <16 x i8> 
check:711'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1424:  store <16 x i8> %vrecpsq_v3.i, ptr %ref.tmp.i, align 16 
check:711'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1425:  %2 = load <8 x half>, ptr %ref.tmp.i, align 16 
check:711'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1426:  ret <8 x half> %2 
check:711'0     ~~~~~~~~~~~~~~~~~~~
          1427: } 
check:711'0     ~~
          1428:  
check:711'0     ~
          1429: ; Function Attrs: noinline nounwind 
check:711'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1430: define dso_local <4 x half> @test_vrsqrts_f16(<4 x half> noundef %a, <4 x half> noundef %b) #0 { 
check:711'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:718'0                                                  X~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
          1431: entry: 
check:718'0     ~~~~~~~
          1432:  %__p0.addr.i = alloca <4 x half>, align 8 
check:718'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1433:  %__p1.addr.i = alloca <4 x half>, align 8 
check:718'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1434:  %ref.tmp.i = alloca <8 x i8>, align 8 
check:718'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1435:  store <4 x half> %a, ptr %__p0.addr.i, align 8 
check:718'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1436:  store <4 x half> %b, ptr %__p1.addr.i, align 8 
check:718'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1437:  %0 = load <8 x i8>, ptr %__p0.addr.i, align 8 
check:718'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1438:  %1 = load <8 x i8>, ptr %__p1.addr.i, align 8 
check:718'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1439:  %vrsqrts_v.i = bitcast <8 x i8> %0 to <4 x half> 
check:718'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1440:  %vrsqrts_v1.i = bitcast <8 x i8> %1 to <4 x half> 
check:718'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1441:  %vrsqrts_v2.i = call <4 x half> @llvm.arm.neon.vrsqrts.v4f16(<4 x half> %vrsqrts_v.i, <4 x half> %vrsqrts_v1.i) 
check:718'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:718'1                ?                                                                                                      possible intended match
          1442:  %vrsqrts_v3.i = bitcast <4 x half> %vrsqrts_v2.i to <8 x i8> 
check:718'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1443:  store <8 x i8> %vrsqrts_v3.i, ptr %ref.tmp.i, align 8 
check:718'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1444:  %2 = load <4 x half>, ptr %ref.tmp.i, align 8 
check:718'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1445:  ret <4 x half> %2 
check:718'0     ~~~~~~~~~~~~~~~~~~~
          1446: } 
check:718'0     ~~
          1447:  
check:718'0     ~
          1448: ; Function Attrs: noinline nounwind 
check:718'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1449: define dso_local <8 x half> @test_vrsqrtsq_f16(<8 x half> noundef %a, <8 x half> noundef %b) #0 { 
check:718'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:725'0                                                   X~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
          1450: entry: 
check:725'0     ~~~~~~~
          1451:  %__p0.addr.i = alloca <8 x half>, align 16 
check:725'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1452:  %__p1.addr.i = alloca <8 x half>, align 16 
check:725'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1453:  %ref.tmp.i = alloca <16 x i8>, align 16 
check:725'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1454:  store <8 x half> %a, ptr %__p0.addr.i, align 16 
check:725'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1455:  store <8 x half> %b, ptr %__p1.addr.i, align 16 
check:725'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1456:  %0 = load <16 x i8>, ptr %__p0.addr.i, align 16 
check:725'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1457:  %1 = load <16 x i8>, ptr %__p1.addr.i, align 16 
check:725'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1458:  %vrsqrtsq_v.i = bitcast <16 x i8> %0 to <8 x half> 
check:725'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1459:  %vrsqrtsq_v1.i = bitcast <16 x i8> %1 to <8 x half> 
check:725'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1460:  %vrsqrtsq_v2.i = call <8 x half> @llvm.arm.neon.vrsqrts.v8f16(<8 x half> %vrsqrtsq_v.i, <8 x half> %vrsqrtsq_v1.i) 
check:725'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:725'1                  ?                                                                                                       possible intended match
          1461:  %vrsqrtsq_v3.i = bitcast <8 x half> %vrsqrtsq_v2.i to <16 x i8> 
check:725'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1462:  store <16 x i8> %vrsqrtsq_v3.i, ptr %ref.tmp.i, align 16 
check:725'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1463:  %2 = load <8 x half>, ptr %ref.tmp.i, align 16 
check:725'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1464:  ret <8 x half> %2 
check:725'0     ~~~~~~~~~~~~~~~~~~~
          1465: } 
check:725'0     ~~
             .
             .
             .
          1477:  %sub.i = fsub <8 x half> %a, %b 
          1478:  ret <8 x half> %sub.i 
          1479: } 
          1480:  
          1481: ; Function Attrs: noinline nounwind 
          1482: define dso_local <4 x half> @test_vfma_f16(<4 x half> noundef %a, <4 x half> noundef %b, <4 x half> noundef %c) #0 { 
check:746'0                                               X~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
          1483: entry: 
check:746'0     ~~~~~~~
          1484:  %__p0.addr.i = alloca <4 x half>, align 8 
check:746'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1485:  %__p1.addr.i = alloca <4 x half>, align 8 
check:746'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1486:  %__p2.addr.i = alloca <4 x half>, align 8 
check:746'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1487:  %ref.tmp.i = alloca <8 x i8>, align 8 
check:746'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
             .
             .
             .
          1492:  %1 = load <8 x i8>, ptr %__p1.addr.i, align 8 
check:746'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1493:  %2 = load <8 x i8>, ptr %__p2.addr.i, align 8 
check:746'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1494:  %3 = bitcast <8 x i8> %0 to <4 x half> 
check:746'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1495:  %4 = bitcast <8 x i8> %1 to <4 x half> 
check:746'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1496:  %5 = bitcast <8 x i8> %2 to <4 x half> 
check:746'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1497:  %6 = call <4 x half> @llvm.fma.v4f16(<4 x half> %4, <4 x half> %5, <4 x half> %3) 
check:746'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:746'1      ?                                                                                  possible intended match
          1498:  store <4 x half> %6, ptr %ref.tmp.i, align 8 
check:746'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1499:  %7 = load <4 x half>, ptr %ref.tmp.i, align 8 
check:746'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1500:  ret <4 x half> %7 
check:746'0     ~~~~~~~~~~~~~~~~~~~
          1501: } 
check:746'0     ~~
          1502:  
check:746'0     ~
          1503: ; Function Attrs: noinline nounwind 
check:746'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1504: define dso_local <8 x half> @test_vfmaq_f16(<8 x half> noundef %a, <8 x half> noundef %b, <8 x half> noundef %c) #0 { 
check:746'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:753'0                                                X~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
          1505: entry: 
check:753'0     ~~~~~~~
          1506:  %__p0.addr.i = alloca <8 x half>, align 16 
check:753'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1507:  %__p1.addr.i = alloca <8 x half>, align 16 
check:753'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1508:  %__p2.addr.i = alloca <8 x half>, align 16 
check:753'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1509:  %ref.tmp.i = alloca <16 x i8>, align 16 
check:753'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
             .
             .
             .
          1514:  %1 = load <16 x i8>, ptr %__p1.addr.i, align 16 
check:753'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1515:  %2 = load <16 x i8>, ptr %__p2.addr.i, align 16 
check:753'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1516:  %3 = bitcast <16 x i8> %0 to <8 x half> 
check:753'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1517:  %4 = bitcast <16 x i8> %1 to <8 x half> 
check:753'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1518:  %5 = bitcast <16 x i8> %2 to <8 x half> 
check:753'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1519:  %6 = call <8 x half> @llvm.fma.v8f16(<8 x half> %4, <8 x half> %5, <8 x half> %3) 
check:753'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:753'1      ?                                                                                  possible intended match
          1520:  store <8 x half> %6, ptr %ref.tmp.i, align 16 
check:753'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1521:  %7 = load <8 x half>, ptr %ref.tmp.i, align 16 
check:753'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1522:  ret <8 x half> %7 
check:753'0     ~~~~~~~~~~~~~~~~~~~
          1523: } 
check:753'0     ~~
          1524:  
check:753'0     ~
             .
             .
             .
          1527: entry: 
          1528:  %__p0.addr.i.i = alloca <4 x half>, align 8 
          1529:  %__p1.addr.i.i = alloca <4 x half>, align 8 
          1530:  %__p2.addr.i.i = alloca <4 x half>, align 8 
          1531:  %ref.tmp.i.i = alloca <8 x i8>, align 8 
          1532:  %fneg.i = fneg <4 x half> %b 
check:761'0                                  X error: no match found
check:761'1                                    with "SUB" equal to "%fneg\\.i"
          1533:  store <4 x half> %a, ptr %__p0.addr.i.i, align 8 
check:761'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1534:  store <4 x half> %fneg.i, ptr %__p1.addr.i.i, align 8 
check:761'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1535:  store <4 x half> %c, ptr %__p2.addr.i.i, align 8 
check:761'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1536:  %0 = load <8 x i8>, ptr %__p0.addr.i.i, align 8 
check:761'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1537:  %1 = load <8 x i8>, ptr %__p1.addr.i.i, align 8 
check:761'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1538:  %2 = load <8 x i8>, ptr %__p2.addr.i.i, align 8 
check:761'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1539:  %3 = bitcast <8 x i8> %0 to <4 x half> 
check:761'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1540:  %4 = bitcast <8 x i8> %1 to <4 x half> 
check:761'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1541:  %5 = bitcast <8 x i8> %2 to <4 x half> 
check:761'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1542:  %6 = call <4 x half> @llvm.fma.v4f16(<4 x half> %4, <4 x half> %5, <4 x half> %3) 
check:761'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:761'2      ?                                                                                  possible intended match
          1543:  store <4 x half> %6, ptr %ref.tmp.i.i, align 8 
check:761'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1544:  %7 = load <4 x half>, ptr %ref.tmp.i.i, align 8 
check:761'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1545:  ret <4 x half> %7 
check:761'0     ~~~~~~~~~~~~~~~~~~~
          1546: } 
check:761'0     ~~
          1547:  
check:761'0     ~
             .
             .
             .
          1550: entry: 
          1551:  %__p0.addr.i.i = alloca <8 x half>, align 16 
          1552:  %__p1.addr.i.i = alloca <8 x half>, align 16 
          1553:  %__p2.addr.i.i = alloca <8 x half>, align 16 
          1554:  %ref.tmp.i.i = alloca <16 x i8>, align 16 
          1555:  %fneg.i = fneg <8 x half> %b 
check:769'0                                  X error: no match found
check:769'1                                    with "SUB" equal to "%fneg\\.i"
          1556:  store <8 x half> %a, ptr %__p0.addr.i.i, align 16 
check:769'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1557:  store <8 x half> %fneg.i, ptr %__p1.addr.i.i, align 16 
check:769'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1558:  store <8 x half> %c, ptr %__p2.addr.i.i, align 16 
check:769'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1559:  %0 = load <16 x i8>, ptr %__p0.addr.i.i, align 16 
check:769'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1560:  %1 = load <16 x i8>, ptr %__p1.addr.i.i, align 16 
check:769'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1561:  %2 = load <16 x i8>, ptr %__p2.addr.i.i, align 16 
check:769'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1562:  %3 = bitcast <16 x i8> %0 to <8 x half> 
check:769'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1563:  %4 = bitcast <16 x i8> %1 to <8 x half> 
check:769'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1564:  %5 = bitcast <16 x i8> %2 to <8 x half> 
check:769'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1565:  %6 = call <8 x half> @llvm.fma.v8f16(<8 x half> %4, <8 x half> %5, <8 x half> %3) 
check:769'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:769'2      ?                                                                                  possible intended match
          1566:  store <8 x half> %6, ptr %ref.tmp.i.i, align 16 
check:769'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1567:  %7 = load <8 x half>, ptr %ref.tmp.i.i, align 16 
check:769'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1568:  ret <8 x half> %7 
check:769'0     ~~~~~~~~~~~~~~~~~~~
          1569: } 
check:769'0     ~~
          1570:  
check:769'0     ~
          1571: ; Function Attrs: noinline nounwind 
check:769'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1572: define dso_local <4 x half> @test_vmul_lane_f16(<4 x half> noundef %a, <4 x half> noundef %b) #0 { 
check:769'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:776'0                                                    X~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
          1573: entry: 
check:776'0     ~~~~~~~
          1574:  %__s0 = alloca <4 x half>, align 8 
check:776'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1575:  %ref.tmp = alloca <8 x i8>, align 8 
check:776'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1576:  store <4 x half> %b, ptr %__s0, align 8 
check:776'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1577:  %0 = load <8 x i8>, ptr %__s0, align 8 
check:776'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1578:  %1 = bitcast <8 x i8> %0 to <4 x half> 
check:776'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:776'1      ?                                       possible intended match
          1579:  %lane = shufflevector <4 x half> %1, <4 x half> %1, <4 x i32> <i32 3, i32 3, i32 3, i32 3> 
check:776'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1580:  store <4 x half> %lane, ptr %ref.tmp, align 8 
check:776'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1581:  %2 = load <4 x half>, ptr %ref.tmp, align 8 
check:776'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1582:  %mul = fmul <4 x half> %a, %2 
check:776'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1583:  ret <4 x half> %mul 
check:776'0     ~~~~~~~~~~~~~~~~~~~~~
          1584: } 
check:776'0     ~~
          1585:  
check:776'0     ~
          1586: ; Function Attrs: noinline nounwind 
check:776'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1587: define dso_local <8 x half> @test_vmulq_lane_f16(<8 x half> noundef %a, <4 x half> noundef %b) #0 { 
check:776'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:786'0                                                     X~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ error: no match found
          1588: entry: 
check:786'0     ~~~~~~~
          1589:  %__s0 = alloca <4 x half>, align 8 
check:786'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1590:  %ref.tmp = alloca <16 x i8>, align 16 
check:786'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1591:  store <4 x half> %b, ptr %__s0, align 8 
check:786'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1592:  %0 = load <8 x i8>, ptr %__s0, align 8 
check:786'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1593:  %1 = bitcast <8 x i8> %0 to <4 x half> 
check:786'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
check:786'1      ?                                       possible intended match
          1594:  %lane = shufflevector <4 x half> %1, <4 x half> %1, <8 x i32> <i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3> 
check:786'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1595:  store <8 x half> %lane, ptr %ref.tmp, align 16 
check:786'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1596:  %2 = load <8 x half>, ptr %ref.tmp, align 16 
check:786'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1597:  %mul = fmul <8 x half> %a, %2 
check:786'0     ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
          1598:  ret <8 x half> %mul 
check:786'0     ~~~~~~~~~~~~~~~~~~~~~
             .
             .
             .
>>>>>>

--

********************
Testing:  0.. 10.. 20.. 30.. 40.. 50.. 60.. 70.. 80.. 90.. 
********************
Failed Tests (7):
  Clang :: CodeGen/arm-bf16-convert-intrinsics.c
  Clang :: CodeGen/arm-neon-directed-rounding-constrained.c
  Clang :: CodeGen/arm-poly-add.c
  Clang :: CodeGen/arm-v8.1a-neon-intrinsics.c
  Clang :: CodeGen/arm-v8.2a-neon-intrinsics-generic.c
  Clang :: CodeGen/arm-v8.2a-neon-intrinsics.c
  Clang :: CodeGen/arm-v8.6a-neon-intrinsics.c


Testing Time: 504.58s

Total Discovered Tests: 46923
  Skipped          :    35 (0.07%)
  Unsupported      :   144 (0.31%)
  Passed           : 46703 (99.53%)
  Expectedly Failed:    34 (0.07%)
  Failed           :     7 (0.01%)
FAILED: gen/clang/test/run-lit 
python3 bin/llvm-lit -sv ../../clang/test
ninja: build stopped: subcommand failed.
Command '['ninja', '-C', 'out/gn', 'check-clang']' returned non-zero exit status 1.