INFO:2025-09-04T16:38:54Z:root:pulling...
From https://github.com/llvm/llvm-project
 * branch                      main       -> FETCH_HEAD
   fa308a5989b6..ce19103cfb05  main       -> origin/main
Switched to branch 'main'
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HEAD is now at ce19103cfb05 [AArch64] Add freeze(avg(x,y)) test coverage for #147696 (#156918)
INFO:2025-09-04T16:38:57Z:root:syncing...
Deleted branch merge (was d792843872df).
Switched to a new branch 'merge'
branch 'merge' set up to track 'origin/main'.
[merge 0c9298e1cbb9] [gn build] Port 010f1ea3b3f4
 1 file changed, 1 insertion(+)
[merge 06e95a191c77] [gn build] Port 20b4f59ccad5
 1 file changed, 1 insertion(+)
[merge 838e58411d18] [gn build] Port 4d9578b8ed20
 1 file changed, 4 insertions(+), 1 deletion(-)
[merge d5597369b2ac] [gn build] Port 74b9484fd62d
 1 file changed, 1 deletion(-)
[merge 06fd4c348cd6] [gn build] Port 8a65c4f11a4c
 1 file changed, 1 insertion(+)
[merge f459a54bbb4b] [gn build] Port 90865906dd2d
 1 file changed, 1 deletion(-)
[gn build] Port 010f1ea3b3f4 -- https://github.com/llvm/llvm-project/commit/010f1ea3b3f4
[gn build] Port 20b4f59ccad5 -- https://github.com/llvm/llvm-project/commit/20b4f59ccad5
[gn build] Port 4d9578b8ed20 -- https://github.com/llvm/llvm-project/commit/4d9578b8ed20
[gn build] Port 74b9484fd62d -- https://github.com/llvm/llvm-project/commit/74b9484fd62d
[gn build] Port 8a65c4f11a4c -- https://github.com/llvm/llvm-project/commit/8a65c4f11a4c
[gn build] Port 90865906dd2d -- https://github.com/llvm/llvm-project/commit/90865906dd2d
INFO:2025-09-04T16:39:00Z:root:building
ninja: Entering directory `out/gn'
[0/1] Regenerating ninja files
[1/2105] AR lib/libLLVMLoongArchDesc.a
[2/2105] AR lib/libLLVMLoongArchCodeGen.a
[3/2105] AR lib/libLLVMLoongArchAsmParser.a
[4/2105] AR lib/libLLVMLoongArchDisassembler.a
[5/2105] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsAnalyzeImmediate.o
[6/2105] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.Mips16RegisterInfo.o
[7/2105] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.Mips16InstrInfo.o
[8/2105] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MicroMipsSizeReduction.o
[9/2105] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.Mips16HardFloat.o
[10/2105] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.Mips16FrameLowering.o
[11/2105] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.Mips16ISelLowering.o
[12/2105] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsCCState.o
[13/2105] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.Mips16ISelDAGToDAG.o
[14/2105] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsBranchExpansion.o
[15/2105] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsAsmPrinter.o
[16/2105] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsCallLowering.o
[17/2105] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsConstantIslandPass.o
[18/2105] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsExpandPseudo.o
[19/2105] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsFrameLowering.o
[20/2105] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsDelaySlotFiller.o
[21/2105] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsISelDAGToDAG.o
[22/2105] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsInstrInfo.o
[23/2105] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsFastISel.o
[24/2105] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsOs16.o
[25/2105] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsLegalizerInfo.o
[26/2105] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsInstructionSelector.o
[27/2105] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsMCInstLower.o
[28/2105] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsISelLowering.o
[29/2105] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsMachineFunction.o
[30/2105] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsModuleISelDAGToDAG.o
[31/2105] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsMulMulBugPass.o
[32/2105] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsOptimizePICCall.o
[33/2105] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsPreLegalizerCombiner.o
[34/2105] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsSelectionDAGInfo.o
[35/2105] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsRegisterInfo.o
[36/2105] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsRegisterBankInfo.o
[37/2105] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsSERegisterInfo.o
[38/2105] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsSEFrameLowering.o
[39/2105] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsSEInstrInfo.o
[40/2105] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsPostLegalizerCombiner.o
[41/2105] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsSEISelDAGToDAG.o
[42/2105] CXX obj/llvm/lib/Target/Mips/MCTargetDesc/MCTargetDesc.MipsABIFlagsSection.o
[43/2105] ACTION //llvm/lib/Target/Mips/Disassembler:MipsGenDisassemblerTables(//llvm/utils/gn/build/toolchain:unix)
FAILED: gen/llvm/lib/Target/Mips/Disassembler/MipsGenDisassemblerTables.inc 
python3 ../../llvm/utils/gn/build/run_built_binary.py bin/llvm-tblgen --write-if-changed -I ../../llvm/include -I ../../llvm/lib/Target/Mips -d gen/llvm/lib/Target/Mips/Disassembler/MipsGenDisassemblerTables.inc.d -o gen/llvm/lib/Target/Mips/Disassembler/MipsGenDisassemblerTables.inc ../../llvm/lib/Target/Mips/Mips.td -gen-disassembler
Included from ../../llvm/lib/Target/Mips/Mips.td:221:
Included from ../../llvm/lib/Target/Mips/MipsInstrInfo.td:3388:
../../llvm/lib/Target/Mips/Mips16InstrInfo.td:778:5: error: could not find field for operand 'rs'
def JrcRx16: FRR16_JALRC_ins<1, 1, 0, "jrc", IIM16Alu> {
    ^
Included from ../../llvm/lib/Target/Mips/Mips.td:221:
Included from ../../llvm/lib/Target/Mips/MipsInstrInfo.td:3388:
../../llvm/lib/Target/Mips/Mips16InstrInfo.td:857:5: error: could not find field for operand 'size'
def LwRxPcTcp16: FRI16_TCP_ins<0b10110, "lw", II_LW>, MayLoad;
    ^
Included from ../../llvm/lib/Target/Mips/Mips.td:221:
Included from ../../llvm/lib/Target/Mips/MipsInstrInfo.td:3388:
../../llvm/lib/Target/Mips/Mips16InstrInfo.td:859:5: error: could not find field for operand 'size'
def LwRxPcTcpX16: FEXT_RI16_TCP_ins<0b10110, "lw", II_LW>, MayLoad;
    ^
Included from ../../llvm/lib/Target/Mips/Mips.td:221:
Included from ../../llvm/lib/Target/Mips/MipsInstrInfo.td:3408:
../../llvm/lib/Target/Mips/MicroMipsInstrInfo.td:1132:7: error: could not find field for operand 'sel'
  def RDHWR_MM : MMRel, R6MMR6Rel, ReadHardware<GPR32Opnd, HWRegsOpnd>,
      ^
Assertion failed: (!OpInfo.Decoder.empty()), function emitBinaryParser, file DecoderEmitter.cpp, line 1129.
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.
Stack dump:
0.	Program arguments: ./bin/llvm-tblgen --write-if-changed -I ../../llvm/include -I ../../llvm/lib/Target/Mips -d gen/llvm/lib/Target/Mips/Disassembler/MipsGenDisassemblerTables.inc.d -o gen/llvm/lib/Target/Mips/Disassembler/MipsGenDisassemblerTables.inc ../../llvm/lib/Target/Mips/Mips.td -gen-disassembler
[44/2105] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsSEISelLowering.o
[45/2105] CXX obj/llvm/lib/Target/Mips/MCTargetDesc/MCTargetDesc.MipsABIInfo.o
[46/2105] CXX obj/llvm/lib/Target/Mips/MCTargetDesc/MCTargetDesc.MipsAsmBackend.o
[47/2105] CXX obj/llvm/lib/Target/Mips/MCTargetDesc/MCTargetDesc.MipsELFObjectWriter.o
[48/2105] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsSubtarget.o
[49/2105] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsTargetObjectFile.o
[50/2105] CXX obj/llvm/lib/Target/Mips/AsmParser/AsmParser.MipsAsmParser.o
[51/2105] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsTargetMachine.o
[52/2105] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MipsTargetTransformInfo.o
ninja: build stopped: subcommand failed.
Command '['ninja', '-C', 'out/gn']' returned non-zero exit status 1.