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HEAD is now at 5877baf016b0 [NFC][IR2Vec] Initialize Embedding vectors with zeros by default (#155690)
INFO:2025-09-04T20:31:16Z:root:syncing...
Deleted branch merge (was 443ce2a215c1).
Switched to a new branch 'merge'
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[merge 55b64a4f9546] [gn build] Port 010f1ea3b3f4
 1 file changed, 1 insertion(+)
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[merge ebb7ab998e80] [gn build] Port 20b4f59ccad5
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[merge b686ed3cc323] [gn build] Port 4d9578b8ed20
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[merge cbc424b255a0] [gn build] Port 74b9484fd62d
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[merge 1184b3c947f6] [gn build] Port 8a65c4f11a4c
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[merge 9bdd64ec1e29] [gn build] Port 90865906dd2d
 1 file changed, 1 deletion(-)
[gn build] Port 010f1ea3b3f4 -- https://github.com/llvm/llvm-project/commit/010f1ea3b3f4
[gn build] Port 20b4f59ccad5 -- https://github.com/llvm/llvm-project/commit/20b4f59ccad5
[gn build] Port 4d9578b8ed20 -- https://github.com/llvm/llvm-project/commit/4d9578b8ed20
[gn build] Port 74b9484fd62d -- https://github.com/llvm/llvm-project/commit/74b9484fd62d
[gn build] Port 8a65c4f11a4c -- https://github.com/llvm/llvm-project/commit/8a65c4f11a4c
[gn build] Port 90865906dd2d -- https://github.com/llvm/llvm-project/commit/90865906dd2d
INFO:2025-09-04T20:31:19Z:root:building
ninja: Entering directory `out/gn'
[0/1] Regenerating ninja files
[1/2788] ACTION //llvm/lib/Target/PowerPC:PPCGenRegisterBank(//llvm/utils/gn/build/toolchain:unix)
[2/2788] ACTION //llvm/lib/Target/PowerPC:PPCGenCallingConv(//llvm/utils/gn/build/toolchain:unix)
[3/2788] ACTION //llvm/lib/Target/NVPTX/MCTargetDesc:NVPTXGenRegisterInfo(//llvm/utils/gn/build/toolchain:unix)
[4/2788] ACTION //llvm/lib/Target/NVPTX/MCTargetDesc:NVPTXGenSubtargetInfo(//llvm/utils/gn/build/toolchain:unix)
[5/2788] ACTION //llvm/lib/Target/NVPTX/MCTargetDesc:NVPTXGenAsmWriter(//llvm/utils/gn/build/toolchain:unix)
[6/2788] ACTION //llvm/lib/Target/PowerPC/Disassembler:PPCGenDisassemblerTables(//llvm/utils/gn/build/toolchain:unix)
[7/2788] ACTION //llvm/lib/Target/PowerPC/AsmParser:PPCGenAsmMatcher(//llvm/utils/gn/build/toolchain:unix)
[8/2788] ACTION //llvm/lib/Target/PowerPC:PPCGenFastISel(//llvm/utils/gn/build/toolchain:unix)
[9/2788] ACTION //llvm/lib/Target/NVPTX/MCTargetDesc:NVPTXGenInstrInfo(//llvm/utils/gn/build/toolchain:unix)
[10/2788] ACTION //llvm/lib/Target/NVPTX:NVPTXGenDAGISel(//llvm/utils/gn/build/toolchain:unix)
[11/2788] ACTION //llvm/lib/Target/PowerPC/MCTargetDesc:PPCGenAsmWriter(//llvm/utils/gn/build/toolchain:unix)
[12/2788] ACTION //llvm/lib/Target/PowerPC/MCTargetDesc:PPCGenMCCodeEmitter(//llvm/utils/gn/build/toolchain:unix)
[13/2788] ACTION //llvm/lib/Target/PowerPC/MCTargetDesc:PPCGenRegisterInfo(//llvm/utils/gn/build/toolchain:unix)
[14/2788] ACTION //llvm/lib/Target/PowerPC/MCTargetDesc:PPCGenInstrInfo(//llvm/utils/gn/build/toolchain:unix)
[15/2788] ACTION //llvm/lib/Target/PowerPC/MCTargetDesc:PPCGenSubtargetInfo(//llvm/utils/gn/build/toolchain:unix)
[16/2788] ACTION //llvm/lib/Target/PowerPC:PPCGenDAGISel(//llvm/utils/gn/build/toolchain:unix)
[17/2788] ACTION //llvm/lib/Target/PowerPC:PPCGenGlobalISel(//llvm/utils/gn/build/toolchain:unix)
[18/2788] ACTION //llvm/lib/Target/Mips:MipsGenCallingConv(//llvm/utils/gn/build/toolchain:unix)
[19/2788] ACTION //llvm/lib/Target/Mips:MipsGenDAGISel(//llvm/utils/gn/build/toolchain:unix)
[20/2788] ACTION //llvm/lib/Target/Mips:MipsGenFastISel(//llvm/utils/gn/build/toolchain:unix)
[21/2788] ACTION //llvm/lib/Target/Mips:MipsGenGlobalISel(//llvm/utils/gn/build/toolchain:unix)
[22/2788] CXX obj/llvm/lib/Target/PowerPC/Disassembler/Disassembler.PPCDisassembler.o
[23/2788] CXX obj/llvm/lib/Target/NVPTX/MCTargetDesc/MCTargetDesc.NVPTXMCTargetDesc.o
[24/2788] CXX obj/llvm/lib/Target/NVPTX/MCTargetDesc/MCTargetDesc.NVPTXTargetStreamer.o
[25/2788] CXX obj/llvm/lib/Target/PowerPC/GISel/LLVMPowerPCCodeGen.PPCRegisterBankInfo.o
[26/2788] CXX obj/llvm/lib/Target/PowerPC/GISel/LLVMPowerPCCodeGen.PPCCallLowering.o
[27/2788] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCCTRLoopsVerify.o
[28/2788] CXX obj/llvm/lib/Target/PowerPC/AsmParser/AsmParser.PPCAsmParser.o
[29/2788] CXX obj/llvm/lib/Target/NVPTX/MCTargetDesc/MCTargetDesc.NVPTXInstPrinter.o
[30/2788] AR lib/libLLVMNVPTXDesc.a
[31/2788] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCBoolRetToInt.o
[32/2788] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCEarlyReturn.o
[33/2788] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCBranchSelector.o
[34/2788] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCCTRLoops.o
[35/2788] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCExpandAtomicPseudoInsts.o
[36/2788] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCCallingConv.o
[37/2788] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCAsmPrinter.o
[38/2788] CXX obj/llvm/lib/Target/PowerPC/GISel/LLVMPowerPCCodeGen.PPCInstructionSelector.o
[39/2788] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCHazardRecognizers.o
[40/2788] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCGenScalarMASSEntries.o
[41/2788] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCFastISel.o
[42/2788] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCFrameLowering.o
[43/2788] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCLowerMASSVEntries.o
[44/2788] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCMachineScheduler.o
[45/2788] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCMCInstLower.o
[46/2788] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCInstrInfo.o
[47/2788] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCLoopInstrFormPrep.o
[48/2788] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCMacroFusion.o
[49/2788] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCISelDAGToDAG.o
[50/2788] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCMIPeephole.o
[51/2788] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCSelectionDAGInfo.o
[52/2788] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCPreEmitPeephole.o
[53/2788] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCReduceCRLogicals.o
[54/2788] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCTLSDynamicCall.o
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[56/2788] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCSubtarget.o
[57/2788] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCRegisterInfo.o
[58/2788] CXX obj/llvm/lib/Target/PowerPC/MCTargetDesc/MCTargetDesc.PPCELFObjectWriter.o
[59/2788] CXX obj/llvm/lib/Target/PowerPC/MCTargetDesc/MCTargetDesc.PPCAsmBackend.o
[60/2788] CXX obj/llvm/lib/Target/PowerPC/MCTargetDesc/MCTargetDesc.PPCInstPrinter.o
[61/2788] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCVSXWACCCopy.o
[62/2788] CXX obj/llvm/lib/Target/PowerPC/MCTargetDesc/MCTargetDesc.PPCELFStreamer.o
[63/2788] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCISelLowering.o
[64/2788] ACTION //llvm/lib/Target/Mips:MipsGenMCPseudoLowering(//llvm/utils/gn/build/toolchain:unix)
[65/2788] CXX obj/llvm/lib/Target/PowerPC/MCTargetDesc/MCTargetDesc.PPCXCOFFObjectWriter.o
[66/2788] ACTION //llvm/lib/Target/Mips:MipsGenPostLegalizeGICombiner(//llvm/utils/gn/build/toolchain:unix)
[67/2788] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCVSXFMAMutate.o
[68/2788] ACTION //llvm/lib/Target/Mips:MipsGenRegisterBank(//llvm/utils/gn/build/toolchain:unix)
[69/2788] ACTION //llvm/lib/Target/Mips/AsmParser:MipsGenAsmMatcher(//llvm/utils/gn/build/toolchain:unix)
[70/2788] ACTION //llvm/lib/Target/Mips/Disassembler:MipsGenDisassemblerTables(//llvm/utils/gn/build/toolchain:unix)
FAILED: gen/llvm/lib/Target/Mips/Disassembler/MipsGenDisassemblerTables.inc 
python3 ../../llvm/utils/gn/build/run_built_binary.py bin/llvm-tblgen --write-if-changed -I ../../llvm/include -I ../../llvm/lib/Target/Mips -d gen/llvm/lib/Target/Mips/Disassembler/MipsGenDisassemblerTables.inc.d -o gen/llvm/lib/Target/Mips/Disassembler/MipsGenDisassemblerTables.inc ../../llvm/lib/Target/Mips/Mips.td -gen-disassembler
Included from ../../llvm/lib/Target/Mips/Mips.td:221:
Included from ../../llvm/lib/Target/Mips/MipsInstrInfo.td:3388:
../../llvm/lib/Target/Mips/Mips16InstrInfo.td:778:5: error: could not find field for operand 'rs'
def JrcRx16: FRR16_JALRC_ins<1, 1, 0, "jrc", IIM16Alu> {
    ^
Included from ../../llvm/lib/Target/Mips/Mips.td:221:
Included from ../../llvm/lib/Target/Mips/MipsInstrInfo.td:3388:
../../llvm/lib/Target/Mips/Mips16InstrInfo.td:857:5: error: could not find field for operand 'size'
def LwRxPcTcp16: FRI16_TCP_ins<0b10110, "lw", II_LW>, MayLoad;
    ^
Included from ../../llvm/lib/Target/Mips/Mips.td:221:
Included from ../../llvm/lib/Target/Mips/MipsInstrInfo.td:3388:
../../llvm/lib/Target/Mips/Mips16InstrInfo.td:859:5: error: could not find field for operand 'size'
def LwRxPcTcpX16: FEXT_RI16_TCP_ins<0b10110, "lw", II_LW>, MayLoad;
    ^
Included from ../../llvm/lib/Target/Mips/Mips.td:221:
Included from ../../llvm/lib/Target/Mips/MipsInstrInfo.td:3408:
../../llvm/lib/Target/Mips/MicroMipsInstrInfo.td:1132:7: error: could not find field for operand 'sel'
  def RDHWR_MM : MMRel, R6MMR6Rel, ReadHardware<GPR32Opnd, HWRegsOpnd>,
      ^
Assertion failed: (!OpInfo.Decoder.empty()), function emitBinaryParser, file DecoderEmitter.cpp, line 1129.
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.
Stack dump:
0.	Program arguments: ./bin/llvm-tblgen --write-if-changed -I ../../llvm/include -I ../../llvm/lib/Target/Mips -d gen/llvm/lib/Target/Mips/Disassembler/MipsGenDisassemblerTables.inc.d -o gen/llvm/lib/Target/Mips/Disassembler/MipsGenDisassemblerTables.inc ../../llvm/lib/Target/Mips/Mips.td -gen-disassembler
[71/2788] ACTION //llvm/lib/Target/Mips/MCTargetDesc:MipsGenAsmWriter(//llvm/utils/gn/build/toolchain:unix)
[72/2788] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCVSXSwapRemoval.o
[73/2788] ACTION //llvm/lib/Target/Mips/MCTargetDesc:MipsGenMCCodeEmitter(//llvm/utils/gn/build/toolchain:unix)
[74/2788] ACTION //llvm/lib/Target/Mips/MCTargetDesc:MipsGenInstrInfo(//llvm/utils/gn/build/toolchain:unix)
[75/2788] CXX obj/llvm/lib/Target/PowerPC/MCTargetDesc/MCTargetDesc.PPCMCCodeEmitter.o
[76/2788] ACTION //llvm/lib/Target/Mips/MCTargetDesc:MipsGenRegisterInfo(//llvm/utils/gn/build/toolchain:unix)
[77/2788] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCTargetMachine.o
[78/2788] CXX obj/llvm/lib/Target/PowerPC/MCTargetDesc/MCTargetDesc.PPCMCTargetDesc.o
[79/2788] CXX obj/llvm/lib/Target/PowerPC/LLVMPowerPCCodeGen.PPCTargetTransformInfo.o
ninja: build stopped: subcommand failed.
Command '['ninja', '-C', 'out/gn']' returned non-zero exit status 1.