gn analyze output:
{
  "compile_targets": [],
  "status": "Found dependency",
  "test_targets": [
    "//llvm/test:check-llvm"
  ]
}
gn analyze input:
{
  "files": [
    "//compiler-rt/lib/dfsan/dfsan.cpp",
    "//compiler-rt/lib/fuzzer/FuzzerCorpus.h",
    "//compiler-rt/lib/fuzzer/FuzzerDriver.cpp",
    "//compiler-rt/lib/fuzzer/FuzzerLoop.cpp",
    "//compiler-rt/lib/hwasan/hwasan_report.cpp",
    "//lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py",
    "//lldb/test/API/tools/lldb-dap/launch/TestDAP_launch.py",
    "//lldb/tools/lldb-dap/Handler/RequestHandler.cpp",
    "//lldb/tools/lldb-dap/Protocol/ProtocolRequests.cpp",
    "//lldb/tools/lldb-dap/Protocol/ProtocolRequests.h",
    "//lldb/tools/lldb-dap/README.md",
    "//lldb/tools/lldb-dap/package.json",
    "//llvm/lib/CAS/OnDiskCommon.cpp",
    "//llvm/lib/Target/AMDGPU/SIRegisterInfo.td",
    "//llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-inline-asm.ll",
    "//llvm/test/CodeGen/AMDGPU/branch-relax-indirect-branch.mir",
    "//llvm/test/CodeGen/AMDGPU/branch-relax-no-terminators.mir",
    "//llvm/test/CodeGen/AMDGPU/coalesce-copy-to-agpr-to-av-registers.mir",
    "//llvm/test/CodeGen/AMDGPU/coalescer-early-clobber-subreg.mir",
    "//llvm/test/CodeGen/AMDGPU/dst-sel-hazard.mir",
    "//llvm/test/CodeGen/AMDGPU/hazards-gfx950.mir",
    "//llvm/test/CodeGen/AMDGPU/inflate-reg-class-vgpr-mfma-to-av-with-load-source.mir",
    "//llvm/test/CodeGen/AMDGPU/inline-asm.i128.ll",
    "//llvm/test/CodeGen/AMDGPU/local-stack-alloc-add-references.gfx10.mir",
    "//llvm/test/CodeGen/AMDGPU/local-stack-alloc-add-references.gfx8.mir",
    "//llvm/test/CodeGen/AMDGPU/local-stack-alloc-add-references.gfx9.mir",
    "//llvm/test/CodeGen/AMDGPU/machine-scheduler-sink-trivial-remats.mir",
    "//llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll",
    "//llvm/test/CodeGen/AMDGPU/rename-independent-subregs.mir",
    "//llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-copy-from.mir",
    "//llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-subreg-insert-extract.mir",
    "//llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-subreg-src2-chain.mir",
    "//llvm/test/CodeGen/AMDGPU/sched-assert-dead-def-subreg-use-other-subreg.mir",
    "//llvm/test/CodeGen/AMDGPU/sched-handleMoveUp-subreg-def-across-subreg-def.mir",
    "//llvm/test/CodeGen/AMDGPU/spill-vector-superclass.ll",
    "//llvm/test/CodeGen/AMDGPU/subreg-undef-def-with-other-subreg-defs.mir",
    "//llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_isel.ll.expected",
    "//mlir/lib/Dialect/Arith/IR/ArithCanonicalization.td",
    "//mlir/lib/Dialect/Arith/IR/ArithOps.cpp",
    "//mlir/lib/Dialect/Tosa/Transforms/TosaConvertIntegerTypeToSignless.cpp",
    "//mlir/test/Dialect/Tosa/tosa-convert-integer-type-to-signless.mlir"
  ],
  "test_targets": [
    "//clang-tools-extra/clangd/test:check-clangd",
    "//clang-tools-extra/test:check-clang-tools",
    "//clang/test:check-clang",
    "//lld/test:check-lld",
    "//llvm/test:check-llvm"
  ],
  "additional_compile_targets": []
}
running all tests due to change to blacklisted file