ninja: Entering directory `out/gn'
[1/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIModeRegister.o
[2/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SILowerWWMCopies.o
[3/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SILowerSGPRSpills.o
[4/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIMemoryLegalizer.o
[5/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SILoadStoreOptimizer.o
[6/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SILowerI1Copies.o
[7/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SILowerControlFlow.o
[8/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIMachineScheduler.o
[9/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIMachineFunctionInfo.o
[10/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SILateBranchLowering.o
[11/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIModeRegisterDefaults.o
[12/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIOptimizeExecMasking.o
[13/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIPostRABundler.o
[14/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIOptimizeExecMaskingPreRA.o
[15/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIProgramInfo.o
[16/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIPeepholeSDWA.o
[17/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIPreEmitPeephole.o
[18/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIPreAllocateWWMRegs.o
[19/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIOptimizeVGPRLiveRange.o
[20/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIShrinkInstructions.o
[21/912] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMBasicBlockInfo.o
[22/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIRegisterInfo.o
[23/912] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.A15SDOptimizer.o
[24/912] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMBranchTargets.o
[25/912] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMBaseRegisterInfo.o
[26/912] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMBlockPlacement.o
[27/912] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMAsmPrinter.o
[28/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUAlwaysInlinePass.o
[29/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUAnnotateKernelFeatures.o
[30/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUArgumentUsageInfo.o
[31/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIWholeQuadMode.o
[32/912] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMBaseInstrInfo.o
[33/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUAtomicOptimizer.o
[34/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUAsmPrinter.o
[35/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUCombinerHelper.o
[36/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUExportClustering.o
[37/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUCallLowering.o
[38/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUGlobalISelDivergenceLowering.o
[39/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUAttributor.o
[40/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUGlobalISelUtils.o
[41/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUCodeGenPrepare.o
[42/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUHSAMetadataStreamer.o
[43/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUInsertSingleUseVDST.o
[44/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUInsertDelayAlu.o
[45/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUImageIntrinsicOptimizer.o
[46/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUIGroupLP.o
[47/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUInstCombineIntrinsic.o
[48/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUISelLowering.o
[49/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPULateCodeGenPrepare.o
[50/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUISelDAGToDAG.o
[51/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPULibCalls.o
[52/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPULowerKernelArguments.o
[53/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUMCInstLower.o
[54/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPULowerBufferFatPointers.o
[55/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUMIRFormatter.o
[56/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUMacroFusion.o
[57/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPULowerModuleLDSPass.o
[58/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUMarkLastScratchLoad.o
[59/912] CXX obj/llvm/lib/Target/AMDGPU/AsmParser/AsmParser.AMDGPUAsmParser.o
[60/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUMachineCFGStructurizer.o
[61/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPULegalizerInfo.o
[62/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPURegBankSelect.o
[63/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPURemoveIncompatibleFunctions.o
[64/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUPromoteAlloca.o
[65/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUPreLegalizerCombiner.o
[66/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUPostLegalizerCombiner.o
[67/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUResourceUsageAnalysis.o
[68/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPURegBankCombiner.o
[69/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPURegisterBankInfo.o
[70/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUSetWavePriority.o
[71/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUInstructionSelector.o
[72/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.GCNCreateVOPD.o
[73/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUSubtarget.o
[74/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.GCNDPPCombine.o
[75/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUTargetTransformInfo.o
[76/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.GCNNSAReassign.o
[77/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.GCNPreRALongBranchReg.o
[78/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.GCNIterativeScheduler.o
[79/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.GCNHazardRecognizer.o
[80/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.GCNPreRAOptimizations.o
[81/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.GCNRewritePartialRegUses.o
[82/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.GCNVOPDUtils.o
[83/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.GCNRegPressure.o
[84/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600ClauseMergePass.o
[85/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600AsmPrinter.o
[86/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600ExpandSpecialInstrs.o
[87/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600EmitClauseMarkers.o
[88/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600ControlFlowFinalizer.o
[89/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600FrameLowering.o
[90/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.AMDGPUTargetMachine.o
[91/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.GCNSchedStrategy.o
[92/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600MachineFunctionInfo.o
[93/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600MachineScheduler.o
[94/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600MCInstLower.o
[95/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600InstrInfo.o
[96/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600ISelLowering.o
[97/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600Packetizer.o
[98/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600MachineCFGStructurizer.o
[99/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600OptimizeVectorRegisters.o
[100/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600RegisterInfo.o
[101/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600Subtarget.o
[102/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600ISelDAGToDAG.o
[103/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIFixVGPRCopies.o
[104/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIAnnotateControlFlow.o
[105/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600TargetTransformInfo.o
[106/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIFormMemoryClauses.o
[107/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIInsertHardClauses.o
[108/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIFixSGPRCopies.o
[109/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.R600TargetMachine.o
[110/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIFrameLowering.o
[111/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIFoldOperands.o
[112/912] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFAbstractMemberAccess.o
[113/912] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFFrameLowering.o
[114/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIInsertWaitcnts.o
[115/912] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFAdjustOpt.o
[116/912] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFAsmPrinter.o
[117/912] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFISelDAGToDAG.o
[118/912] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFCheckAndAdjustIR.o
[119/912] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFISelLowering.o
[120/912] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFInstrInfo.o
[121/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIInstrInfo.o
[122/912] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFMIChecking.o
[123/912] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFMISimplifyPatchable.o
[124/912] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFMIPeephole.o
[125/912] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFRegisterInfo.o
[126/912] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFSelectionDAGInfo.o
[127/912] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFSubtarget.o
[128/912] CXX obj/llvm/lib/Target/AMDGPU/LLVMAMDGPUCodeGen.SIISelLowering.o
[129/912] CXX obj/llvm/lib/Target/BPF/GISel/LLVMBPFCodeGen.BPFCallLowering.o
[130/912] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonCFGOptimizer.o
[131/912] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonBranchRelaxation.o
[132/912] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonAsmPrinter.o
[133/912] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonBlockRanges.o
[134/912] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonBitTracker.o
[135/912] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonBitSimplify.o
[136/912] CXX obj/llvm/lib/Target/BPF/GISel/LLVMBPFCodeGen.BPFInstructionSelector.o
[137/912] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonConstPropagation.o
[138/912] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonConstExtenders.o
[139/912] CXX obj/llvm/lib/Target/BPF/LLVMBPFCodeGen.BPFTargetMachine.o
[140/912] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonCopyToCombine.o
[141/912] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonFixupHwLoops.o
[142/912] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonEarlyIfConv.o
[143/912] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonExpandCondsets.o
[144/912] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonGenMemAbsolute.o
[145/912] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonGenMux.o
[146/912] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonHazardRecognizer.o
[147/912] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonGenPredicate.o
[148/912] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonHardwareLoops.o
[149/912] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonFrameLowering.o
[150/912] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonGenInsert.o
[151/912] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonLoopAlign.o
[152/912] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonMCInstLower.o
[153/912] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonISelDAGToDAG.o
[154/912] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonISelLowering.o
[155/912] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonMachineScheduler.o
[156/912] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonISelLoweringHVX.o
[157/912] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonISelDAGToDAGHVX.o
[158/912] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonNewValueJump.o
[159/912] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonOptAddrMode.o
[160/912] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonPeephole.o
[161/912] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonSelectionDAGInfo.o
[162/912] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonSplitConst32AndConst64.o
[163/912] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonInstrInfo.o
[164/912] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonRegisterInfo.o
[165/912] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonRDFOpt.o
[166/912] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonStoreWidening.o
[167/912] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonSplitDouble.o
[168/912] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonSubtarget.o
[169/912] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMCallLowering.o
[170/912] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMCallingConv.o
[171/912] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMFixCortexA57AES1742098Pass.o
[172/912] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMExpandPseudoInsts.o
[173/912] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMHazardRecognizer.o
[174/912] CXX obj/llvm/lib/Target/Hexagon/LLVMHexagonCodeGen.HexagonTargetMachine.o
[175/912] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMFastISel.o
[176/912] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMConstantIslandPass.o
[177/912] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMFrameLowering.o
[178/912] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMInstrInfo.o
[179/912] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMISelDAGToDAG.o
[180/912] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMLegalizerInfo.o
[181/912] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMMachineFunctionInfo.o
[182/912] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMMCInstLower.o
[183/912] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMOptimizeBarriersPass.o
[184/912] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMMacroFusion.o
[185/912] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMInstructionSelector.o
[186/912] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMLowOverheadLoops.o
[187/912] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMLoadStoreOptimizer.o
[188/912] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMRegisterBankInfo.o
[189/912] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMSLSHardening.o
[190/912] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMParallelDSP.o
[191/912] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMSelectionDAGInfo.o
[192/912] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMTargetObjectFile.o
[193/912] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMSubtarget.o
[194/912] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.MLxExpansionPass.o
[195/912] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMTargetMachine.o
[196/912] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMISelLowering.o
[197/912] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.MVEGatherScatterLowering.o
[198/912] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ARMTargetTransformInfo.o
[199/912] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.MVELaneInterleavingPass.o
[200/912] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.MVEVPTBlockPass.o
[201/912] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.MVETPAndVPTOptimisationsPass.o
[202/912] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.MVETailPredication.o
[203/912] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.Thumb1FrameLowering.o
[204/912] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.Thumb1InstrInfo.o
[205/912] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.Thumb2ITBlockPass.o
[206/912] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.Thumb2InstrInfo.o
[207/912] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRAsmPrinter.o
[208/912] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.ThumbRegisterInfo.o
[209/912] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRExpandPseudoInsts.o
[210/912] CXX obj/llvm/lib/Target/ARM/LLVMARMCodeGen.Thumb2SizeReduction.o
[211/912] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRFrameLowering.o
[212/912] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRISelDAGToDAG.o
[213/912] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRMCInstLower.o
[214/912] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRISelLowering.o
[215/912] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRInstrInfo.o
[216/912] CXX obj/llvm/lib/Target/ARM/Disassembler/Disassembler.ARMDisassembler.o
[217/912] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRRegisterInfo.o
[218/912] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRSubtarget.o
[219/912] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRTargetMachine.o
[220/912] CXX obj/llvm/lib/Target/AVR/LLVMAVRCodeGen.AVRTargetObjectFile.o
[221/912] CXX obj/llvm/lib/Target/AVR/Disassembler/Disassembler.AVRDisassembler.o
[222/912] CXX obj/llvm/lib/Target/LoongArch/LLVMLoongArchCodeGen.LoongArchSubtarget.o
[223/912] CXX obj/llvm/lib/Target/LoongArch/LLVMLoongArchCodeGen.LoongArchRegisterInfo.o
[224/912] CXX obj/llvm/lib/Target/LoongArch/LLVMLoongArchCodeGen.LoongArchTargetTransformInfo.o
[225/912] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.MicroMipsSizeReduction.o
[226/912] CXX obj/llvm/lib/Target/ARM/AsmParser/AsmParser.ARMAsmParser.o
[227/912] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.Mips16HardFloat.o
[228/912] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.Mips16InstrInfo.o
[229/912] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.Mips16FrameLowering.o
[230/912] CXX obj/llvm/lib/Target/LoongArch/LLVMLoongArchCodeGen.LoongArchTargetMachine.o
[231/912] CXX obj/llvm/lib/Target/Mips/LLVMMipsCodeGen.Mips16ISelDAGToDAG.o
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[453/912] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86AvoidStoreForwardingBlocks.o
[454/912] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86CallFrameOptimization.o
[455/912] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86CompressEVEX.o
[456/912] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86CallingConv.o
[457/912] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86DynAllocaExpander.o
[458/912] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86DomainReassignment.o
[459/912] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86ExpandPseudo.o
[460/912] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86FastTileConfig.o
[461/912] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86FastPreTileConfig.o
[462/912] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86DiscriminateMemOps.o
[463/912] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86FixupBWInsts.o
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[470/912] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86FixupVectorConstants.o
[471/912] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86FlagsCopyLowering.o
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[474/912] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86InsertWait.o
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[503/912] ACTION //llvm/tools/llvm-objcopy:llvm-strip(//llvm/utils/gn/build/toolchain:unix)
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[512/912] LINK ./bin/llvm-dis
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[514/912] ACTION //lldb/test:lit_shell_site_cfg(//llvm/utils/gn/build/toolchain:unix)
FAILED: gen/lldb/test/Shell/lit.site.cfg.py 
python3 ../../llvm/utils/gn/build/write_cmake_config.py -o gen/lldb/test/Shell/lit.site.cfg.py ../../lldb/test/Shell/lit.site.cfg.py.in LIT_SITE_CFG_IN_HEADER=\#\#\ Autogenerated\ from\ //lldb/test/Shell/lit.site.cfg.py.in,\ do\ not\ edit LLDB_BINARY_DIR=/Users/thakis/src/llvm-project/out/gn/obj/lldb LLDB_SOURCE_DIR=/Users/thakis/src/llvm-project/lldb LLVM_BINARY_DIR=/Users/thakis/src/llvm-project/out/gn/obj/llvm LLVM_LIBS_DIR= LLVM_LIT_TOOLS_DIR= LLVM_SOURCE_DIR=/Users/thakis/src/llvm-project/llvm LLVM_TOOLS_DIR=/Users/thakis/src/llvm-project/out/gn/bin Python3_EXECUTABLE=python3 LLVM_TARGET_TRIPLE=arm64-apple-darwin CMAKE_SYSROOT= LLDB_ENABLE_LUA=0 LLDB_ENABLE_LZMA=0 LLDB_ENABLE_PYTHON=0 LLDB_IS_64_BITS=1 LLDB_LIBS_DIR= LLDB_LIT_TOOLS_DIR= LLDB_TEST_BUILD_DIRECTORY=/Users/thakis/src/llvm-project/out/gn/gen/lldb/test/test_build LLDB_TEST_MODULE_CACHE_CLANG=/Users/thakis/src/llvm-project/out/gn/gen/lldb/test/lldb-test-build.noindex/module-cache-clang LLDB_TEST_MODULE_CACHE_LLDB=/Users/thakis/src/llvm-project/out/gn/gen/lldb/test/lldb-test-build.noindex/module-cache-lldb LLDB_TEST_OBJC_GNUSTEP_DIR= LLDB_TOOL_LLDB_SERVER_BUILD=1 LLDB_TOOLS_DIR=/Users/thakis/src/llvm-project/out/gn/bin LLDB_USE_SYSTEM_DEBUGSERVER=1 LLVM_HOST_TRIPLE=arm64-apple-darwin LLVM_ENABLE_ZLIB=1 SHLIBDIR=../../../../lib
Traceback (most recent call last):
  File "/Users/thakis/src/llvm-project/out/gn/../../llvm/utils/gn/build/write_cmake_config.py", line 122, in <module>
    sys.exit(main())
  File "/Users/thakis/src/llvm-project/out/gn/../../llvm/utils/gn/build/write_cmake_config.py", line 72, in main
    in_line = var_re.sub(repl, in_line)
  File "/Users/thakis/src/llvm-project/out/gn/../../llvm/utils/gn/build/write_cmake_config.py", line 70, in repl
    return values[key]
KeyError: 'LLVM_USE_SANITIZER'
[515/912] AR lib/libLLVMAnalysis.a
[516/912] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86SpeculativeExecutionSideEffectSuppression.o
[517/912] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86Subtarget.o
[518/912] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86VZeroUpper.o
[519/912] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86TileConfig.o
[520/912] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86SpeculativeLoadHardening.o
[521/912] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86TargetMachine.o
[522/912] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86TargetTransformInfo.o
[523/912] CXX obj/llvm/lib/Target/X86/LLVMX86CodeGen.X86ISelLowering.o
ninja: build stopped: subcommand failed.
Command '['ninja', '-C', 'out/gn']' returned non-zero exit status 1.