ninja: Entering directory `out/gn'
[1/3] STAMP obj/llvm/test/test.stamp
[1/3] ACTION //llvm/test:check-llvm(//llvm/utils/gn/build/toolchain:win)
llvm-lit.py: C:\src\llvm-project\llvm\utils\lit\lit\llvm\config.py:57: note: using lit tools: C:\src\depot_tools\win_tools-2_7_6_bin2\git\usr\bin
llvm-lit.py: C:\src\llvm-project\llvm\utils\lit\lit\llvm\config.py:502: note: using ld.lld: c:\src\llvm-project\out\gn\bin\ld.lld.exe
llvm-lit.py: C:\src\llvm-project\llvm\utils\lit\lit\llvm\config.py:502: note: using lld-link: c:\src\llvm-project\out\gn\bin\lld-link.exe
llvm-lit.py: C:\src\llvm-project\llvm\utils\lit\lit\llvm\config.py:502: note: using ld64.lld: c:\src\llvm-project\out\gn\bin\ld64.lld.exe
llvm-lit.py: C:\src\llvm-project\llvm\utils\lit\lit\llvm\config.py:502: note: using wasm-ld: c:\src\llvm-project\out\gn\bin\wasm-ld.exe
-- Testing: 52355 tests, 48 workers --
Testing:  0.. 10.. 20.. 30.. 40.. 50.. 60.. 70.. 80.. 90.
FAIL: LLVM :: CodeGen/RISCV/GlobalISel/irtranslator/vec-alu.ll (51028 of 52355)
******************** TEST 'LLVM :: CodeGen/RISCV/GlobalISel/irtranslator/vec-alu.ll' FAILED ********************
Exit Code: 2

Command Output (stdout):
--
# RUN: at line 2
c:\src\llvm-project\out\gn\bin\llc.exe -mtriple=riscv32 -mattr=+v -global-isel -stop-before=legalizer -simplify-mir < C:\src\llvm-project\llvm\test\CodeGen\RISCV\GlobalISel\irtranslator\vec-alu.ll | c:\src\llvm-project\out\gn\bin\filecheck.exe C:\src\llvm-project\llvm\test\CodeGen\RISCV\GlobalISel\irtranslator\vec-alu.ll --check-prefixes=CHECK,RV32I
# executed command: 'c:\src\llvm-project\out\gn\bin\llc.exe' -mtriple=riscv32 -mattr=+v -global-isel -stop-before=legalizer -simplify-mir
# .---command stdout------------
# | --- |
# |   ; ModuleID = '<stdin>'
# |   source_filename = "<stdin>"
# |   target datalayout = "e-m:e-p:32:32-i64:64-n32-S128"
# |   target triple = "riscv32"
# |   
# |   define void @add_nxv2i32(<vscale x 2 x i32> %a, <vscale x 2 x i32> %b) #0 {
# |     %c = add <vscale x 2 x i32> %a, %b
# |     ret void
# |   }
# |   
# |   define void @sub_nxv2i32(<vscale x 2 x i32> %a, <vscale x 2 x i32> %b) #0 {
# |     %c = sub <vscale x 2 x i32> %a, %b
# |     ret void
# |   }
# |   
# |   define void @and_nxv2i32(<vscale x 2 x i32> %a, <vscale x 2 x i32> %b) #0 {
# |     %c = and <vscale x 2 x i32> %a, %b
# |     ret void
# |   }
# |   
# |   define void @or_nxv2i32(<vscale x 2 x i32> %a, <vscale x 2 x i32> %b) #0 {
# |     %c = or <vscale x 2 x i32> %a, %b
# |     ret void
# |   }
# |   
# |   define void @xor_nxv2i32(<vscale x 2 x i32> %a, <vscale x 2 x i32> %b) #0 {
# |     %c = xor <vscale x 2 x i32> %a, %b
# |     ret void
# |   }
# |   
# |   attributes #0 = { "target-features"="+v" }
# | 
# | ...
# | ---
# | name:            add_nxv2i32
# | alignment:       4
# | tracksRegLiveness: true
# | registers:
# |   - { id: 0, class: _ }
# |   - { id: 1, class: _ }
# |   - { id: 2, class: _ }
# | liveins:
# |   - { reg: '$v8' }
# |   - { reg: '$v9' }
# | frameInfo:
# |   maxAlignment:    1
# | machineFunctionInfo:
# |   varArgsFrameIndex: 0
# |   varArgsSaveSize: 0
# | body:             |
# |   bb.1 (%ir-block.0):
# |     liveins: $v8, $v9
# |   
# |     PseudoRET
# | 
# | ...
# | ---
# | name:            sub_nxv2i32
# | alignment:       4
# | tracksRegLiveness: true
# | registers:
# |   - { id: 0, class: _ }
# |   - { id: 1, class: _ }
# |   - { id: 2, class: _ }
# | liveins:
# |   - { reg: '$v8' }
# |   - { reg: '$v9' }
# | frameInfo:
# |   maxAlignment:    1
# | machineFunctionInfo:
# |   varArgsFrameIndex: 0
# |   varArgsSaveSize: 0
# | body:             |
# |   bb.1 (%ir-block.0):
# |     liveins: $v8, $v9
# |   
# |     PseudoRET
# | 
# | ...
# | ---
# | name:            and_nxv2i32
# | alignment:       4
# | tracksRegLiveness: true
# | registers:
# |   - { id: 0, class: _ }
# |   - { id: 1, class: _ }
# |   - { id: 2, class: _ }
# | liveins:
# |   - { reg: '$v8' }
# |   - { reg: '$v9' }
# | frameInfo:
# |   maxAlignment:    1
# | machineFunctionInfo:
# |   varArgsFrameIndex: 0
# |   varArgsSaveSize: 0
# | body:             |
# |   bb.1 (%ir-block.0):
# |     liveins: $v8, $v9
# |   
# |     PseudoRET
# | 
# | ...
# | ---
# | name:            or_nxv2i32
# | alignment:       4
# | tracksRegLiveness: true
# | registers:
# |   - { id: 0, class: _ }
# |   - { id: 1, class: _ }
# |   - { id: 2, class: _ }
# | liveins:
# |   - { reg: '$v8' }
# |   - { reg: '$v9' }
# | frameInfo:
# |   maxAlignment:    1
# | machineFunctionInfo:
# |   varArgsFrameIndex: 0
# |   varArgsSaveSize: 0
# | body:             |
# |   bb.1 (%ir-block.0):
# |     liveins: $v8, $v9
# |   
# |     PseudoRET
# | 
# | ...
# | ---
# | name:            xor_nxv2i32
# | alignment:       4
# | tracksRegLiveness: true
# | registers:
# |   - { id: 0, class: _ }
# |   - { id: 1, class: _ }
# |   - { id: 2, class: _ }
# | liveins:
# |   - { reg: '$v8' }
# |   - { reg: '$v9' }
# | frameInfo:
# |   maxAlignment:    1
# | machineFunctionInfo:
# |   varArgsFrameIndex: 0
# |   varArgsSaveSize: 0
# | body:             |
# |   bb.1 (%ir-block.0):
# |     liveins: $v8, $v9
# |   
# |     PseudoRET
# | 
# | ...
# `-----------------------------
# executed command: 'c:\src\llvm-project\out\gn\bin\filecheck.exe' 'C:\src\llvm-project\llvm\test\CodeGen\RISCV\GlobalISel\irtranslator\vec-alu.ll' --check-prefixes=CHECK,RV32I
# .---command stderr------------
# | error: no check strings found with prefix 'RV32I:'
# `-----------------------------
# error: command failed with exit status: 2

--

********************
Testing:  0.. 10.. 20.. 30.. 40.. 50.. 60.. 70.. 80.. 90..
********************
Failed Tests (1):
  LLVM :: CodeGen/RISCV/GlobalISel/irtranslator/vec-alu.ll


Testing Time: 498.40s

Total Discovered Tests: 57785
  Skipped          :    28 (0.05%)
  Unsupported      :  1776 (3.07%)
  Passed           : 55801 (96.57%)
  Expectedly Failed:   179 (0.31%)
  Failed           :     1 (0.00%)
FAILED: gen/llvm/test/run-lit 
python3 bin/llvm-lit.py -sv ../../llvm/test
ninja: build stopped: subcommand failed.
Command '['ninja', '-C', 'out/gn', 'check-llvm']' returned non-zero exit status 1.